- Aug 08, 2015
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Alexandru M Stan authored
Also known as the Asus Chromebook Flip. Signed-off-by:
Alexandru M Stan <amstan@chromium.org> Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
Douglas Anderson <dianders@chromium.org>
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Heiko Stuebner authored
The all current Rockchip SoCs supporting 4GB of ram have problems accessing the memory region 0xfe000000~0xff000000. This also seems to includes the rk3368 arm64 soc. All current code handling dma memory oddities I could find, seem to involve soc-specific code (zone-dma or so) while this issue is shared between arm32 and arm64 socs from Rockchip, which would need to have this described in the soc devicetree on both socs. Limiting the dma-zone alone also does not solve the issue and as the dma-masks need to be a power-of-two in the kernel, the next lower dma-mask brings memory usable for dma down to 2GB. So as a stop-gap block off the affected region to prevent its use by devices with 4GB of memory, like some recent Chromebooks. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
Douglas Anderson <dianders@chromium.org>
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Heiko Stuebner authored
This enables the previously disabled usb controllers on the marsboard and makes it possible to for example mount usb mass storage devices. Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
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Heiko Stuebner authored
This adds the usbphy nodes to rk3066 and rk3188, which share the usb hosts in rk3xxx.dtsi and also enables it on boards based around these socs. The usb-phy itself is the same as used on the rk3288 already. Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
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Heiko Stuebner authored
According to the manual, the fifo sizes are the same as on later socs like the rk3288 and this also fixes an error about "insufficient fifo memory", as it seems the values read from the ip are wrong. Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
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- Jul 23, 2015
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Romain Perier authored
Which is formally known as the Asus C201 chromebook Signed-off-by:
Romain Perier <romain.perier@gmail.com> Reviewed-by:
Doug Anderson <dianders@chromium.org> Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
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- Jul 22, 2015
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Romain Perier authored
tsadc-tshut-mode and tsadc-tshut-polarity properties don't exist. The rockchip thermal driver looks for rockchip,hw-tshut-mode and rockchip,hw-tshut-polarity instead, otherwise it might freeze or hang the device according to the default mode or polarity used. Signed-off-by:
Romain Perier <romain.perier@gmail.com> Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
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- Jul 16, 2015
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Heiko Stuebner authored
The rk3288 uses spi irqs for the arm-pmu on individual cpu cores, so needs the affinity to them defined. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
Sonny Rao <sonnyrao@chromium.org>
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Heiko Stuebner authored
The memory node is supposed to contain a device_type property marking it as memory. The currently included boards miss this property. Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
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Heiko Stuebner authored
While pinky was one of the earlier development models, is on the list of endangered species today and nearly extinct, I want to keep mine around for the foreseeable future after spending all the time making a nice hole into the base below the dut-connector. Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
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Alexandru M Stan authored
The Hisense Chromebook C11, also named jerry. Signed-off-by:
Alexandru M Stan <amstan@chromium.org> Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
Doug Anderson <dianders@chromium.org>
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Alexandru M Stan authored
This adds the shared devicetree files for the Veyron device family. They are split, as not all veyron devices are chromebooks and not all contain a sd-card slot. Signed-off-by:
Alexandru M Stan <amstan@chromium.org> Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
Doug Anderson <dianders@chromium.org>
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- Jul 15, 2015
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Chris Zhong authored
This patch creates a sbs-battery fragment for batteries connected to the i2c tunnel of the cros-ec embedded controller. Signed-off-by:
Chris Zhong <zyw@rock-chips.com> Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Acked-by:
Douglas Anderson <dianders@chromium.org>
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- Jul 14, 2015
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Heiko Stuebner authored
This board is used in some TV-boxes like for example the Beelink R89 or Tronsmart R28. The board itself follows the reference design for the most part. But there are no schematics available it seems, so some things should be taken with a grain of salt. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
Romain Perier <romain.perier@gmail.com>
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- Jul 05, 2015
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Heiko Stuebner authored
The watchdog irq is actually SPI 79, which translates to the original 111 in the manual where the SPI irqs start at 32. The current dw_wdt driver does not use the irq at all, so this issue never surfaced. Nevertheless fix this for a time we want to use the irq. Fixes: 2ab557b72d46 ("ARM: dts: rockchip: add core rk3288 dtsi") Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
Douglas Anderson <dianders@chromium.org>
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Romain Perier authored
Adds ramp delay for the vdd_cpu output. It removes warning "ramp_delay not set" emitted by the function regulator_set_voltage_time_sel() by the same time, which floods kernel logs. Signed-off-by:
Romain Perier <romain.perier@gmail.com> Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
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Romain Perier authored
Which fixes warning "no reset control found" by the same time Signed-off-by:
Romain Perier <romain.perier@gmail.com> Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
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- Jul 01, 2015
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Boris Brezillon authored
at91sam9g45, at91sam9x5 and sama5 SoCs should not use "atmel,at91sam9rl-udc" for their USB device compatible property since this compatible is attached to a specific hardware bug fix. Signed-off-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by:
Alexandre Belloni <alexandre.belloni@free-electrons.com> Tested-by:
Bo Shen <voice.shen@atmel.com> Acked-by:
Nicolas Ferre <nicolas.ferre@atmel.com> Cc: <stable@vger.kernel.org> #4.0+ Signed-off-by:
Kevin Hilman <khilman@linaro.org>
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- Jun 30, 2015
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Simon Guinot authored
This patch updates the Ethernet DT nodes for Armada XP SoCs with the compatible string "marvell,armada-xp-neta". Signed-off-by:
Simon Guinot <simon.guinot@sequanux.org> Fixes: 77916519 ("arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces") Cc: <stable@vger.kernel.org> # v3.8+ Acked-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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- Jun 25, 2015
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Arnd Bergmann authored
This backs out all changes that were added in the hip04-dt branch after various boot problems were discovered in UEFI booting. Reported-by:
Tyler Baker <tyler.baker@linaro.org> Cc: Wei Xu <xuwei5@hisilicon.com> [khilman: minor changelog updates] Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Kevin Hilman <khilman@linaro.org>
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- Jun 24, 2015
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Thor Thayer authored
Add support for the Arria10 SDRAM EDAC. Update the bindings document for the new match string. Signed-off-by:
Thor Thayer <tthayer@opensource.altera.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: devicetree@vger.kernel.org Cc: dinguyen@opensource.altera.com Cc: galak@codeaurora.org Cc: grant.likely@linaro.org Cc: ijc+devicetree@hellion.org.uk Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: m.chehab@samsung.com Cc: mark.rutland@arm.com Cc: pawel.moll@arm.com Cc: robh+dt@kernel.org Cc: tthayer.linux@gmail.com Link: http://lkml.kernel.org/r/1433428128-7292-5-git-send-email-tthayer@opensource.altera.com Signed-off-by:
Borislav Petkov <bp@suse.de>
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- Jun 22, 2015
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Hyungwon Hwang authored
The clock which was named as 'pll_clk' is actually not the clock source of PLL in MIPI DSI. This patch fixes this disagreement. Signed-off-by:
Hyungwon Hwang <human.hwang@samsung.com> Acked-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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- Jun 17, 2015
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Thomas Petazzoni authored
Following the merge of "pinctrl: mvebu: armada-xp: rename spi to spi0" by Linus Walleij, we need to adjust the Armada XP Device Tree accordingly, by adjusting the pinctrl configuration for SPI pins. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com>
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- Jun 11, 2015
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Jun Nie authored
Add initial dts file and document for ZX296702 and board ZX296702-AD1. More peripherals will be added later. Signed-off-by:
Jun Nie <jun.nie@linaro.org> Signed-off-by:
Kevin Hilman <khilman@linaro.org>
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Linus Walleij authored
Adjust device tree entry to the proper registered compatible string for LIS3LV02DL. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Kevin Hilman <khilman@linaro.org>
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ludovic.desroches@atmel.com authored
The xdmac channel configuration is done in one cell not two. This error prevents from probing devices correctly. Signed-off-by:
Ludovic Desroches <ludovic.desroches@atmel.com> Fixes: 83906783 ("ARM: at91/dt: sama5d4: add aes, sha and tdes nodes") Cc: stable@vger.kernel.org # 4.1 Acked-by:
Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by:
Kevin Hilman <khilman@linaro.org>
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- Jun 10, 2015
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Maxime Coquelin authored
The STMicrolectornics's STM32F429 MCU has the following main features: - Cortex-M4 core running up to @180MHz - 2MB internal flash, 256KBytes internal RAM - FMC controller to connect SDRAM, NOR and NAND memories - SD/MMC/SDIO support - Ethernet controller - USB OTFG FS & HS controllers - I2C, SPI, CAN busses support - Several 16 & 32 bits general purpose timers - Serial Audio interface - LCD controller Tested-by:
Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by:
Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by:
Kevin Hilman <khilman@linaro.org>
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Dinh Nguyen authored
Update the arria10 gmac nodes with all the necessary properties for ethernet to function on the Arria10 devkit. Signed-off-by:
Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by:
Kevin Hilman <khilman@linaro.org>
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Murali Karicheri authored
k2l netcp range size is 16M (0x1000000) and not 0xffffff. This patch fixes this. Similarly fix the size of switch module register space to 0x20000. Signed-off-by:
Murali Karicheri <m-karicheri2@ti.com> Signed-off-by:
Santosh Shilimkar <ssantosh@kernel.org>
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Murali Karicheri authored
k2e netcp range size is 16M (0x1000000) and not 0xffffff. This patch fixes this. Similarly fix the size of switch module register space to 0x20000. Signed-off-by:
Murali Karicheri <m-karicheri2@ti.com> Signed-off-by:
Santosh Shilimkar <ssantosh@kernel.org>
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Murali Karicheri authored
k2hk netcp range size is 1M (0x100000) and not 0xfffff. This patch fixes this. Signed-off-by:
Murali Karicheri <m-karicheri2@ti.com> Signed-off-by:
Santosh Shilimkar <ssantosh@kernel.org>
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Murali Karicheri authored
This patch enables networking on k2l evm by providing device bindings for netcp, knav, and qmss. See device binding documentation at Documentation/devicetree/bindings/net/keystone-netcp.txt Signed-off-by:
WingMan Kwok <w-kwok2@ti.com> Signed-off-by:
Murali Karicheri <m-karicheri2@ti.com> Signed-off-by:
Santosh Shilimkar <ssantosh@kernel.org>
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Murali Karicheri authored
This patch enables networking on k2e evm by adding device bindings for netcp, knav and qmss. See device binding documentation below for details. Documentation/devicetree/bindings/net/keystone-netcp.txt Signed-off-by:
WingMan Kwok <w-kwok2@ti.com> Signed-off-by:
Murali Karicheri <m-karicheri2@ti.com> Signed-off-by:
Santosh Shilimkar <ssantosh@kernel.org>
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Murali Karicheri authored
This patch enables networking on k2hk evm by adding device bindings for netcp, knav and qmss. See device binding documentation below for details. Documentation/devicetree/bindings/net/keystone-netcp.txt Signed-off-by:
WingMan Kwok <w-kwok2@ti.com> Signed-off-by:
Murali Karicheri <m-karicheri2@ti.com> Signed-off-by:
Santosh Shilimkar <ssantosh@kernel.org>
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- Jun 06, 2015
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Rafał Miłecki authored
Signed-off-by:
Rafał Miłecki <zajec5@gmail.com> Signed-off-by:
Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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Hauke Mehrtens authored
The driver for the PCIe controller was just added, this adds the missing definition of the IRQ numbers to device tree. The driver itself will be automatically detected by bcma. Signed-off-by:
Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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Hauke Mehrtens authored
This adds the NAND flash chip description for a standard chip found connected to this SoC. This makes use of generic Broadcom NAND driver with the iProc interface. Signed-off-by:
Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com>
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- Jun 04, 2015
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Ludovic Desroches authored
Mci0 uses slot 0 not 1. Signed-off-by:
Ludovic Desroches <ludovic.desroches@atmel.com> Fixes: 7a475267 ("ARM: at91: dt: add device tree file for SAMA5D4ek board") Cc: stable@vger.kernel.org Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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Gaël PORTAY authored
The network_red LED uses the 4th PWM device. Signed-off-by:
Gaël PORTAY <g.portay@overkiz.com> Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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Alexandre Belloni authored
Add a minimum Device Tree for Acme Arietta G25. http://acme.systems/arietta Signed-off-by:
Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by:
Sergio Tanzilli <tanzilli@acmesystems.it> Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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