Commits · 3db385ea144daea9c6e1a15f98eacafaec9ad9f1 · jan.koester / Linux · GitLab

Sep 14, 2016
- Merge tag 'clk-v4.9-samsung' of git://linuxtv.org/snawrocki/samsung into clk-next · 3db385ea
  Stephen Boyd authored Sep 14, 2016
  3db385ea
Sep 09, 2016
- clk: rk808: Pass the right pointer as the get_hw context · 7348b6ce
  Tomeu Vizoso authored Sep 09, 2016
  7348b6ce
- clk: samsung: Add support for EPLL on exynos5410 · be95d2c7
  Sylwester Nawrocki authored Sep 09, 2016
  be95d2c7
- clk: samsung: clk-exynos-audss: Whitespace and debug trace cleanup · c17a6163
  Sylwester Nawrocki authored Sep 02, 2016
  c17a6163
- clk: samsung: clk-exynos-audss: Add exynos5410 compatible · 2ec865b7
  Sylwester Nawrocki authored Sep 02, 2016
  2ec865b7
- clk: samsung: clk-exynos-audss: controller variant handling rework · 7c3ca061
  Sylwester Nawrocki authored Sep 02, 2016
  7c3ca061
- clk: samsung: Use common registration function for pll2550x · 1d9aa64c
  Sylwester Nawrocki authored Aug 18, 2016
  1d9aa64c
- clk: samsung: exynos5410: Expose the peripheral DMA gate clocks · 0299042d
  Sylwester Nawrocki authored Aug 22, 2016
  0299042d
- clk: samsung: exynos5420: Add clocks for CMU_CDREX domain · e867e8fa
  Chanwoo Choi authored Aug 25, 2016
  e867e8fa
- clk: samsung: exynos5410: Use samsung_cmu_register_one() to simplify code · ba9d05d9
  Chanwoo Choi authored Aug 22, 2016
  ba9d05d9
- clk: samsung: exynos5260: Move struct samsung_cmu_info to init section · 7a23fa0c
  Chanwoo Choi authored Aug 22, 2016
  7a23fa0c
- MAINTAINERS: Add myself as Samsung SoC clock drivers co-maintainer · 490583f0
  Chanwoo Choi authored Aug 18, 2016
  490583f0
- clk: samsung: exynos5410: Add clock IDs for PDMA and EPLL clocks · 58d6506f
  Sylwester Nawrocki authored Aug 22, 2016
  58d6506f
- clk: samsung: Add clock IDs for the CMU_CDREX (DRAM Express Controller) · 3b6b7172
  Chanwoo Choi authored Aug 25, 2016
  3b6b7172
Sep 08, 2016
- Merge branch 'clk-fixes' into clk-next · a063c1e1
  Stephen Boyd authored Sep 08, 2016
  a063c1e1
- Merge tag 'sunxi-clk-fixes-for-4.8' of... · e4abe2b9
  Stephen Boyd authored Sep 08, 2016
  e4abe2b9
Sep 07, 2016
- clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent · 67615c58
  Eric Anholt authored Jun 01, 2016
  67615c58
- clk: bcm2835: Mark the CM SDRAM clock's parent as critical · 9e400c5c
  Eric Anholt authored Jun 01, 2016
  9e400c5c
- clk: bcm2835: Mark GPIO clocks enabled at boot as critical · eddcbe83
  Eric Anholt authored Jun 01, 2016
  eddcbe83
- clk: bcm2835: Mark the VPU clock as critical · e69fdcca
  Eric Anholt authored Jun 01, 2016
  e69fdcca
- Merge tag 'v4.9-rockchip-clk1' of... · 9bb87c02
  Stephen Boyd authored Sep 06, 2016
  9bb87c02
- MAINTAINERS: Add section for Renesas clock drivers · fedc81e7
  Geert Uytterhoeven authored Aug 31, 2016
  fedc81e7
Sep 04, 2016
- clk: rockchip: use the dclk_vop_frac clock ids on rk3399 · 7b0f9e35
  Yakir Yang authored Sep 01, 2016
  7b0f9e35
- clk: rockchip: drop CLK_SET_RATE_PARENT from rk3399 fractional dividers · 29edeccb
  Douglas Anderson authored Sep 01, 2016
  29edeccb
- clk: rockchip: add 2016M to big cpu clk rate table on rk3399 · fd75b345
  Shunqian Zheng authored Sep 01, 2016
  fd75b345
- clk: rockchip: add rk3399 ddr clock support · 464b9eeb
  Lin Huang authored Aug 22, 2016
  464b9eeb
- Merge branch 'v4.9-shared/clkids' into v4.9-clk/next · 9750217d
  Heiko Stuebner authored Sep 04, 2016
  
  9750217d
- clk: rockchip: add dclk_vop_frac ids for rk3399 vop · e33075db
  Yakir Yang authored Sep 01, 2016
  e33075db
Sep 03, 2016
- Merge branch 'clk-meson-gxbb' into clk-next · e918a18d
  Michael Turquette authored Sep 02, 2016
  
  e918a18d
Sep 02, 2016
- clk: meson-gxbb: Export PWM related clocks for DT · 19a2a85d
  Neil Armstrong authored Aug 22, 2016
  19a2a85d
- meson: clk: Add support for clock gates · e31a1900
  Alexander Müller authored Aug 27, 2016
  e31a1900
- gxbb: clk: Adjust MESON_GATE macro to be shared with meson8b · 7ba64d82
  Alexander Müller authored Aug 27, 2016
  7ba64d82
- clk: meson: Copy meson8b CLKID defines to private header file · 0f32e64b
  Alexander Müller authored Aug 27, 2016
  0f32e64b
- meson: clk: Rename register names according to Amlogic datasheet · e0818a39
  Alexander Müller authored Aug 27, 2016
  e0818a39
- meson: clk: Move register definitions to meson8b.h · d0c175da
  Alexander Müller authored Aug 27, 2016
  d0c175da
- clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention · 23353817
  Alexander Müller authored Aug 27, 2016
  23353817
- Merge remote-tracking branch 'clk/clk-meson-gxbb-ao' into clk-meson-gxbb · 1bf13f48
  Michael Turquette authored Sep 01, 2016
  
  1bf13f48
Sep 01, 2016
- clk: rockchip: add new clock-type for the ddrclk · a4f182bf
  Lin Huang authored Aug 22, 2016
  a4f182bf
- Merge branch 'v4.9-shared/sip-hdr' into v4.9-clk/next · 06b826fc
  Heiko Stuebner authored Sep 01, 2016
  
  06b826fc
Aug 31, 2016
- soc: rockchip: add header for ddr rate SIP interface · 97dd8268
  Lin Huang authored Aug 22, 2016
  97dd8268