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  1. Feb 09, 2016
  2. Feb 04, 2016
    • Linus Walleij's avatar
      ARM: nomadik: fix up SD/MMC DT settings · 418d5516
      Linus Walleij authored
      
      
      The DTSI file for the Nomadik does not properly specify how the
      PL180 levelshifter is connected: the Nomadik actually needs all
      the five st,sig-dir-* flags set to properly control all lines out.
      
      Further this board supports full power cycling of the card, and
      since this variant has no hardware clock gating, it needs a
      ridiculously low frequency setting to keep up with the ever
      overflowing FIFO.
      
      The pin configuration set-up is a bit of a mystery, because of
      course these pins are a mix of inputs and outputs. However the
      reference implementation sets all pins to "output" with
      unspecified initial value, so let's do that here as well.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      Acked-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
      418d5516
  3. Jan 27, 2016
  4. Jan 26, 2016
  5. Jan 25, 2016
  6. Jan 21, 2016
  7. Jan 18, 2016
  8. Jan 15, 2016
  9. Jan 11, 2016
    • Tony Lindgren's avatar
      ARM: dts: Fix omap5 PMIC control lines for RTC writes · af756bbc
      Tony Lindgren authored
      
      
      The palmas PMIC has two control lines that need to be muxed properly
      for things to work. The sys_nirq pin is used for interrupts, and msecure
      pin is used for enabling writes to some PMIC registers.
      
      Without these pins configured properly things can fail in mysterious
      ways. For example, we can't update the RTC registers on palmas PMIC
      unless the msecure pin is configured. And this is probably the reason
      why we had RTC missing from the omap5 dts file.
      
      According to "OMAP5430 ES2.0 Data Manual [Public] VErsion A (Rev. F)"
      swps052f.pdf, mux mode 1 is for sys_drm_msecure so in theory there's
      should be no need to configure it as a GPIO pin.
      
      However, it seems there are some reliability issues using the msecure
      mux mode. And the TI trees configure the msecure pin as GPIO out high
      instead.
      
      As the PMIC only cares that the msecure line is high to allow access
      to the RTC registers, let's use a GPIO hog as suggested by Nishanth
      Menon <nm@ti.com>. Also the use of the internal pull was considered
      but supposedly that may not be capable of keeping the line high in
      a noisy environment.
      
      If we ever see high security omap5 products in the mainline tree,
      those need to skip the msecure pin muxing and ignore setting the GPIO
      hog. Chances are the related pin mux registers are locked in that case
      and the msecure pin is managed by whatever software may be running in
      the ARM TrustZone.
      
      Who knows what the original intention of the msecure pin was. Maybe
      it was supposed to prevent the system time to be set back for some
      game demo modes to time out? Anyways, it seems that later PMICs like
      tps659037 have recycled this pin for "powerhold" and devices like
      beagle-x15 do not need changes to the msecure pin configuration.
      
      To avoid further confusion with TWL variant PMICs, beagle-x15 does
      not have a back-up battery for RTC palmas. Instead the mcp79410 RTC
      is used with rtc-ds1307 driver. There is a "powerhold" jumper j5
      holes near the palmas PMIC, and shorting it seems to power up
      beagle-x15 automatically. It is unknown if it also has other side
      effects to the beagle-x15 power up sequence.
      
      Cc: stable@vger.kernel.org # v4.4
      Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      af756bbc
    • Stanimir Varbanov's avatar
      ARM: dts: ifc6410: enable PCIe DT node for this board · 668f4729
      Stanimir Varbanov authored
      
      
      Enable PCIe DT node and fill PCIe DT node with regulator, pinctrl and reset
      GPIO, to use the PCIe on the ifc6410 board.
      
      Signed-off-by: default avatarStanimir Varbanov <stanimir.varbanov@linaro.org>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      668f4729
    • Stanimir Varbanov's avatar
      ARM: dts: apq8064: add PCIe devicetree node · bcc74b09
      Stanimir Varbanov authored
      
      
      Add the PCIe DT node so that it can probe and be used.
      
      Signed-off-by: default avatarStanimir Varbanov <stanimir.varbanov@linaro.org>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      bcc74b09
  10. Jan 08, 2016
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