- Apr 22, 2013
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Terje Bergstrom authored
Make drm part of host1x driver. Signed-off-by:
Arto Merilainen <amerilainen@nvidia.com> Signed-off-by:
Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by:
Thierry Reding <thierry.reding@avionic-design.de> Tested-by:
Thierry Reding <thierry.reding@avionic-design.de> Tested-by:
Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by:
Thierry Reding <thierry.reding@avionic-design.de>
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Terje Bergstrom authored
Add support for host1x debugging. Adds debugfs entries, and dumps channel state to UART in case of stuck job. Signed-off-by:
Arto Merilainen <amerilainen@nvidia.com> Signed-off-by:
Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by:
Thierry Reding <thierry.reding@avionic-design.de> Tested-by:
Thierry Reding <thierry.reding@avionic-design.de> Tested-by:
Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by:
Thierry Reding <thierry.reding@avionic-design.de>
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Terje Bergstrom authored
Add support for host1x client modules, and host1x channels to submit work to the clients. Signed-off-by:
Arto Merilainen <amerilainen@nvidia.com> Signed-off-by:
Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by:
Thierry Reding <thierry.reding@avionic-design.de> Tested-by:
Thierry Reding <thierry.reding@avionic-design.de> Tested-by:
Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by:
Thierry Reding <thierry.reding@avionic-design.de>
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Terje Bergstrom authored
Add support for sync point interrupts, and sync point wait. Sync point wait used interrupts for unblocking wait. Signed-off-by:
Arto Merilainen <amerilainen@nvidia.com> Signed-off-by:
Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by:
Thierry Reding <thierry.reding@avionic-design.de> Tested-by:
Thierry Reding <thierry.reding@avionic-design.de> Tested-by:
Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by:
Thierry Reding <thierry.reding@avionic-design.de>
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Terje Bergstrom authored
Add host1x, the driver for host1x and its client unit 2D. The Tegra host1x module is the DMA engine for register access to Tegra's graphics- and multimedia-related modules. The modules served by host1x are referred to as clients. host1x includes some other functionality, such as synchronization. Signed-off-by:
Arto Merilainen <amerilainen@nvidia.com> Signed-off-by:
Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by:
Thierry Reding <thierry.reding@avionic-design.de> Tested-by:
Thierry Reding <thierry.reding@avionic-design.de> Tested-by:
Erik Faye-Lund <kusmabite@gmail.com> Signed-off-by:
Thierry Reding <thierry.reding@avionic-design.de>
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- Apr 18, 2013
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Dave Airlie authored
Reported-by: Randy Dunlap Signed-off-by:
Dave Airlie <airlied@redhat.com>
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- Apr 16, 2013
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Jerome Glisse authored
This is slightly cleaned up version of Jerome's patch. There seems to be an issue tracking the last flush of the VM which results in hangs in certain cases when VM is used. For now just flush the VM for every IB. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=62959 https://bugs.freedesktop.org/show_bug.cgi?id=62997 Signed-off-by:
Jerome Glisse <jglisse@redhat.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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Alex Deucher authored
PTE/PDE doesn't support a single update (count = 1). We had previously disabled it since it we were hitting that case which let to hangs. The PTE/PDE packet is much more efficient for VM updates where it can be used. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Dave Airlie authored
drivers/gpu/drm/qxl/qxl_display.c:99 qxl_alloc_client_monitors_config() error: dereferencing freed memory 'qdev->client_monitors_config' drivers/gpu/drm/qxl/qxl_object.c:66 qxl_ttm_placement_from_domain() warn: bitwise AND condition is false here drivers/gpu/drm/qxl/qxl_ioctl.c:353 qxl_clientcap_ioctl() warn: buffer overflow 'qdev->rom->client_capabilities' 58 <= 58 Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
/usr/lib/gcc/x86_64-linux-gnu/4.7/include/stddef.h:414:9: sparse: preprocessor token offsetof redefined include/linux/stddef.h:17:9: this was the original definition >> drivers/gpu/drm/qxl/qxl_drv.c:49:5: sparse: symbol 'qxl_modeset' was not declared. Should it be static? Reported-by: kbuild test robot. Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Chris Wilson authored
Userspace is free to pass in any command bits it feels like through the ioctl cmd, and for example trinity likes to fuzz those bits to create conflicting commands. So instead of relying upon userspace to pass along the correct IN/OUT flags for the ioctl, use the flags as expected by the kernel. This does have a side-effect that NULL pointers can not be substituted by userspace in place of a struct. This feature was not being used by any driver, but instead exposed all of the command handlers to a user triggerable OOPS. Reported-by:
Tommi Rantala <tt.rantala@gmail.com> Link: http://lkml.kernel.org/r/CA+ydwtpuBvbwxbt-tdgPUvj1EU7itmCHo_2B3w13HkD5+jWKow@mail.gmail.com Signed-off-by:
Tommi Rantala <tt.rantala@gmail.com> Signed-off-by:
Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Libin authored
(*->vm_end - *->vm_start) >> PAGE_SHIFT operation is implemented as a inline funcion vma_pages() in linux/mm.h, so using it. Signed-off-by:
Libin <huawei.libin@huawei.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Laurent Pinchart authored
Property blob objects need to be destroyed when cleaning up to avoid memory leaks. Go through the list of all blobs in the drm_mode_config_cleanup() function and destroy them. The drm_mode_config_cleanup() function needs to be moved after the drm_property_destroy_blob() declaration. Move drm_mode_config_init() as well to keep the functions together. Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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- Apr 15, 2013
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Patrik Jakobsson authored
This makes it easier to see what's going on during resume/restore. Signed-off-by:
Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
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Patrik Jakobsson authored
This patch fixes a bug introduced by: commit 749387dc Author: Patrik Jakobsson <patrik.r.jakobsson@gmail.com> Date: Sun Apr 7 16:35:50 2013 +0200 drm/gma500: Fix hibernation problems on sdvo encoders The bug is triggered when we do a mode set on a sdvo encoder with all connectors in the disconnected state. A crtc is considered enabled by drm even though all of its connectors are disconnected. Work around this by adding a check in our sdvo restore function. Also remove the unneeded dpms on. Prepare and Commit will take care of that. Signed-off-by:
Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
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Alex Deucher authored
If we fail to map the mmio BAR, skip driver tear down that requires mmio. Should fix: https://bugzilla.kernel.org/show_bug.cgi?id=56541 Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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Alex Deucher authored
Avoids potential interrupt storms when the display is disabled. May fix: https://bugzilla.kernel.org/show_bug.cgi?id=56041 Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- Apr 12, 2013
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Archit Taneja authored
drm_framebuffer_lookup() does a kref_get() for the framebuffer if it finds one corresponding to the fb id passed to it. Use drm_framebuffer_reference() instead for clarity since it's the function used in other places to take a reference. Signed-off-by:
Archit Taneja <archit@ti.com> Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Christopher Harvey authored
Signed-off-by:
Christopher Harvey <charvey@matrox.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Christopher Harvey authored
Signed-off-by:
Christopher Harvey <charvey@matrox.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Carsten Emde authored
The 1600x1200 (UXGA) screen resolution was lacking in the set of built-in selectable EDID screen resolutions that can be used to repair misbehaving monitor firmware. This patch adds the related data set and expands the documentation. Signed-off-by:
Carsten Emde <C.Emde@osadl.org> Acked-by:
Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Thierry Reding authored
In order to make it easier to port the code to other operating systems (like the BSDs), relicense the HDMI helpers under the more permissive MIT license. Signed-off-by:
Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
QXL is a paravirtual graphics device used by the Spice virtual desktop interface. The drivers uses GEM and TTM to manage memory, the qxl hw fencing however is quite different than normal TTM expects, we have to keep track of a number of non-linear fence ids per bo that we need to have released by the hardware. The releases are freed from a workqueue that wakes up and processes the release ring. releases are suballocated from a BO, there are 3 release categories, drawables, surfaces and cursor cmds. The hw also has 3 rings for commands, cursor and release handling. The hardware also have a surface id tracking mechnaism and the driver encapsulates it completely inside the kernel, userspace never sees the actual hw surface ids. This requires a newer version of the QXL userspace driver, so shouldn't be enabled until that has been placed into your distro of choice. Authors: Dave Airlie, Alon Levy v1.1: fixup some issues in the ioctl interface with padding v1.2: add module device table v1.3: fix nomodeset, fbcon leak, dumb bo create, release ring irq, don't try flush release ring (broken hw), fix -modesetting. v1.4: fbcon cpu usage reduction + suitable accel flags. Signed-off-by:
Alon Levy <alevy@redhat.com> Signed-off-by:
Dave Airlie <airlied@redhat.com>
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Dave Airlie authored
qxl wants to use io mapping like i915 gem does, for now just export the symbols so the driver can implement atomic page maps using io mapping. Signed-off-by:
Dave Airlie <airlied@redhat.com>
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- Apr 11, 2013
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Jerome Glisse authored
Allow userspace to query for the tile mode array so userspace can properly compute surface pitch and alignment requirement depending on tiling. v2: Make strict aliasing safer by casting to char when copying v3: merge fix from Christian Signed-off-by:
Jerome Glisse <jglisse@redhat.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
Add new ioctl option and bumb minor version number. Signed-off-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Jerome Glisse <jglisse@redhat.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
If the disabled rb mask register is not properly initialized program a sane default based on the number of RBs for the asic. This avoids a potential divide by 0 when calculating the backend mask. Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Tomi Valkeinen authored
Some static structs are not marked as static. Add it. Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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Archit Taneja authored
The omapdrm driver currently takes a config/module arg to figure out the number of crtcs it needs to create. We could create as many crtcs as there are overlay managers in the DSS hardware, but we don't do that because each crtc eats up one DSS overlay, and that reduces the number of planes we can attach to a single crtc. Since the number of crtcs may be lesser than the number of hardware overlay managers, we need to figure out which overlay managers to use for our crtcs. The current approach is to use pipe2chan(), which returns a higher numbered manager for the crtc. The problem with this approach is that it assumes that the overlay managers we choose will connect to the encoders the platform's panels are going to use, this isn't true, an overlay manager connects only to a few outputs/encoders, and choosing any overlay manager for our crtc might lead to a situation where the encoder cannot connect to any of the crtcs we have chosen. For example, an omap5-panda board has just one hdmi output. If num_crtc is set to 1, with the current approach, pipe2chan will pick up the LCD2 overlay manager, which cannot connect to the hdmi encoder at all. The only manager that could have connected to hdmi was the TV overlay manager. Therefore, there is a need to choose our overlay managers keeping in mind the panels we have on that platform. The new approach iterates through all the available panels, creates encoders and connectors for them, and then tries to get a suitable overlay manager to create a crtc which can connect to the encoders. We use the dispc_channel field in omap_dss_output to retrieve the desired overlay manager's channel number, we then check whether the manager had already been assigned to a crtc or not. If it was already assigned to a crtc, we assume that out of all the encoders which intend use this crtc, only one will run at a time. If the overlay manager wan't assigned to a crtc till then, we create a new crtc and link it with the overlay manager. This approach just looks for the best dispc_channel for each encoder. On DSS HW, some encoders can connect to multiple overlay managers. Since we don't try looking for alternate overlay managers, there is a greater possibility that 2 or more encoders end up asking for the same crtc, causing only one encoder to run at a time. Also, this approach isn't the most optimal one, it can do either good or bad depending on the sequence in which the panels/outputs are parsed. The optimal way would be some sort of back tracking approach, where we improve the set of managers we use as we iterate through the list of panels/encoders. That's something left for later. Signed-off-by:
Archit Taneja <archit@ti.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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Archit Taneja authored
When userspace calls SET_PLANE ioctl, drm core takes a reference of the fb and passes control to the update_plane op defined by the drm driver. In omapdrm, we have a worker thread which queues framebuffers objects received from update_plane and displays them at the appropriate time. It is possible that the framebuffer is destoryed by userspace between the time of calling the ioctl and apply-worker being scheduled. If this happens, the apply-worker holds a pointer to a framebuffer which is already destroyed. Take an extra refernece/unreference of the fb in omap_plane_update() to prevent this from happening. A reference is taken of the fb passed to update_plane(), the previous framebuffer (held by plane->fb) is unreferenced. This will prevent drm from destroying the framebuffer till the time it's unreferenced by the apply-worker. This is in addition to the exisitng reference/unreference in update_pin(), which is taken for the scanout of the plane's current framebuffer, and an unreference the previous framebuffer. Signed-off-by:
Archit Taneja <archit@ti.com> Reviewed-by:
Rob Clark <robdclark@gmail.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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Archit Taneja authored
The omapdrm driver requires omapdss panel drivers to expose ops like detect, set_timings and check_timings. These can be NULL for fixed panel DPI, DBI, DSI and SDI drivers. At some places, there are no checks to see if the panel driver has these ops or not, and that leads to a crash. The following things are done to make fixed panels work: - The omap_connector's detect function is modified such that it considers panel types which are generally fixed panels as always connected(provided the panel driver doesn't have a detect op). Hence, the connector corresponding to these panels is always in a 'connected' state. - If a panel driver doesn't have a check_timings op, assume that it supports the mode passed to omap_connector_mode_valid(the 'mode_valid' drm helper function) - The function omap_encoder_update shouldn't really do anything for fixed resolution panels, make sure that it calls set_timings only if the panel driver has one. Signed-off-by:
Archit Taneja <archit@ti.com> Reviewed-by:
Rob Clark <robdclark@gmail.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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Archit Taneja authored
modeset_init iterates through all the registered omapdss devices and has some initial checks to see if the panel has a driver and the required driver ops for it to be usable by omapdrm. The function bails out from modeset_init if a panel doesn't meet the requirements, and stops the registration of the future panels and encoders which come after it, that isn't the correct thing to do, we should go through the rest of the panels. Replace the 'return's with 'continue's. Signed-off-by:
Archit Taneja <archit@ti.com> Reviewed-by:
Rob Clark <robdclark@gmail.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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Tomi Valkeinen authored
When not using DSI PLL to generate the pixel clock, but DSS FCK, the possible pixel clock rates are rather limited. DSS FCK is currently used on OMAP2 and OMAP3. When using Beagleboard with a monitor that supports high resolutions, the clock rates do not match (at least for me) for the monitor's pixel clocks within the current threshold in the code, which is +/- 1MHz. This patch widens the search up to +/- 15MHz. The search is done in steps, i.e. it first tries to find a rather exact clock, than a bit less exact, etc. so this should not change the cases where a clock was already found. Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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Tomi Valkeinen authored
DSS func clock is calculated with prate / div * m. However, the current omapdss code calculates it with prate * m / div, which yields a slightly different result when there's a remainder. For example, 432000000 / 14 * 2 = 61714284, but 432000000 * 2 / 14 = 61714285. In addition to that, the clock framework wants the clock rate given with clk_set_rate to be higher than the actual (truncated) end result. So, if prate is 432000000, and div is 14, the real result is 30857142.8571... We need to call clk_set_rate with 30857143, which gives us a clock of 30857142. That's why we need to use DIV_ROUND_UP() when calling clk_set_rate. This patch fixes the clock calculation. Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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- Apr 10, 2013
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Xiong Zhou authored
Last version of this patch is not clear enough and X86 duplicated. This patch fixes build failure of v3.9-rc5 and rc6. When config ACPI_VIDEO as m, DRM_GMA500 as y, here comes the failure. GMA5/600 needs acpi_video just like nouveau. And some tab type fix by the way. Failure message: drivers/built-in.o: In function `psb_driver_load': kernel-3.9-rc5/drivers/gpu/drm/gma500/psb_drv.c:340: \ undefined reference to `acpi_video_register' make: *** [vmlinux] Error 1 Signed-off-by:
Xiong Zhou <jencce.kernel@gmail.com> Signed-off-by:
Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
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Archit Taneja authored
Use devm_clk_get() instead of clk_get() for dss, and for outputs hdmi and venc. This reduces code and simplifies error handling. Signed-off-by:
Archit Taneja <archit@ti.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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Lars-Peter Clausen authored
Use dev_pm_ops instead of the deprecated legacy suspend/resume callbacks. Signed-off-by:
Lars-Peter Clausen <lars@metafoo.de> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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Archit Taneja authored
DISPC on OMAP5 has a more optimised mechanism of asserting Mstandby to achieve more power savings when DISPC is configured in Smart Standby mode. This mechanism leads to underflows when multiple DISPC pipes are enabled. There is a register field which can let us revert to the older mechanism of asserting Mstandby. Configure this field to prevent underflows. Signed-off-by:
Archit Taneja <archit@ti.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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Archit Taneja authored
When using a DISPC video pipeline to a fetch a NV12 buffer in a 2D container, we need to set set a doublestride bit in the video pipe's ATTRIBUTES register. This is needed because the stride for the UV plane(using a 16 bit Tiler container) is double the stride for the Y plane(using a 8 bit Tiler container) for the 0 or 180 degree views. The ROW_INC register is meant for the Y plane, and the HW will calculate the row increment needed for the UV plane by using double the stride value based on whether this bit is set or not. Set the bit when we are using a 2D Tiler buffer and when rotation is 0 or 180 degrees. The stride value is the same for 90 and 270 degree Tiler views, hence the bit shouldn't be set. Signed-off-by:
Archit Taneja <archit@ti.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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Archit Taneja authored
Increase the DSS_FCLK and DSI_FCLK max supported frequencies, these come because some frequencies were increased from OMAP5 ES1 to OMAP5 ES2. We support only OMAP5 ES2 in the kernel, so replace the ES1 values with ES2 values. Increase the DSI PLL Fint range, this was previously just copied from the OMAP4 param range struct. Fix the maximum DSS_FCLK on OMAP2, it's 133 Mhz according to the TRM. Signed-off-by:
Archit Taneja <archit@ti.com> Signed-off-by:
Tomi Valkeinen <tomi.valkeinen@ti.com>
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