Commits · 44327236c3bfb83e3b4ce36e2a0d61569bb19330 · jan.koester / Linux · GitLab

Jan 23, 2014
- MIPS: sead3: allow cmdline/env to change memory size using memsize param · 44327236
  Qais Yousef authored Dec 06, 2013
  44327236
- MIPS: BCM63XX: use linux/serial_bcm63xx.h · e95acd3d
  Florian Fainelli authored Dec 05, 2013
  e95acd3d
- tty: serial: bcm63xx_uart: use linux/serial_bcm63xx.h · d29e0d04
  Florian Fainelli authored Dec 05, 2013
  d29e0d04
- MIPS: BCM63XX: move UART register definitions · 74e200c7
  Florian Fainelli authored Dec 05, 2013
  74e200c7
- tty: serial: bcm63xx_uart: drop bcm_{readl,writel} macros · 99cf9790
  Florian Fainelli authored Dec 05, 2013
  99cf9790
- tty: serial: bcm63xx_uart: remove unused inclusion · c8fb5a27
  Florian Fainelli authored Dec 05, 2013
  c8fb5a27
- MIPS: microMIPS: Remove unsupported compiler flag. · 40508d24
  Steven J. Hill authored Dec 05, 2013
  40508d24
- MIPS: OCTEON: Supply OCTEON+ USB nodes in internal device trees. · d617f9e9
  David Daney authored Dec 03, 2013
  d617f9e9
- MIPS: Malta: use generic 8250 early console · 23a91de4
  Paul Burton authored Dec 02, 2013
  23a91de4
- MIPS: Malta: mux & enable SERIRQ interrupt · ae0d7cbc
  Paul Burton authored Dec 02, 2013
  ae0d7cbc
- MIPS: Malta: initialise the RTC at boot · a87ea88d
  Paul Burton authored Dec 02, 2013
  a87ea88d
- MIPS: sead3: remove unused cpu_khz variable · 9fbf59cf
  Paul Burton authored Nov 29, 2013
  9fbf59cf
- MIPS: Malta: remove unused cpu_khz variable · 28a623b9
  Paul Burton authored Nov 29, 2013
  28a623b9
- MIPS: cavium-octeon: export symbols needed by octeon-ethernet · ce4126cb
  Aaro Koskinen authored Nov 28, 2013
  ce4126cb
- MIPS: Fix build error seen in some configurations · 63238f2c
  Guenter Roeck authored Nov 25, 2013
  63238f2c
- MIPS: cavium-octeon: fix early boot hang on EBH5600 board · b2e4f156
  Aaro Koskinen authored Nov 01, 2013
  b2e4f156
- MIPS: cavium-octeon: fix out-of-bounds array access · 8b75e770
  Aaro Koskinen authored Nov 01, 2013
  8b75e770
- MIPS: JZ4740: reuse UART0 address macro for vmlinuz debug port · 59197e44
  Antony Pavlov authored Sep 28, 2013
  59197e44
Jan 22, 2014
- MIPS: improve checks for noncoherent DMA · 885014bc
  Felix Fietkau authored Sep 27, 2013
  885014bc
- MIPS: APRP: Code formatting clean-ups. · 5792bf64
  Steven J. Hill authored Jan 01, 2014
  5792bf64
- MIPS: APRP: Add support for Malta CMP platform. · 1336113a
  Dengcheng Zhu authored Oct 30, 2013
  1336113a
- MIPS: APRP: Add RTLX API support for CMP platforms. · da615cf6
  Dengcheng Zhu authored Jan 01, 2014
  da615cf6
- MIPS: APRP: Split RTLX support into separate files. · 2c973ef0
  Dengcheng Zhu authored Jan 01, 2014
  2c973ef0
- MIPS: APRP: Add VPE loader support for CMP platforms. · 17a1d523
  Dengcheng Zhu authored Oct 30, 2013
  17a1d523
- MIPS: APRP: Split VPE loader into separate files. · 1a2a6d7e
  Dengcheng Zhu authored Oct 30, 2013
  1a2a6d7e
- MIPS: Clean up MIPS MT and CMP configuration options. · c080faa5
  Steven J. Hill authored Oct 04, 2013
  c080faa5
- MIPS: kernel: cpu-probe: Add support for probing interAptiv cores · b5f065e7
  Leonid Yegoshin authored Nov 20, 2013
  b5f065e7
- MIPS: Add support for interAptiv cores · 26ab96df
  Leonid Yegoshin authored Nov 27, 2013
  26ab96df
- MIPS: Add processor identifiers for the interAptiv processors · 0ce7d58e
  Leonid Yegoshin authored Nov 20, 2013
  0ce7d58e
- MIPS: Add debugfs file to print the segmentation control registers · 29f9087c
  Steven J. Hill authored Nov 14, 2013
  29f9087c
- MIPS: Add support for FTLBs · 75b5b5e0
  Leonid Yegoshin authored Nov 14, 2013
  75b5b5e0
- MIPS: mm: Use the TLBINVF instruction to flush the VTLB · 601cfa7b
  Leonid Yegoshin authored Nov 14, 2013
  601cfa7b
- MIPS: Add function for flushing the TLB using the TLBINV instruction · 198bb4ce
  Leonid Yegoshin authored Nov 14, 2013
  198bb4ce
- MIPS: kernel: cpu-probe: Add support for probing proAptiv cores · b0d4d300
  Leonid Yegoshin authored Nov 14, 2013
  b0d4d300
- MIPS: Add support for the proAptiv cores · 708ac4b8
  Leonid Yegoshin authored Nov 14, 2013
  708ac4b8
- MIPS: Add processor identifiers for the proAptiv processors · 76f59e32
  Leonid Yegoshin authored Nov 14, 2013
  76f59e32
- MIPS: tlb: Set the EHINV bit for TLBINVF cores when invalidating the TLB · 6e7f8b8e
  Leonid Yegoshin authored Nov 14, 2013
  6e7f8b8e
- MIPS: features: Add initial support for Segmentation Control registers · 4a0156fb
  Steven J. Hill authored Nov 14, 2013
  4a0156fb
- MIPS: features: Add initial support for TLBINVF capable cores · 1745c1ef
  Leonid Yegoshin authored Nov 14, 2013
  1745c1ef
- MIPS: mm: Move UNIQUE_ENTRYHI macro to a header file · c01905ee
  Markos Chandras authored Nov 14, 2013
  c01905ee