- Jul 22, 2009
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Peter Zijlstra authored
Fix a gcc unused variables warning. Signed-off-by:Peter Zijlstra <a.p.zijlstra@chello.nl>
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- Jul 20, 2009
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Sonic Zhang authored
The Blackfin serial headers were inverting the CTS value leading to wrong handling of the CTS line which broke CTS/RTS handling completely. Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org> Signed-off-by:
Alan Cox <alan@linux.intel.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jul 18, 2009
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Russell King authored
Fix i2c_board_info definitions - we were defining the 'type' field of these structures twice since the first argument of I2C_BOARD_INFO sets this field. Move the second definition into I2C_BOARD_INFO(). Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk> Acked-by:
Jean Delvare <khali@linux-fr.org> Acked-by:
Ben Dooks <ben-linux@fluff.org>
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- Jul 17, 2009
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Tim Abbott authored
The BSS section macros in vmlinux.lds.h currently place the .sbss input section outside the bounds of [__bss_start, __bss_end]. On all architectures except for microblaze that handle both .sbss and __bss_start/__bss_end, this is wrong: the .sbss input section is within the range [__bss_start, __bss_end]. Relatedly, the example code at the top of the file actually has __bss_start/__bss_end defined twice; I believe the right fix here is to define them in the BSS_SECTION macro but not in the BSS macro. Another problem with the current macros is that several architectures have an ALIGN(4) or some other small number just before __bss_stop in their linker scripts. The BSS_SECTION macro currently hardcodes this to 4; while it should really be an argument. It also ignores its sbss_align argument; fix that. mn10300 is the only user at present of any of the macros touched by this patch. It looks like mn10300 actually was incorrectly converted to use the new BSS() macro (the alignment of 4 prior to conversion was a __bss_stop alignment, but the argument to the BSS macro is a start alignment). So fix this as well. I'd like acks from Sam and David on this one. Also CCing Paul, since he has a patch from me which will need to be updated to use BSS_SECTION(0, PAGE_SIZE, 4) once this gets merged. Signed-off-by:
Tim Abbott <tabbott@ksplice.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: David Howells <dhowells@redhat.com> Signed-off-by:
Sam Ravnborg <sam@ravnborg.org>
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Aurelien Jarno authored
asm/fpu.h uses the __IA64_UL macro which is declared in asm/types.h, so this include is really required. Without it, GNU libc fails to build. This reverts commit 2678c07b. Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net> Acked-by:
Fenghua Yu <fenghua.yu@intel.com>
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fujita authored
The commit 99162195 was supposed to add CONFIG_DMA_API_DEBUG support to IA64 however I forgot to add dma_debug_init(). Signed-off-by:
fujita <fujita@tulip.osrg.net> Acked-by:
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Fenghua Yu authored
When building ia64 kernel with CONFIG_XEN_SYS_HYPERVISOR, compiler reports errors: drivers/xen/sys-hypervisor.c: In function ‘uuid_show’: drivers/xen/sys-hypervisor.c:125: error: implicit declaration of function ‘IS_ERR’ drivers/xen/sys-hypervisor.c:126: error: implicit declaration of function ‘PTR_ERR’ This patch fixes the errors. Signed-off-by:
Isaku Yamahata <yamahata@valinux.co.jp>
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Linus Walleij authored
Removed the LBD support that isn't of any use right now at least, then remove remnants of the TCM config flags that somehow crept in by mistake (not yet merged patch for 2.6.32) and then the usual defconfig noise from updated menus. Signed-off-by:
Linus Walleij <linus.walleij@stericsson.com> Signed-off-by:
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Rusty Russell authored
Avoid the following: [ 0.012093] WARNING: at arch/x86/kernel/apic/apic.c:249 native_apic_write_dummy+0x2f/0x40() Rather than chase each new cpuid-detected feature, just lie about the highest valid CPUID so this code is never run. Signed-off-by:Rusty Russell <rusty@rustcorp.com.au>
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Matias Zabaljauregui authored
fix: "make Guest" was complaining about duplicated G:032 Signed-off-by:
Matias Zabaljauregui <zabaljauregui@gmail.com> Signed-off-by:
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- Jul 16, 2009
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Mike Frysinger authored
The default values of HARDIRQ_BITS and PREEMPT_BITS in common code leads to build failure: In file included from include/linux/interrupt.h:12, from include/linux/kernel_stat.h:8, from arch/blackfin/kernel/asm-offsets.c:32: include/linux/hardirq.h:66:2: error: #error PREEMPT_ACTIVE is too low! So until that gets resolved, just declare our own default value again. Signed-off-by: -
Julia Lawall authored
Check that the result of kmalloc is not NULL before passing it to other functions. In the first two cases, the new code returns -ENOMEM, which seems compatible with what is done for similar functions for other architectures. In the last two cases, the new code fails silently, ie just returns, because the function has void return type. The semantic match that finds this problem is as follows: (http://www.emn.fr/x-info/coccinelle/ ) // <smpl> @@ expression *x; identifier f; constant char *C; @@ x = \(kmalloc\|kcalloc\|kzalloc\)(...); ... when != x == NULL when != x != NULL when != (x || ...) ( kfree(x) | f(...,C,...,x,...) | *f(...,x,...) | *x->f ) // </smpl> Signed-off-by:
Julia Lawall <julia@diku.dk> Signed-off-by:
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Graf Yang authored
The Blackfin SMP port was missing CPLB entries for Core B on-chip L1 SRAM regions. Any code that attempted to use these would wrongly crash due to a CPLB miss. Signed-off-by:
Graf Yang <graf.yang@analog.com> Signed-off-by:
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Robin Getz authored
Similar to anomaly 05000281 but not as bad, we cannot return to the instruction causing a fault otherwise we'll trigger a second false exception. The system can still recover, but it isn't correct. Signed-off-by:
Robin Getz <robin.getz@analog.com> Signed-off-by:
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Michael Hennerich authored
On Blackfin SMP, a per-cpu loops_per_jiffy is pointless since both cores always run at the same CCLK. In addition, the current implementation has flaws since the main consumer for loops_per_jiffy (asm/delay.h) uses the global kernel loops_per_jiffy and not the per_cpu one. So punt all of the per-cpu handling and go back to the global shared one. Signed-off-by:
Michael Hennerich <michael.hennerich@analog.com> Signed-off-by:
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Michael Hennerich authored
Change the bfin_gpio_pm_hibernate_restore() function to: 1) AND restored DATA with DIR (not OR) to get correct final state 2) Restore DATA before setting DIR to avoid glitches Signed-off-by:
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Barry Song authored
The AD7142 add-on card hooks the IRQ line up to PG5, not PF5. Signed-off-by:
Barry Song <barry.song@analog.com> Signed-off-by:
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Robin Getz authored
The interrupt context save logic incorrectly stored the address of the IPEND register rather than its value due to a missing dereference. While we're here, also enable this code for all kernel debugging scenarios and not just when KGDB is enabled. Signed-off-by:
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Robin Getz authored
We already catch this anomaly at compile time, and the runtime version is such that it ends up checking on all parts rather than just the ones that might actually have it. Signed-off-by:
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Michael Hennerich authored
The sed used to rename the bfin-twi-lcd only replaced the first instance rather than all which led to the resources not being enabled when the driver was built as a module. Signed-off-by:
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Sonic Zhang authored
The Blackfin serial headers were inverting the CTS value leading to wrong handling of the CTS line which broke CTS/RTS handling completely. Signed-off-by:
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Graf Yang authored
This anomaly only applies to the BF527-0.1, not the BF526-0.1, and not any other revision of the BF527. So make sure we don't go returning 0xffff for other cases. Signed-off-by:
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Mike Frysinger authored
The early logic to locate a free DMA channel and then set it up was broken in a few ways that only manifested itself when we needed to set up more than 2 on chip SRAM regions (most board defaults setup 1 or 2). First, we checked the wrong status register (the destination gets updated, not the source) and second, we did the ssync before rather than after resetting a DMA config register. Signed-off-by: -
Mike Frysinger authored
Rather than assume Core B is always run with caches turned on, let people load into any of the on-chip memory regions. It is their business how the SRAM/Cache regions are utilized, so don't prevent them from being able to load into them. Signed-off-by: -
Jie Zhang authored
The code used in the Blackfin lshrdi3 utilizes gcc constructs. However, the structures declared don't line up with the code gcc generates, so under certain optimizations, we get bad code and things crap out in fun random ways. So rather than trying to maintain different gcc definitions ourselves, just use the ones available in gcclib.h. URL: http://blackfin.uclinux.org/gf/tracker/5286 Signed-off-by:
Jie Zhang <jie.zhang@analog.com> Signed-off-by:
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Robin Getz authored
Since we need to relocate the attached filesystem with the uClinux MTD map (to handle some anomalies), we need to know its real filesize. If we boot a kernel without a filesystem actually attached, we end up blindly reading and copying garbage (since there is no magic value to detect validity). Often times this results in an early crash and no output. So add a few basic sanity checks before operating on things to catch the majority of cases. Signed-off-by:
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Mike Frysinger authored
Previous unification code put the exception banner behind the "is oops" logic when it should have been printed all the time. Signed-off-by: -
Robin Getz authored
Add missing anomaly workaround for anomaly 05000281 - we can't return to instructions which cause hardware errors otherwise we trigger the error again which means we go into an infinite loop of handling, returning, and retriggering. This work around confuses gdb when the error occurs as the PC will seemed to have moved, so a better long term fix will need to be figured out, but for now this is better than an infinite crash loop. Signed-off-by:
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Graf Yang authored
Signed-off-by:
Cliff Cai <cliff.cai@analog.com> Signed-off-by:
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Mike Frysinger authored
There are no CONFIG_{BLK,CHR}_DEV_FLASH Kconfig options, and there is no flash_probe() function, so not really sure what this code is all about. Seems to be dead code that stretches way back to the start of the Blackfin port. Signed-off-by: -
Robin Getz authored
Improve the assembly with a few explanatory comments and use symbolic defines rather than numeric values for bit positions. Signed-off-by:
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- Jul 15, 2009
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Andreas Schwab authored
When moving load_up_altivec to vector.S a typo in a comment caused a thinko setting the wrong variable. Signed-off-by:
Andreas Schwab <schwab@linux-m68k.org> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Dave Kleikamp authored
On booke processors, gdb is seeing spurious SIGTRAPs when setting a watchpoint. user_disable_single_step() simply quits when the DAC is non-zero. It should be clearing the DBCR0_IC and DBCR0_BT bits from the dbcr0 register and TIF_SINGLESTEP from the thread flag. Signed-off-by:
Dave Kleikamp <shaggy@linux.vnet.ibm.com> Signed-off-by:
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- Jul 14, 2009
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Dave Jones authored
when building 32-bit, I see this .. arch/x86/kernel/pvclock.c:63:7: warning: "__x86_64__" is not defined Signed-off-by:
Dave Jones <davej@redhat.com> LKML-Reference: <20090713201437.GA12165@redhat.com> Signed-off-by:
Thomas Gleixner <tglx@linutronix.de>
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- Jul 13, 2009
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Huang Weiyi authored
Remove duplicated #include('s) in arch/mn10300/kernel/sys_mn10300.c Signed-off-by:Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by:
David Howells <dhowells@redhat.com> Signed-off-by:
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Rakib Mullick authored
The variable apic_numaq placed in noninit section references the function wakeup_secondary_cpu_via_nmi(), which is in __cpuinit section. Thus causes a section mismatch warning. To avoid such mismatch we mark apic_numaq as __refdata. We were warned by the following warning: WARNING: arch/x86/kernel/built-in.o(.data+0x932c): Section mismatch in reference from the variable apic_numaq to the function .cpuinit.text:wakeup_secondary_cpu_via_nmi() Signed-off-by:
Rakib Mullick <rakib.mullick@gmail.com> LKML-Reference: <b9df5fa10907120407p6b4f67dtf4d563155488188a@mail.gmail.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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Rakib Mullick authored
The variable apic_es7000_cluster references the function __cpuinit wakeup_secondary_cpu_via_mip() from a noninit section. So we've been warned by the following warning. To avoid possible collision between init/noninit, its best to mark the variable as __refdata. We were warned by the following warning: LD arch/x86/kernel/apic/built-in.o WARNING: arch/x86/kernel/apic/built-in.o(.data+0x198c): Section mismatch in reference from the variable apic_es7000_cluster to the function .cpuinit.text:wakeup_secondary_cpu_via_mip() Signed-off-by:
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Daniel Qarras authored
I've attached a patch to remove the Pentium M special casing of EMON and as noticed at least with my Pentium M the hardware PMU now works: Performance counter stats for '/bin/ls /var/tmp': 1.809988 task-clock-msecs # 0.125 CPUs 1 context-switches # 0.001 M/sec 0 CPU-migrations # 0.000 M/sec 224 page-faults # 0.124 M/sec 1425648 cycles # 787.656 M/sec 912755 instructions # 0.640 IPC Vince suggested that this code was trying to address erratum Y17 in Pentium-M's: http://download.intel.com/support/processors/mobile/pm/sb/25266532.pdf But that erratum (related to IA32_MISC_ENABLES.7) does not affect perfcounters as we dont use this toggle to disable RDPMC and WRMSR/RDMSR access to performance counters. We keep cr4's bit 8 (X86_CR4_PCE) clear so unprivileged RDPMC access is not allowed anyway. Cc: Vince Weaver <vince@deater.net> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Stephane Eranian <eranian@googlemail.com> LKML-Reference: <new-submission> Signed-off-by:
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- Jul 12, 2009
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Kay Sievers authored
The name size limit is gone from the driver-core, the BUS_ID_SIZE value will be removed. Cc: David S. Miller <davem@davemloft.net> Signed-off-by:
Kay Sievers <kay.sievers@vrfy.org> Signed-off-by:
Greg Kroah-Hartman <gregkh@suse.de>
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Alexey Dobriyan authored
* Remove smp_lock.h from files which don't need it (including some headers!) * Add smp_lock.h to files which do need it * Make smp_lock.h include conditional in hardirq.h It's needed only for one kernel_locked() usage which is under CONFIG_PREEMPT This will make hardirq.h inclusion cheaper for every PREEMPT=n config (which includes allmodconfig/allyesconfig, BTW) Signed-off-by:
Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by:
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