- May 29, 2014
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Maxime Ripard authored
Update sunxi_defconfig and multi_v7 with all the latest Allwinner additions. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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Kumar Gala authored
Signed-off-by:
Kumar Gala <galak@codeaurora.org>
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- May 27, 2014
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Soren Brinkmann authored
A few drivers for Zynq peripherals made it into mainline recently. Enable them in the defconfig. The following devices are enabled: - Cadence Macb Ethernet controller - Cadence I2C controller - Arasan SDHCI Signed-off-by:
Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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Wenyou Yang authored
due to enabling -- CONFIG_REGULATOR -- CONFIG_REGULATOR_ACT8865 Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> [nicolas.ferre@atmel.com: move added entries to proper location within file] Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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- May 23, 2014
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Stefan Agner authored
Toradex Colibri Evaluation Board uses the DS1307 RTC and the MCP251x CAN controller. The NVIDIA Tegra 3 based Colibri T30 module can be used on this carrier board, hence enable those drivers in tegra_defonfig and multi_v7_defconfig. Furthermore the NVIDIA Tegra 3 based Apalis T30 module too contains two MCP251x CAN controller. Signed-off-by:
Stefan Agner <stefan@agner.ch> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Olof Johansson <olof@lixom.net> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Thomas Petazzoni authored
The Marvell Armada 38x platform has a SDHCI interface managed by the sdhci-pxav3 MMC host driver. It therefore makes sense to enable this driver in multi_v7_defconfig, which supports the Armada 38x platform. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by:
Jason Cooper <jason@lakedaemon.net> Signed-off-by:
Olof Johansson <olof@lixom.net> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Gregory CLEMENT authored
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled for the xHCI USB hosts, so this commit enables the corresponding Kconfig option in multi_v7_defconfig. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: arm@kernel.org Cc: Kevin Hilman <khilman@linaro.org> Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Olof Johansson <olof@lixom.net> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Maxime Ripard authored
Now that the reset code are part of drivers of their own, we need those in the defconfig. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
Now that the A31 reset code is a driver of its own, we need it in the defconfig. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- May 22, 2014
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Stephen Boyd authored
Now that DT based platforms are split out of mach-msm into mach-qcom, put back a non-DT based SoC into the msm_defconfig and stop selecting unsupported drivers. Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org> Acked-by:
David Brown <davidb@codeaurora.org> Signed-off-by:
Kumar Gala <galak@codeaurora.org>
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Thomas Petazzoni authored
Since Armada 370, XP, 375 and 38x have PCI MSI support, it makes sense to enable CONFIG_PCI_MSI in mvebu_v7_defconfig. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400598964-2062-1-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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- May 20, 2014
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Miklos Szeredi authored
Signed-off-by:
Miklos Szeredi <mszeredi@suse.cz> Acked-by:
Tony Luck <tony.luck@intel.com>
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Miklos Szeredi authored
Signed-off-by:
Miklos Szeredi <mszeredi@suse.cz> Acked-by:
Helge Deller <deller@gmx.de>
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Miklos Szeredi authored
Signed-off-by:
Miklos Szeredi <mszeredi@suse.cz> Acked-by:
Geert Uytterhoeven <geert@linux-m68k.org>
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- May 16, 2014
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Mark Salter authored
The following happens when trying to run a kvm guest on a kernel configured for 64k pages. This doesn't happen with 4k pages: BUG: failure at include/linux/mm.h:297/put_page_testzero()! Kernel panic - not syncing: BUG! CPU: 2 PID: 4228 Comm: qemu-system-aar Tainted: GF 3.13.0-0.rc7.31.sa2.k32v1.aarch64.debug #1 Call trace: [<fffffe0000096034>] dump_backtrace+0x0/0x16c [<fffffe00000961b4>] show_stack+0x14/0x1c [<fffffe000066e648>] dump_stack+0x84/0xb0 [<fffffe0000668678>] panic+0xf4/0x220 [<fffffe000018ec78>] free_reserved_area+0x0/0x110 [<fffffe000018edd8>] free_pages+0x50/0x88 [<fffffe00000a759c>] kvm_free_stage2_pgd+0x30/0x40 [<fffffe00000a5354>] kvm_arch_destroy_vm+0x18/0x44 [<fffffe00000a1854>] kvm_put_kvm+0xf0/0x184 [<fffffe00000a1938>] kvm_vm_release+0x10/0x1c [<fffffe00001edc1c>] __fput+0xb0/0x288 [<fffffe00001ede4c>] ____fput+0xc/0x14 [<fffffe00000d5a2c>] task_work_run+0xa8/0x11c [<fffffe0000095c14>] do_notify_resume+0x54/0x58 In arch/arm/kvm/mmu.c:unmap_range(), we end up doing an extra put_page() on the stage2 pgd which leads to the BUG in put_page_testzero(). This happens because a pud_huge() test in unmap_range() returns true when it should always be false with 2-level pages tables used by 64k pages. This patch removes support for huge puds if 2-level pagetables are being used. Signed-off-by:
Mark Salter <msalter@redhat.com> [catalin.marinas@arm.com: removed #ifndef around PUD_SIZE check] Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@vger.kernel.org> # v3.11+
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Stephen Boyd authored
Add a defconfig for mach-qcom platforms (copied from msm_defconfig). Although these platforms are part of the multi-platform kernel, it's useful to have a stripped down version of the defconfig that just selects the DT based Qualcomm platforms and drivers. Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org> Signed-off-by:
Kumar Gala <galak@codeaurora.org>
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Leif Lindholm authored
A few platforms lack a 'device_type = "memory"' for their memory nodes, relying on an old ppc quirk in order to discover its memory. Add the missing data so that all parsing code can find memory nodes correctly. Signed-off-by:
Leif Lindholm <leif.lindholm@linaro.org> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com> Cc: <stable@vger.kernel.org> Acked-by:
John Crispin <blogic@openwrt.org> Signed-off-by:
Grant Likely <grant.likely@linaro.org>
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Leif Lindholm authored
The current .dts for ste-ccu8540 lacks a 'device_type = "memory"' for its memory node, relying on an old ppc quirk in order to discover its memory. Fix the data so that all parsing code can handle it correctly. Signed-off-by:
Leif Lindholm <leif.lindholm@linaro.org> Acked-by:
Lee Jones <lee.jones@linaro.org> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com> Cc: <stable@vger.kernel.org> Signed-off-by:
Grant Likely <grant.likely@linaro.org>
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Gregory CLEMENT authored
The Marvell Armada 38x platform needs the xhci_mvebu driver enabled for the xHCI USB hosts, so this commit enables the corresponding Kconfig option in mvebu_v7_defconfig. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-13-git-send-email-gregory.clement@free-electrons.com Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400149062-32661-13-git-send-email-gregory.clement@free-electrons.com Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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- May 15, 2014
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John David Anglin authored
The attached change significantly improves the performance of the LWS-CAS code in syscall.S. This allows a number of packages to build (e.g., zeromq3, gtest and libxs) that previously failed because slow LWS-CAS performance under contention. In particular, interrupts taken while the lock was taken degraded performance significantly. The change does the following: 1) Disables interrupts around the CAS operation, and 2) Changes the loads and stores to use the ordered completer, "o", on PA 2.0. "o" and "ma" with a zero offset are equivalent. The latter is accepted on both PA 1.X and 2.0. The use of ordered loads and stores probably makes no difference on all existing hardware, but it seemed pedantically correct. In particular, the CAS operation must complete before LDCW lock is released. As written before, a processor could reorder the operations. I don't believe the period interrupts are disabled is long enough to significantly increase interrupt latency. For example, the TLB insert code is longer. Worst case is a memory fault in the CAS operation. Signed-off-by:
John David Anglin <dave.anglin@bell.net> Cc: stable@vger.kernel.org # 3.13+ Signed-off-by:
Helge Deller <deller@gmx.de>
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Helge Deller authored
Ratelimit printing of userspace segfaults and make it runtime configurable via the /proc/sys/debug/exception-trace variable. This should resolve syslog from growing way too fast and thus prevents possible system service attacks. Signed-off-by:
Helge Deller <deller@gmx.de> Cc: stable@vger.kernel.org # 3.13+
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- May 14, 2014
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Linus Torvalds authored
Checkin: b3b42ac2 x86-64, modify_ldt: Ban 16-bit segments on 64-bit kernels disabled 16-bit segments on 64-bit kernels due to an information leak. However, it does seem that people are genuinely using Wine to run old 16-bit Windows programs on Linux. A proper fix for this ("espfix64") is coming in the upcoming merge window, but as a temporary fix, create a sysctl to allow the administrator to re-enable support for 16-bit segments. It adds a "/proc/sys/abi/ldt16" sysctl that defaults to zero (off). If you hit this issue and care about your old Windows program more than you care about a kernel stack address information leak, you can do echo 1 > /proc/sys/abi/ldt16 as root (add it to your startup scripts), and you should be ok. The sysctl table is only added if you have COMPAT support enabled on x86-64, but I assume anybody who runs old windows binaries very much does that ;) Signed-off-by:
H. Peter Anvin <hpa@linux.intel.com> Link: http://lkml.kernel.org/r/CA%2B55aFw9BPoD10U1LfHbOMpHWZkvJTkMcfCs9s3urPr1YyWBxw@mail.gmail.com Cc: <stable@vger.kernel.org>
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James Hogan authored
Meta overrode _STK_LIM_MAX (the default RLIMIT_STACK hard limit) to 256MB, apparently in an attempt to prevent setup_arg_pages's STACK_GROWSUP code from choosing the maximum stack size of 1GB, which is far too large for Meta's limited virtual address space and hits a BUG_ON (stack_top is usually 0x3ffff000). However the commit "metag: Reduce maximum stack size to 256MB" reduces the absolute stack size limit to a safe value for metag. This allows the default _STK_LIM_MAX override to be removed, bringing the default behaviour in line with all other architectures. Parisc in particular recently removed their override of _STK_LIMT_MAX in commit e0d8898d (parisc: remove _STK_LIM_MAX override) since it subtly affects stack allocation semantics in userland. Meta's uapi/asm/resource.h can now be removed and switch to using generic-y. Suggested-by:
Helge Deller <deller@gmx.de> Signed-off-by:
James Hogan <james.hogan@imgtec.com> Cc: linux-metag@vger.kernel.org Cc: John David Anglin <dave.anglin@bell.net>
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Helge Deller authored
This patch affects only architectures where the stack grows upwards (currently parisc and metag only). On those do not hardcode the maximum initial stack size to 1GB for 32-bit processes, but make it configurable via a config option. The main problem with the hardcoded stack size is, that we have two memory regions which grow upwards: stack and heap. To keep most of the memory available for heap in a flexmap memory layout, it makes no sense to hard allocate up to 1GB of the memory for stack which can't be used as heap then. This patch makes the stack size for 32-bit processes configurable and uses 80MB as default value which has been in use during the last few years on parisc and which hasn't showed any problems yet. Signed-off-by:
Helge Deller <deller@gmx.de> Signed-off-by:
James Hogan <james.hogan@imgtec.com> Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: linux-parisc@vger.kernel.org Cc: linux-metag@vger.kernel.org Cc: John David Anglin <dave.anglin@bell.net>
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James Hogan authored
Specify the maximum stack size for arches where the stack grows upward (parisc and metag) in asm/processor.h rather than hard coding in fs/exec.c so that metag can specify a smaller value of 256MB rather than 1GB. This fixes a BUG on metag if the RLIMIT_STACK hard limit is increased beyond a safe value by root. E.g. when starting a process after running "ulimit -H -s unlimited" it will then attempt to use a stack size of the maximum 1GB which is far too big for metag's limited user virtual address space (stack_top is usually 0x3ffff000): BUG: failure at fs/exec.c:589/shift_arg_pages()! Signed-off-by:
James Hogan <james.hogan@imgtec.com> Cc: Helge Deller <deller@gmx.de> Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: linux-parisc@vger.kernel.org Cc: linux-metag@vger.kernel.org Cc: John David Anglin <dave.anglin@bell.net> Cc: stable@vger.kernel.org # only needed for >= v3.9 (arch/metag)
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Mikulas Patocka authored
Volatile access doesn't really imply the compiler barrier. Volatile access is only ordered with respect to other volatile accesses, it isn't ordered with respect to general memory accesses. Gcc may reorder memory accesses around volatile access, as we can see in this simple example (if we compile it with optimization, both increments of *b will be collapsed to just one): void fn(volatile int *a, long *b) { (*b)++; *a = 10; (*b)++; } Consequently, we need the compiler barrier after a write to the volatile variable, to make sure that the compiler doesn't reorder the volatile write with something else. Signed-off-by:
Mikulas Patocka <mpatocka@redhat.com> Cc: stable@vger.kernel.org Acked-by:
Peter Zijlstra <peterz@infradead.org> Signed-off-by:
James Hogan <james.hogan@imgtec.com>
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Steven J. Hill authored
Commit f4ae17aa [MIPS: mm: Use scratch for PGD when !CONFIG_MIPS_PGD_C0_CONTEXT] broke microMIPS kernel builds. This patch refactors that code similar to what was done for the 'clear_page' and 'copy_page' functions. Signed-off-by:
Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6744/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Stephen Warren authored
AT24C EEPROM: This is used for the board ID EEPROM on Jetson TK1, as well as likely a whole slew of other NVIDIA reference boards; we simply haven't added enabled the EEPROM in the DT files until now. MTD_SPI_NOR: This defconfig contains the CONFIG_M25P80 symbol, which is now dependent on the MTD_SPI_NOR symbol. Add CONFIG_MTD_SPI_NOR to satisfy the new dependency. FRAMEBUFFER_CONSOLE_ROTATION: Needed for devices like Tegra Note 7 and NVIDIA SHIELD to get the boot console in the expected orientation. CAN*, RTC_DRV_DS1307: Toradex Colibri Evaluation Board uses the DS1307 RTC and the MCP251x CAN controller. The NVIDIA Tegra 3 based Colibri T30 module can be used on this carrier board. Furthermore the NVIDIA Tegra 3 based Apalis T30 module too contains two MCP251x CAN controllers. INPUT_JOYDEV: NVIDIA SHIELD embeds a USB joystick device. Signed-off-by:
Brian Norris <computersforpeace@gmail.com> Signed-off-by:
Alexandre Courbot <acourbot@nvidia.com> Signed-off-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
Stephen Warren <swarren@nvidia.com>
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- May 13, 2014
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Markos Chandras authored
A MIPS64 kernel may support ELF files for all 3 MIPS ABIs (O32, N32, N64). Furthermore, the AUDIT_ARCH_MIPS{,EL}64 token does not provide enough information about the ABI for the 64-bit process. As a result of which, userland needs to use complex seccomp filters to decide whether a syscall belongs to the o32 or n32 or n64 ABI. Therefore, a new arch token for MIPS64/n32 is added so it can be used by seccomp to explicitely set syscall filters for this ABI. Signed-off-by:
Markos Chandras <markos.chandras@imgtec.com> Acked-by:
Eric Paris <eparis@redhat.com> Acked-by:
Paul Moore <pmoore@redhat.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: linux-mips@linux-mips.org Link: http://sourceforge.net/p/libseccomp/mailman/message/32239040/ Patchwork: https://patchwork.linux-mips.org/patch/6818/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Anthony Iliopoulos authored
The invalidation is required in order to maintain proper semantics under CoW conditions. In scenarios where a process clones several threads, a thread operating on a core whose DTLB entry for a particular hugepage has not been invalidated, will be reading from the hugepage that belongs to the forked child process, even after hugetlb_cow(). The thread will not see the updated page as long as the stale DTLB entry remains cached, the thread attempts to write into the page, the child process exits, or the thread gets migrated to a different processor. Signed-off-by:
Anthony Iliopoulos <anthony.iliopoulos@huawei.com> Link: http://lkml.kernel.org/r/20140514092948.GA17391@server-36.huawei.corp Suggested-by:
Shay Goikhman <shay.goikhman@huawei.com> Acked-by:
Dave Hansen <dave.hansen@intel.com> Signed-off-by:
H. Peter Anvin <hpa@linux.intel.com> Cc: <stable@vger.kernel.org> # v2.6.16+ (!)
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Ralf Baechle authored
Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- May 12, 2014
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Ralf Baechle authored
<uapi/asm/inst.h> is exported to userland so the macro name BITFIELD_FIELD pollutes the namespace. Prefix the name with __ fixes this. Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Aaro Koskinen authored
Loongson2 has been using (incorrectly) kHz for cpu_clk rate. This has been unnoticed, as loongson2_cpufreq was the only place where the rate was set/get. After commit 652ed95d (cpufreq: introduce cpufreq_generic_get() routine) things however broke, and now loops_per_jiffy adjustments are incorrect (1000 times too long). The patch fixes this by changing cpu_clk rate to Hz. Signed-off-by:
Aaro Koskinen <aaro.koskinen@iki.fi> Cc: stable@vger.kernel.org Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: cpufreq@vger.kernel.org Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Patchwork: https://patchwork.linux-mips.org/patch/6678/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Paul Bolle authored
Commit 0e476d91 ("MIPS: Loongson: Add Loongson-3 Kconfig options") added "select GENERIC_HARDIRQS_NO__DO_IRQ". But the Kconfig symbol GENERIC_HARDIRQS_NO__DO_IRQ was already removed in v2.6.38, so that select is a nop. Drop it. Signed-off-by:
Paul Bolle <pebolle@tiscali.nl> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/6677/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
This change reverts most of commit 60724ca5 [MIPS: IP checksums: Remove unncessary .set pseudos] that introduced warnings with the CPU_DADDI_WORKAROUNDS option set: arch/mips/lib/csum_partial.S: Assembler messages: arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3" [...] arch/mips/lib/csum_partial.S:577: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:577: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:577: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3" arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3" [and so on, and so on...] The warnings are benign and good code is produced regardless because no macros that'd use the assembler's temporary register are involved, however the `.set noat' directives removed by the commit referred are crucial to guarantee this is still going to be the case after any changes in the future. Therefore they need to be brought back to place which this change does. Signed-off-by:
Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6686/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
This corrects assembler warnings and broken code generated in __strncpy_from_user_asm: arch/mips/lib/strncpy_user.S: Assembler messages: arch/mips/lib/strncpy_user.S:52: Warning: Macro instruction expanded into multiple instructions in a branch delay slot with the CPU_DADDI_WORKAROUNDS option set. The function schedules delay slots manually where there is really no need to as GAS is happy to do it all itself, so undo it all and remove `.set noreorder'. Signed-off-by:
Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6685/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
With CPU_DADDI_WORKAROUNDS enabled __delay assembles with a macro in a branch delay slot: {standard input}: Assembler messages: {standard input}:18: Warning: Macro instruction expanded into multiple instructions in a branch delay slot and broken code results: 0000000000000000 <__delay>: 0: 1480ffff bnez a0,0 <__delay> 4: 24010001 li at,1 8: 0081202f dsubu a0,a0,at c: 03e00008 jr ra 10: 00000000 nop 14: 00000000 nop Consequently the function loops indefinitely, showing up prominently as a hang in the delay loop calibration at bootstrap. This change corrects the problem by forcing the immediate 1 into a register while keeping code produced identical where CPU_DADDI_WORKAROUNDS is disabled. Signed-off-by:
Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6669/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
Commit 231a35d3 [[MIPS] RM: Collected changes] broke DECstation support by introducing an incompatible copy of arch/mips/dec/prom/call_o32.S in arch/mips/fw/lib/, built unconditionally. The copy happens to land earlier of the two among the modules used in the link and is therefore chosen for the DECstation rather than the intended original. As a result random kernel data is corrupted because a pointer to the "%s" formatted output template is used as a temporary stack pointer rather than being passed down to prom_printf. This also explains why prom_printf still works, up to a point -- the next argument is the actual string to output so it works just fine as the output template until enough kernel data has been corrupted to cause a crash. This change adjusts the modified wrapper in arch/mips/fw/lib/call_o32.S to let callers request no stack switching by passing a null temporary stack pointer in $a1, reworks the DECstation callers to work with the updated interface and removes the old copy from arch/mips/dec/prom/call_o32.S. A few minor readability adjustments are included as well, most importantly O32_SZREG is now used throughout where applicable rather than hardcoded multiplies of 4 and $fp is used to access the argument save area as a more usual register to operate the stack with rather than $s0. Finally an update is made to the temporary stack space used by the SNI platform to guarantee 8-byte alignment as per o32 requirements. Signed-off-by:
Maciej W. Rozycki <macro@linux-mips.org> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6668/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
Commit 69f24d17 [MIPS: Optimize current_cpu_type() for better code.] missed an update for two DECstation bus error support files that now do not build, this is a fix. Signed-off-by:
Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6667/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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