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  1. Oct 05, 2009
    • Vikram Pandita's avatar
      OMAP3: PM: USBHOST: clear wakeup events on both hosts · 71a80775
      Vikram Pandita authored 
      

USBHOST module has 2 fclocks (for HOST1 and HOST2), only one iclock
and only a single bit in the WKST register to indicate a wakeup event.

Because of the single WKST bit, we cannot know whether a wakeup event
was on HOST1 or HOST2, so enable both fclocks before clearing the
wakeup event to ensure both hosts can properly clear the event.

Signed-off-by: default avatarVikram Pandita <vikram.pandita@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
      71a80775
    • Paul Walmsley's avatar
      OMAP3: PM: PRCM interrupt: only handle selected PRCM interrupts · 8cb0ac99
      Paul Walmsley authored 
      

Clearing wakeup sources is now only done when the PRM indicates a
wakeup source interrupt.  Since we don't handle any other types of
PRCM interrupts right now, warn if we get any other type of PRCM
interrupt.  Either code needs to be added to the PRCM interrupt
handler to react to these, or these other interrupts should be masked
off at init.

Updated after Jon Hunter's PRCM IRQ rework by Kevin Hilman.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
      8cb0ac99
    • Paul Walmsley's avatar
      OMAP3: PM: PRCM interrupt: check MPUGRPSEL register · 5d805978
      Paul Walmsley authored 
      

PM_WKST register contents should be ANDed with the contents of the
MPUGRPSEL registers.  Otherwise the MPU PRCM interrupt handler could
wind up clearing wakeup events meant for the IVA PRCM interrupt
handler. A future revision to this code should be to read a cached
version of MPUGRPSEL from the powerdomain code, since PRM reads are
relatively slow.

Updated after Jon Hunter's PRCM IRQ change by Kevin Hilman

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
      5d805978
    • Jon Hunter's avatar
      OMAP3: PM: Prevent hang in prcm_interrupt_handler · 77da2d91
      Jon Hunter authored 
      

There are two scenarios where a race condition could result in a hang
in the prcm_interrupt handler. These are:

1). Waiting for PRM_IRQSTATUS_MPU register to clear.
Bit 0 of the PRM_IRQSTATUS_MPU register indicates that a wake-up event
is pending for the MPU. This bit can only be cleared if the all the
wake-up events latched in the various PM_WKST_x registers have been
cleared. If a wake-up event occurred during the processing of the prcm
interrupt handler, after the corresponding PM_WKST_x register was
checked but before the PRM_IRQSTATUS_MPU was cleared, then the CPU
would be stuck forever waiting for bit 0 in PRM_IRQSTATUS_MPU to be
cleared.

2). Waiting for the PM_WKST_x register to clear.
Some power domains have more than one wake-up source. The PM_WKST_x
registers indicate the source of a wake-up event and need to be cleared
after a wake-up event occurs. When the PM_WKST_x registers are read and
before they are cleared, it is possible that another wake-up event
could occur causing another bit to be set in one of the PM_WKST_x
registers. If this did occur after reading a PM_WKST_x register then
the CPU would miss this event and get stuck forever in a loop waiting
for that PM_WKST_x register to clear.

This patch address the above race conditions that would result in a
hang.

Signed-off-by: default avatarJon Hunter <jon-hunter@ti.com>
Reviewed-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
      77da2d91
  3. Sep 26, 2009
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