- Sep 14, 2014
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klightspeed@killerwolves.net authored
The bootloader on the Netgear ReadyNAS RN102 uses Hardware BCH ECC (strength = 4), while the pxa3xx NAND driver by default uses Hamming ECC (strength = 1). This patch changes the ECC mode on these machines to match that of the bootloader and of the stock firmware. That way, it is now possible to update the kernel from userland (e.g. using standard tools from mtd-utils package); u-boot will happily load and boot it. Fixes: 92beaccd ("ARM: mvebu: Enable NAND controller in ReadyNAS 102 .dts file") Cc: <stable@vger.kernel.org> #v3.14+ Signed-off-by:
Ben Peddell <klightspeed@killerwolves.net> Acked-by:
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by:
Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/1410339341-3372-1-git-send-email-klightspeed@killerwolves.net Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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- Sep 13, 2014
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Andrew Lunn authored
During the conversion of boards to use DT to instantiate Distributed Switch Architecture, nobody volunteered to test. As to be expected, the conversion was flawed. Testers and access to hardware has now become available, and this patch hopefully fixes the problems. dsa,mii-bus must be a phandle to the top level mdio node, not the port specific subnode of the mdio device. dsa,ethernet must be a phandle to the port subnode within the ethernet DT node, not the ethernet node. Don't pinctrl hog the card detect gpio for mvsdio. Rename the .dts files to make it clearer which file is for the Z0 stepping and which for the A0 or later stepping. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Cc: seugene@marvell.com Tested-by:
Eugene Sanivsky <seugene@marvell.com> Fixes: e2eaa339: ("ARM: Kirkwood: convert rd88f6281-setup.c to DT.") Fixes: e7c8f380: ("ARM: kirkwood: Convert mv88f6281gtw_ge switch setup to DT") Cc: <stable@vger.kernel.org> #v3.15+ Link: https://lkml.kernel.org/r/1409592941-22244-1-git-send-email-andrew@lunn.ch Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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- Sep 11, 2014
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Uwe Kleine-König authored
of_device_ids (i.e. compatible strings and the respective data) are not supposed to change at runtime. All functions working with of_device_ids provided by <linux/of.h> work with const of_device_ids. So mark the non-const function parameters and structs for OMAP2+ as const, too. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Uwe Kleine-König authored
The definition static const char *omap3_boards_compat[] __initconst = { defines a changable array of constant strings. That is you must not do: *omap3_boards_compat[0] = 'f'; but omap3_boards_compat[0] = "another string"; is fine. So the annotation __initconst is wrong and yields a compiler error when other really const variables are added with __initconst. As the struct machine_desc member dt_compat is declared as const char *const *dt_compat; making the arrays const is the better alternative over changing all annotations to __initdata. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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- Sep 10, 2014
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Roland Stigge authored
In the recent change to the reset function API (commit 7b6d864b), the mode argument changed from a char to an enum. lpc23xx_restart() only handles REBOOT_SOFT and REBOOT_HARD, but the new kernel code emits REBOOT_COLD (0) on reboots now which leads to lpc32xx simply not rebooting (but halting). This patch fixes this by just resetting unconditionally as on other platforms (e.g. mach-bcm2835). Pulling lpc32xx_watchdog_reset() into lpc23xx_restart() since the while() in lpc23xx_restart() is part of the procedure anyway and lpc32xx_watchdog_reset() isn't used anywhere else anymore. Signed-off-by:
Roland Stigge <stigge@antcom.de>
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- Sep 09, 2014
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Arnaud Ebalard authored
The bootloader on the Netgear ReadyNAS RN2120 uses Hardware BCH ECC (strength = 4), while the pxa3xx NAND driver by default uses Hamming ECC (strength = 1). This patch changes the ECC mode on these machines to match that of the bootloader and of the stock firmware. That way, it is now possible to update the kernel from userland (e.g. using standard tools from mtd-utils package); u-boot will happily load and boot it. The issue was initially reported and fixed by Ben Pedell for RN102. The RN2120 shares the same Hynix H27U1G8F2BTR NAND flash and setup. This patch is based on Ben's fix for RN102. Fixes: ad51eddd ("ARM: mvebu: Enable NAND controller in ReadyNAS 2120 .dts file") Cc: <stable@vger.kernel.org> # v3.14+ Signed-off-by:
Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/61f6a1b7ad0adc57a0e201b9680bc2e5f214a317.1410035142.git.arno@natisbad.org Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Arnaud Ebalard authored
The bootloader on the Netgear ReadyNAS RN104 uses Hardware BCH ECC (strength = 4), while the pxa3xx NAND driver by default uses Hamming ECC (strength = 1). This patch changes the ECC mode on these machines to match that of the bootloader and of the stock firmware. That way, it is now possible to update the kernel from userland (e.g. using standard tools from mtd-utils package); u-boot will happily load and boot it. The issue was initially reported and fixed by Ben Pedell for RN102. The RN104 shares the same Hynix H27U1G8F2BTR NAND flash and setup. This patch is based on Ben's fix for RN102. Fixes: 0373a558 ("ARM: mvebu: Enable NAND controller in ReadyNAS 104 .dts file") Cc: <stable@vger.kernel.org> # v3.14+ Signed-off-by:
Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/920c7e7169dc6aaaa3eb4bced2336d38e77b8864.1410035142.git.arno@natisbad.org Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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- Sep 08, 2014
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Nishanth Menon authored
Not all SoCs support OFF mode - for example DRA74/72. So, use valid power state during CPU hotplug. Signed-off-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com>
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Nishanth Menon authored
We are using power domain state as RET and logic state as OFF. This state is OSWR. This may not always be supported on ALL power domains. In fact, on certain power domains, this might result in a hang on certain platforms. Instead, depend on powerdomain data to provide accurate information about the supported powerdomain states and use the appropriate function to query and use it as part of suspend path. Signed-off-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com>
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Nishanth Menon authored
Move the logic state as different for each power domain. This allows us to customize the deepest power state we should target over all for each powerdomain in the follow on patches. Signed-off-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com>
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Nishanth Menon authored
powerdomain configuration in OMAP is done using PWRSTCTRL register for each power domain. However, PRCM lets us write any value we'd like to the logic and power domain target states, however the SoC integration tends to actually function only at a few discrete states. These valid states are already in our powerdomains_xxx_data.c file. So, provide a function to easily query valid low power state that the power domain is allowed to go to. Based on work originally done by Jean Pihet <j-pihet@ti.com> https://patchwork.kernel.org/patch/1325091/ . There is no attempt to create a new powerdomain solution here, except fixing issues seen attempting invalid programming attempts. Future consolidation to the generic powerdomain framework should consider this requirement as well. Similar solutions have been done in product kernels in the past such as: https://android.googlesource.com/kernel/omap.git/+blame/android-omap-panda-3.0/arch/arm/mach-omap2/pm44xx.c Signed-off-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com>
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Nishanth Menon authored
No need to invoke callback when the clkdm pointer is NULL. Signed-off-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com>
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Nishanth Menon authored
Update the power domain power states for final production chip capability. OFF mode, OSWR etc have been descoped for various domains. Signed-off-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com>
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Nishanth Menon authored
DRA7 supports only CSWR for CPU, MPU power domains. Core power domain supports upto INA. Signed-off-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com>
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- Sep 05, 2014
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Paul Bolle authored
The Kconfig symbol PLAT_SPEAR_SINGLE briefly appeared during the v3.10 development cycle. It was removed in a merge commit before v3.10. A few references to it were left in the tree, probably because they didn't generate merge conflicts. Whatever it was, they're useless now and can safely be removed. Reported-by:
Martin Walch <walch.martin@web.de> Signed-off-by:
Paul Bolle <pebolle@tiscali.nl> Reviewed-by:
Rajeev Kumar <rajeev-dlh.kumar@st.com> Cc: Rajeev Kumar <rajeev_kumar@mentor.com> Acked-by:
Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Sep 04, 2014
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Xia Kaixu authored
The kernel panic occurs when running an allmodconfig kernel on OMAP4460. The inicall "cns3xxx_pcie_init" does not check which hardware it's running on and just tries to access to its specific registers. Now call it from .init_late callback from the two machine descriptors. Signed-off-by:
Xia Kaixu <kaixu.xia@linaro.org> Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Cc: Anton Vorontsov <anton@enomsg.org> Cc: Felix Fietkau <nbd@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linaro-kernel@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org
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- Sep 03, 2014
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Nishanth Menon authored
Beaglebone white and beaglebone black differ in tiny little aspects. This is the reason why we maintain seperate dts for these platforms. However, there is no real way to decode from dtb which platform it is since compatible and model name are the same for both platforms. Fix this so that beaglebone black and beaglebone are identifiable, while maintaining compatibility for older zImages which might use old beaglebone compatible flag for black as well. Reported-by:
Tom Rini <trini@ti.com> Signed-off-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Nishanth Menon authored
Currently we claim that omap4-panda and omap4-panda-es are essentially the same, but they are not since PandaBoard-ES uses OMAP4460 and PandaBoard uses OMAP4430. So, split the common definition and make the model name available. Signed-off-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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- Sep 01, 2014
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Guenter Roeck authored
unicore32 builds fail with arch/unicore32/kernel/signal.c: In function ‘setup_frame’: arch/unicore32/kernel/signal.c:257: error: ‘usig’ undeclared (first use in this function) arch/unicore32/kernel/signal.c:279: error: ‘usig’ undeclared (first use in this function) arch/unicore32/kernel/signal.c: In function ‘handle_signal’: arch/unicore32/kernel/signal.c:306: warning: unused variable ‘tsk’ arch/unicore32/kernel/signal.c: In function ‘do_signal’: arch/unicore32/kernel/signal.c:376: error: implicit declaration of function ‘get_signsl’ make[1]: *** [arch/unicore32/kernel/signal.o] Error 1 make: *** [arch/unicore32/kernel/signal.o] Error 2 Bisect points to commit 649671c9 ("unicore32: Use get_signal() signal_setup_done()"). This code never even compiled. Reverting the patch does not work, since previously used functions no longer exist, so try to fix it up. Compile tested only. Fixes: 649671c9 ("unicore32: Use get_signal() signal_setup_done()") Cc: Richard Weinberger <richard@nod.at> Signed-off-by:
Guenter Roeck <linux@roeck-us.net> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Aug 31, 2014
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Alex Shi authored
With ARCH_VEXPRESS_SPC option, kernel build has the following warning: arch/arm/mach-vexpress/spc.c: In function ‘ve_spc_clk_init’: arch/arm/mach-vexpress/spc.c:431:38: warning: array subscript is below array bounds [-Warray-bounds] struct ve_spc_opp *opps = info->opps[cluster]; ^ since 'cluster' maybe '-1' in UP system. This patch does a active checking to fix this issue. Signed-off-by:
Alex Shi <alex.shi@linaro.org> Acked-by:
Pawel Moll <pawel.moll@arm.com> Acked-by:
Sudeep Holla <sudeep.holla@arm.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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- Aug 29, 2014
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Michael Welling authored
Without this patch the kexec-purgatory.c and purgatory.ro files are not removed after make mrproper. Signed-off-by:
Michael Welling <mwelling@ieee.org> Acked-by:
Vivek Goyal <vgoyal@redhat.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Pranith Kumar authored
Fix building errors occuring due to a missing export of flush_icache_range() in kisskb.ellerman.id.au/kisskb/buildresult/11677809/ ERROR: "flush_icache_range" [drivers/misc/lkdtm.ko] undefined! Signed-off-by:
Pranith Kumar <bobby.prani@gmail.com> Reported-by:
Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Vineet Gupta <vgupta@synopsys.com> [arc] Acked-by: Richard Kuo <rkuo@codeaurora.org> [hexagon] Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Chris Zankel <chris@zankel.net> Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa] Cc: Noam Camus <noamc@ezchip.com> Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Acked-by: Zhigang Lu <zlu@tilera.com> [tile] Cc: Kirill Tkhai <tkhai@yandex.ru> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Vivek Goyal authored
Thomas reported that build of x86_64 kernel was failing for him. He is using 32bit tool chain. Problem is that while compiling purgatory, I have not specified -m64 flag. And 32bit tool chain must be assuming -m32 by default. Following is error message. (mini) [~/work/linux-2.6] make scripts/kconfig/conf --silentoldconfig Kconfig CHK include/config/kernel.release UPD include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h UPD include/generated/utsrelease.h CC arch/x86/purgatory/purgatory.o arch/x86/purgatory/purgatory.c:1:0: error: code model 'large' not supported in the 32 bit mode Fix it by explicitly passing appropriate -m64/-m32 build flag for purgatory. Reported-by:
Thomas Glanzmann <thomas@glanzmann.de> Tested-by:
Thomas Glanzmann <thomas@glanzmann.de> Suggested-by:
H. Peter Anvin <hpa@zytor.com> Signed-off-by:
Vivek Goyal <vgoyal@redhat.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Vivek Goyal authored
New system call depends on crypto. As it did not have a separate config option, CONFIG_KEXEC was modified to select CRYPTO and CRYPTO_SHA256. But now previous patch introduced a new config option for new syscall. So CONFIG_KEXEC does not require crypto. Remove that dependency. Signed-off-by:
Vivek Goyal <vgoyal@redhat.com> Cc: Eric Biederman <ebiederm@xmission.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Shaun Ruffell <sruffell@digium.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Vivek Goyal authored
Currently new system call kexec_file_load() and all the associated code compiles if CONFIG_KEXEC=y. But new syscall also compiles purgatory code which currently uses gcc option -mcmodel=large. This option seems to be available only gcc 4.4 onwards. Hiding new functionality behind a new config option will not break existing users of old gcc. Those who wish to enable new functionality will require new gcc. Having said that, I am trying to figure out how can I move away from using -mcmodel=large but that can take a while. I think there are other advantages of introducing this new config option. As this option will be enabled only on x86_64, other arches don't have to compile generic kexec code which will never be used. This new code selects CRYPTO=y and CRYPTO_SHA256=y. And all other arches had to do this for CONFIG_KEXEC. Now with introduction of new config option, we can remove crypto dependency from other arches. Now CONFIG_KEXEC_FILE is available only on x86_64. So whereever I had CONFIG_X86_64 defined, I got rid of that. For CONFIG_KEXEC_FILE, instead of doing select CRYPTO=y, I changed it to "depends on CRYPTO=y". This should be safer as "select" is not recursive. Signed-off-by:
Vivek Goyal <vgoyal@redhat.com> Cc: Eric Biederman <ebiederm@xmission.com> Cc: H. Peter Anvin <hpa@zytor.com> Tested-by:
Shaun Ruffell <sruffell@digium.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Hugh Dickins authored
Sasha Levin has shown oopses on ffffea0003480048 and ffffea0003480008 at mm/memory.c:1132, running Trinity on different 3.16-rc-next kernels: where zap_pte_range() checks page->mapping to see if PageAnon(page). Those addresses fit struct pages for pfns d2001 and d2000, and in each dump a register or a stack slot showed d2001730 or d2000730: pte flags 0x730 are PCD ACCESSED PROTNONE SPECIAL IOMAP; and Sasha's e820 map has a hole between cfffffff and 100000000, which would need special access. Commit c46a7c81 ("x86: define _PAGE_NUMA by reusing software bits on the PMD and PTE levels") has broken vm_normal_page(): a PROTNONE SPECIAL pte no longer passes the pte_special() test, so zap_pte_range() goes on to try to access a non-existent struct page. Fix this by refining pte_special() (SPECIAL with PRESENT or PROTNONE) to complement pte_numa() (SPECIAL with neither PRESENT nor PROTNONE). A hint that this was a problem was that c46a7c81 added pte_numa() test to vm_normal_page(), and moved its is_zero_pfn() test from slow to fast path: This was papering over a pte_special() snag when the zero page was encountered during zap. This patch reverts vm_normal_page() to how it was before, relying on pte_special(). It still appears that this patch may be incomplete: aren't there other places which need to be handling PROTNONE along with PRESENT? For example, pte_mknuma() clears _PAGE_PRESENT and sets _PAGE_NUMA, but on a PROT_NONE area, that would make it pte_special(). This is side-stepped by the fact that NUMA hinting faults skipped PROT_NONE VMAs and there are no grounds where a NUMA hinting fault on a PROT_NONE VMA would be interesting. Fixes: c46a7c81 ("x86: define _PAGE_NUMA by reusing software bits on the PMD and PTE levels") Reported-by:
Sasha Levin <sasha.levin@oracle.com> Tested-by:
Sasha Levin <sasha.levin@oracle.com> Signed-off-by:
Hugh Dickins <hughd@google.com> Signed-off-by:
Mel Gorman <mgorman@suse.de> Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@redhat.com> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Cyrill Gorcunov <gorcunov@gmail.com> Cc: Matthew Wilcox <matthew.r.wilcox@intel.com> Cc: <stable@vger.kernel.org> [3.16] Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Will Deacon authored
write{b,w,l,q}_relaxed are implemented by some architectures in order to permit memory-mapped I/O writes with weaker barrier semantics than the non-relaxed variants. This patch implements these write macros for Alpha, in the same vein as the relaxed read macros, which are already implemented. Acked-by:
Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Signed-off-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Matt Turner <mattst88@gmail.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Michael Cree authored
Signed-off-by:
Michael Cree <mcree@orcon.net.nz> Signed-off-by:
Matt Turner <mattst88@gmail.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Jiang Liu authored
Now IOAPIC driver dynamically allocates IRQ numbers for IOAPIC pins. We need to keep IRQ assignment for PCI devices during runtime power management, otherwise it may cause failure of device wakeups. Commit 3eec5952 "x86, irq, PCI: Keep IRQ assignment for PCI devices during suspend/hibernation" has fixed the issue for suspend/ hibernation, we also need the same fix for runtime device sleep too. Fix: https://bugzilla.kernel.org/show_bug.cgi?id=83271 Reported-and-Tested-by:
EmanueL Czirai <amanual@openmailbox.org> Signed-off-by:
Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: EmanueL Czirai <amanual@openmailbox.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Grant Likely <grant.likely@linaro.org> Link: http://lkml.kernel.org/r/1409304383-18806-1-git-send-email-jiang.liu@linux.intel.com Signed-off-by:
Thomas Gleixner <tglx@linutronix.de>
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- Aug 28, 2014
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Tony Lindgren authored
Commit 43fef47f (mfd: twl4030-power: Add a configuration to turn off oscillator during off-idle) added support for configuring the PMIC to cut off resources during deeper idle states to save power. This however caused regression for n900 display power that needed the PMIC configuration to be disabled with commit d937678a (ARM: dts: Revert enabling of twl configuration for n900). Turns out the root cause of the problem is that we must use TWL4030_RESCONFIG_UNDEF instead of DEV_GRP_NULL to avoid disabling regulators that may have been enabled before the init function for twl4030-power.c runs. With TWL4030_RESCONFIG_UNDEF we let the regulator framework control the regulators like it should. Here we need to only configure the sys_clken and sys_off_mode triggers for the regulators that cannot be done by the regulator framework as it's not running at that point. This allows us to enable the PMIC configuration for n900. Fixes: 43fef47f (mfd: twl4030-power: Add a configuration to turn off oscillator during off-idle) Cc: stable@vger.kernel.org # v3.16 Signed-off-by:
Tony Lindgren <tony@atomide.com> Tested-by:
Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Rajendra Nayak authored
To deal with IPs which are specific to dra74x and dra72x, maintain seperate ocp interface lists, while keeping the common list for all common IPs. Move USB OTG SS4 to dra74x only list since its unavailable in dra72x and is giving an abort during boot. The dra72x only list is empty for now and a placeholder for future hwmod additions which are specific to dra72x. Fixes: d904b38d ("ARM: DRA7: hwmod: Add SYSCONFIG for usb_otg_ss") Reported-by:
Keerthy <j-keerthy@ti.com> Signed-off-by:
Rajendra Nayak <rnayak@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Tested-by:
Nishanth Menon <nm@ti.com> [paul@pwsan.com: fixed comment style to conform with CodingStyle] Signed-off-by:
Paul Walmsley <paul@pwsan.com>
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Rajendra Nayak authored
Use the corresponding compatibles to identify the devices. Signed-off-by:
Rajendra Nayak <rnayak@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Acked-by:
Nishanth Menon <nm@ti.com> Tested-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
Paul Walmsley <paul@pwsan.com>
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- Aug 27, 2014
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Juri Lelli authored
Commit af040ffc ("ARM: make it easier to check the CPU part number correctly") changed ARM_CPU_PART_X masks, and the way they are returned and checked against. Usage of read_cpuid_part_number() is now deprecated, and calling places updated accordingly. This actually broke cpuidle-big_little initialization, as bl_idle_driver_init() performs a check using an hardcoded mask on cpu_id. Create an interface to perform the check (that is now even easier to read). Define also a proper mask (ARM_CPU_PART_MASK) that makes this kind of checks cleaner and helps preventing bugs in the future. Update usage accordingly. Signed-off-by:
Juri Lelli <juri.lelli@arm.com> Signed-off-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Mark Rutland authored
On revisions of Cortex-A15 prior to r3p3, a CLREX instruction at PL1 may falsely trigger a watchpoint exception, leading to potential data aborts during exception return and/or livelock. This patch resolves the issue in the following ways: - Replacing our uses of CLREX with a dummy STREX sequence instead (as we did for v6 CPUs). - Removing the clrex code from v7_exit_coherency_flush and derivatives, since this only exists as a minor performance improvement when non-cached exclusives are in use (Linux doesn't use these). Benchmarking on a variety of ARM cores revealed no measurable performance difference with this change applied, so the change is performed unconditionally and no new Kconfig entry is added. Signed-off-by:
Mark Rutland <mark.rutland@arm.com> Signed-off-by:
Will Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Mark Rutland authored
The ARMv6 and ARMv7 early abort handlers clear the exclusive monitors upon entry to the kernel, but this is redundant: - We clear the monitors on every exception return since commit 200b812d ("Clear the exclusive monitor when returning from an exception"), so this is not necessary to ensure the monitors are cleared before returning from a fault handler. - Any dummy STREX will target a temporary scratch area in memory, and may succeed or fail without corrupting useful data. Its status value will not be used. - Any other STREX in the kernel must be preceded by an LDREX, which will initialise the monitors consistently and will not depend on the earlier state of the monitors. Therefore we have no reason to care about the initial state of the exclusive monitors when a data abort is taken, and clearing the monitors prior to exception return (as we already do) is sufficient. This patch removes the redundant clearing of the exclusive monitors from the early abort handlers. Signed-off-by:
Mark Rutland <mark.rutland@arm.com> Acked-by:
Will Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Andrey Ryabinin authored
Kernel module build with GCOV profiling fails to load with the following error: $ insmod test_module.ko test_module: unknown relocation: 38 insmod: can't insert 'test_module.ko': invalid module format This happens because constructor pointers in the .init_array section have not supported R_ARM_TARGET1 relocation type. Documentation (ELF for the ARM Architecture) says: "The relocation must be processed either in the same way as R_ARM_REL32 or as R_ARM_ABS32: a virtual platform must specify which method is used." Since kernel expects to see absolute addresses in .init_array R_ARM_TARGET1 relocation type should be treated the same way as R_ARM_ABS32. Signed-off-by:
Andrey Ryabinin <a.ryabinin@samsung.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Jiang Liu authored
Commit 15a3c7cc "x86, irq: Introduce two helper functions to support irqdomain map operation" breaks LPSS ACPI enumerated devices. On startup, IOAPIC driver preallocates IRQ descriptors and programs IOAPIC pins with default level and polarity attributes for all legacy IRQs. Later legacy IRQ users may fail to set IOAPIC pin attributes if the requested attributes conflicts with the default IOAPIC pin attributes. So change mp_irqdomain_map() to allow the first legacy IRQ user to reprogram IOAPIC pin with different attributes. Reported-and-tested-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Grant Likely <grant.likely@linaro.org> Cc: Prarit Bhargava <prarit@redhat.com> Link: http://lkml.kernel.org/r/1409118795-17046-1-git-send-email-jiang.liu@linux.intel.com Signed-off-by:
Thomas Gleixner <tglx@linutronix.de>
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Rabeeh Khoury authored
This patch is important for the MicroSOM implementation due to the following details - 1. VIH of the Atheros phy is 1.7V. 2. NVCC_ENET which is the power domain of the MDIO pad is driven by the PHY's LDO (i.e. either 1.8v or 2.5v). 3. The MicroSOM implements an onbouard 1.6kohm pull up to 3.3v (R3000). In the case the PHY's LDO was 1.8v then there would be only a 100mV margin for the signal to be acknowledged as high (1.8v-1.7v). Due to that setting the pad as an open drain will let the 1.6kohm pull that signal high to 3.3 that assures enough margins to the PHY to be acked as '1' logic. Signed-off-by:
Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by:
Shawn Guo <shawn.guo@freescale.com>
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- Aug 26, 2014
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Tero Kristo authored
Similarly to DRA7, OMAP5 has l3 and l4 clock rates incorrectly calculated. Fixed by using proper divider clock types for the clock nodes. Signed-off-by:
Tero Kristo <t-kristo@ti.com> Reported-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Tested-by:
Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Peter Ujfalusi authored
IOVDD: tps65070's dcdc2 AVDD and DRVDD: fixed regulator derived from 5V via TPS73701DCQ DVDD: fixed regulator derived from 5V via TPS73701DCQ This patch needed to be able to probe the audio codec. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by:
Sekhar Nori <nsekhar@ti.com>
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