- Dec 14, 2011
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Govindraj.R authored
In preparation to UART runtime conversion remove uart specific calls from pm24xx/34xx files and their definition from serial.c These func calls will no more be used with upcoming uart runtime design. 1.) omap_uart_prepare_suspend :- can be taken care with driver suspend hooks. 2.) omap_uart_enable_irqs :- Used to enable/disable uart irq's in suspend path from PM code, this is removed as same is handled by uart_suspend_port/uart_resume_port in omap-serial driver which will do an port_shutdown on suspend freeing irq and port_startup on resume enabling back irq. 3.) Remove prepare_idle/resume_idle calls used to gate uart clocks. UART clocks can be gated within driver using runtime funcs and be woken up using irq_chaining from omap_prm driver. 4.) Remove console_locking from idle path as clock gating is done withing driver itself with runtime API. Remove is_suspending check used to acquire console_lock. Signed-off-by:
Govindraj.R <govindraj.raja@ti.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
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- Dec 13, 2011
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Hemant Pedanekar authored
This patch adds cpu type, macros for identification of TI814X device. Signed-off-by:
Hemant Pedanekar <hemantp@ti.com> [tony@atomide.com: left out CK_TI814X for now] Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Hemant Pedanekar authored
This patch updates existing macros, functions used for TI816X, to enable addition of other SoCs belonging to TI81XX family (e.g., TI814X). The approach taken is to use TI81XX/ti81xx for code/data going to be common across all TI81XX devices. cpu_is_ti81xx() is introduced to handle code common across TI81XX devices. In addition, ti8168_evm_map_io() is now replaced with ti81xx_map_io() and moved in mach-omap2/common.c as same will be used for TI814X and is not board specific. Signed-off-by:
Hemant Pedanekar <hemantp@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Leonid Iziumtsev authored
Add support for detection of the next chip in the OMAP4 family: OMAP4470 ES1.0 For more details on OMAP4470, visit: http://focus.ti.com/general/docs/wtbu/wtbuproductcontent.tsp?templateId=6123&navigationId=12869&contentId=123362 Signed-off-by:
Leonid Iziumtsev <x0153368@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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David Anders authored
allow for the omap4430 es2.3 revision to be recognized in the omap4_check_revision() function. most aspects of all omap4430 es2.x versions are identical, however a number of small variations such as default pullup or pulldown resistor configurations vary between revisions. detailed information on silicon errata for omap4430 revisions can be found at http://focus.ti.com/pdfs/wtbu/swpz009D.pdf Signed-off-by:
David Anders <x0132446@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Afzal Mohammed authored
This patch updates the common machine specific source files for support for AM33XX/AM335x with cpu type, macros for identification of AM33XX/AM335X device. Signed-off-by:
Afzal Mohammed <afzal@ti.com> Signed-off-by:
Vaibhav Hiremath <hvaibhav@ti.com> Reviewed-by:
Kevin Hilman <khilman@ti.com> Tested-by:
Kevin Hilman <khilman@ti.com> [tony@atomide.com: updated for map_io and common.h changes, dropped CK_AM33XX] Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Afzal Mohammed authored
This patch updates the common platform files with AM335X device support (AM33XX family). The approach taken in this patch is, AM33XX device will be considered as OMAP3 variant, and a separate SoC class created for AM33XX family of devices with a subclass type for AM335X device, which is newly added device in the family. This means, cpu_is_omap34xx(), cpu_is_am33xx() and cpu_is_am335x() checks will return success on AM335X device. A kernel config option CONFIG_SOC_OMAPAM33XX is added under OMAP3 to include support for AM33XX build. Also, cpu_mask and RATE_IN_XXX flags have crossed 8 bit hence struct clksel_rate.flags, struct prcm_config.flags and cpu_mask are changed to u16 from u8. Signed-off-by:
Afzal Mohammed <afzal@ti.com> Signed-off-by:
Vaibhav Hiremath <hvaibhav@ti.com> Cc: Hemant Pedanekar <hemantp@ti.com> [tony@atomide.com: left out CK_AM33XX for now] Signed-off-by:
Tony Lindgren <tony@atomide.com>
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- Dec 06, 2011
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Tony Lindgren authored
ARM restart changes needed changes to common.h to make it local. This conflicted with v3.2-rc4 DSS related hwmod changes that git mergetool was not able to handle. Signed-off-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Tony Lindgren authored
Otherwise we get the following error: In function 'omap_init_consistent_dma_size': error: implicit declaration of function 'init_consistent_dma_size' Signed-off-by:
Tony Lindgren <tony@atomide.com> Acked-by:
Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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- Dec 05, 2011
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Santosh Shilimkar authored
Fix the below build break by including common.h arch/arm/mach-omap2/cpuidle34xx.c: In function 'omap3_enter_idle': arch/arm/mach-omap2/cpuidle34xx.c:117: error: implicit declaration of function 'omap_irq_pending' make[1]: *** [arch/arm/mach-omap2/cpuidle34xx.o] Error 1 make: *** [arch/arm/mach-omap2] Error 2 Signed-off-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Santosh Shilimkar authored
Fix the build break by adding the necessary irq functions to common header. Signed-off-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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- Dec 02, 2011
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Ming Lei authored
This patch introduces .enable_irq and .disable_irq into struct arm_pmu_platdata, so platform specific irq enablement can be handled after request_irq, and platform specific irq disablement can be handled before free_irq. This patch is for support of pmu irq routed from CTI on omap4. Acked-by:
Jean Pihet <j-pihet@ti.com> Reviewed-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Ming Lei <ming.lei@canonical.com> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Ming Lei authored
OMAP4 uses cross trigger interface(CTI) to route performance monitor irq to GIC, so introduce cti helpers to make access for cti easily. Acked-by:
Jean Pihet <j-pihet@ti.com> Signed-off-by:
Ming Lei <ming.lei@canonical.com> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Will Deacon authored
armpmu_get_max_events is only called from perf_num_counters, so we can inline it there. It existed as a separate entity as a hangover from the original perf-based oprofile implementation. Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Will Deacon authored
Commit 8f622422 ("perf events: Add generic front-end and back-end stalled cycle event definitions") added two new ABI events for counting stalled cycles. This patch adds support for these new events to the ARM perf implementation. Cc: Jamie Iles <jamie@jamieiles.com> Cc: Jean Pihet <j-pihet@ti.com> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Will Deacon authored
This patch updates the ARMv7 perf event numbers so that: (1) A consistent naming scheme is used between different CPUs. (2) Only events actually used by Linux are described. (3) Where possible, architected events are used in preference to CPU-specific events. This results in the removal of a load of unused, hardcoded data and makes it more clear as to which events are supported on each PMU. Cc: Jean Pihet <j-pihet@ti.com> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Axel Lin authored
Trivial fix to fix below build error: CC arch/arm/mach-exynos/mach-universal_c210.o arch/arm/mach-exynos/mach-universal_c210.c:24: error: expected identifier or '(' before '<' token Signed-off-by:
Axel Lin <axel.lin@gmail.com> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com>
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Axel Lin authored
Fix below build error: CC arch/arm/mach-exynos/cpu.o arch/arm/mach-exynos/cpu.c: In function 'exynos4_init_irq': arch/arm/mach-exynos/cpu.c:245: error: 'gic_bank_offset' undeclared (first use in this function) arch/arm/mach-exynos/cpu.c:245: error: (Each undeclared identifier is reported only once arch/arm/mach-exynos/cpu.c:245: error: for each function it appears in.) arch/arm/mach-exynos/cpu.c:243: warning: unused variable 'bank_offset' make[1]: *** [arch/arm/mach-exynos/cpu.o] Error 1 make: *** [arch/arm/mach-exynos] Error 2 Signed-off-by:
Axel Lin <axel.lin@gmail.com> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com>
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- Nov 30, 2011
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Vincent Guittot authored
kernel/sched.c:7354:2: warning: initialization from incompatible pointer type Align cpu_coregroup_mask prototype interface with sched_domain_mask_f typedef use int cpu instead of unsigned int cpu Cc: <stable@vger.kernel.org> Signed-off-by:
Vincent Guittot <vincent.guittot@linaro.org> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Jon Medhurst (Tixy) authored
The SWP instruction is deprecated on ARMv6 and with ARMv7 it will be UNDEFINED when CONFIG_SWP_EMULATE is selected. In this case, probing a SWP instruction will cause an oops when the kprobes emulation code executes an undefined instruction. As the SWP instruction should be rare or non-existent in kernels for ARMv6 and later, we can simply avoid these problems by not allowing probing of these. Reported-by:
Leif Lindholm <leif.lindholm@arm.com> Tested-by:
Leif Lindholm <leif.lindholm@arm.com> Acked-by:
Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by:
Jon Medhurst <tixy@yxit.co.uk> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Jon Medhurst (Tixy) authored
There is a kprobes testcase for the instruction "strd r2, [r3], r4". This has unpredictable behaviour as it uses r3 for register writeback addressing and also stores it to memory. On a cortex A9, this testcase would fail because the instruction writes the updated value of r3 to memory, whereas the kprobes emulation code writes the original value. Fix this by changing testcase to used r5 instead of r3. Reported-by:
Leif Lindholm <leif.lindholm@arm.com> Tested-by:
Leif Lindholm <leif.lindholm@arm.com> Acked-by:
Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by:
Jon Medhurst <tixy@yxit.co.uk> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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- Nov 29, 2011
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Linus Walleij authored
This updates the Ux500 defconfig with the new drivers for HWSEM and AB5500 core that were merged in the 3.2 cycle. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This updates the U300 defconfig to support some new drivers like FSMC, sets it to use the MMC clock gating scheme, and removes some stale config options. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- Nov 27, 2011
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Nicolas Pitre authored
THIS IS A TEMPORARY HACK. The purpose of this is _only_ to avoid a regression on an existing machine while a better fix is implemented. On shmobile the consistent DMA memory area was set to 158MB in commit 28f0721a with no explanation. The documented size for this area should vary between 2MB and 14MB, and none of the other ARM targets exceed that. The included #warning is therefore meant to be noisy on purpose to get shmobile maintainers attention and this commit reverted once this consistent DMA size conflict is resolved. Signed-off-by:
Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Magnus Damm <damm@opensource.se> Cc: Paul Mundt <lethal@linux-sh.org>
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Nicolas Pitre authored
Signed-off-by:
Nicolas Pitre <nicolas.pitre@linaro.org>
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Nicolas Pitre authored
Now that we have all the static mappings from iotable_init() located in the vmalloc area, it is trivial to optimize ioremap by reusing those static mappings when the requested physical area fits in one of them, and so in a generic way for all platforms. Signed-off-by:
Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by:
Stephen Warren <swarren@nvidia.com> Tested-by:
Kevin Hilman <khilman@ti.com> Tested-by:
Jamie Iles <jamie@jamieiles.com>
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Nicolas Pitre authored
Firstly, there is no need to have a double pointer here as we're only walking the vmlist and not modifying it. Secondly, for the same reason, we don't need a write lock but only a read lock here, since the lock only protects the coherency of the list nothing else. Lastly, the reason for holding a lock is not what the comment says, so let's remove that misleading piece of information. Signed-off-by:
Nicolas Pitre <nicolas.pitre@linaro.org>
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Nicolas Pitre authored
In order to remove the build time variation between different SOCs with regards to VMALLOC_END, the iotable mappings are now allocated inside the vmalloc region. This allows for VMALLOC_END to be identical across all machines. The value for VMALLOC_END is now set to 0xff000000 which is right where the consistent DMA area starts. To accommodate all static mappings on machines with possible highmem usage, the default vmalloc area size is changed to 240 MB so that VMALLOC_START is no higher than 0xf0000000 by default. Signed-off-by:
Nicolas Pitre <nicolas.pitre@linaro.org> Tested-by:
Stephen Warren <swarren@nvidia.com> Tested-by:
Kevin Hilman <khilman@ti.com> Tested-by:
Jamie Iles <jamie@jamieiles.com>
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- Nov 26, 2011
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Will Deacon authored
Commit 4294f8ba ("ARM: gic: add irq_domain support") defines irq_start as irq_start = (irq_start & ~31) + 16; On a platform with a GIC and a CPU without PPIs, this results in irq_start being off by 16. This patch fixes gic_init so that we only carve out a PPI space when PPIs exist for the GIC being initialised. Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Marc Zyngier authored
When multiple GICs exist on a platform (RealView PB1176/11MP), we must make sure the PM notifier block is only registered once, otherwise we end up corrupting the PM notifier list. The fix is to only register the notifier when initializing the first GIC, as the power management functions seem to iterate over all the registered GICs. Tested on PB11MP and PB1176. Reported-by:
Will Deacon <will.deacon@arm.com> Tested-by:
Will Deacon <will.deacon@arm.com> Cc: Colin Cross <ccross@android.com> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Jon Medhurst authored
When compiling kprobes-test-thumb.c an error like below may occur: /tmp/ccKcuJcG.s:19179: Error: offset out of range This is caused by the compiler underestimating the size of the inline assembler instructions containing ".space 0x1000" and failing to spill the literal pool in time to prevent the generation of PC relative load instruction with invalid offsets. The fix implemented by this patch is to replace a single large .space directive by a number of 4 byte .space's. This requires splitting the macros which generate test cases for branch instructions into two forms: one with, and one without support for inserting extra code between branch and target. Acked-by:
Nicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by:
Jon Medhurst <jon.medhurst@linaro.org> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Sumit Bhattacharya authored
dma_alloc_coherent wants to split pages after allocation in order to reduce the memory footprint. This does not work well with GFP_COMP pages, so drop this flag before allocation. This patch is ported from arch/avr32 (commit 3611553e). [swarren: s/HUGETLB_PAGE/HUGETLBFS/ in comment, minor comment cleanup] Signed-off-by:
Sumit Bhattacharya <sumitb@nvidia.com> Tested-by:
Varun Colbert <vcolbert@nvidia.com> Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Will Deacon authored
The bitops functions (e.g. _test_and_set_bit) on ARM do not have unwind annotations and therefore the kernel cannot backtrace out of them on a fatal error (for example, NULL pointer dereference). This patch annotates the bitops assembly macros with UNWIND annotations so that we can produce a meaningful backtrace on error. Callers of the macros are modified to pass their function name as a macro parameter, enforcing that the macros are used as standalone function implementations. Acked-by:
Dave Martin <dave.martin@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Guennadi Liakhovetski authored
Fix compilation failure, when Thumb support is not enabled: arch/arm/kernel/entry-armv.S: Assembler messages: arch/arm/kernel/entry-armv.S:501: Error: backward ref to unknown label "2:" arch/arm/kernel/entry-armv.S:502: Error: backward ref to unknown label "3:" make[2]: *** [arch/arm/kernel/entry-armv.o] Error 1 Signed-off-by:
Guennadi Liakhovetski <g.liakhovetski@gmx.de> Reviewed-by:
Dave Martin <dave.martin@linaro.org> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Rob Herring authored
There are already cache type decoding functions, so use those instead of custom decode code which only works for ARMv6. Signed-off-by:
Rob Herring <rob.herring@calxeda.com> Acked-by:
Nicolas Pitre <nico@linaro.org> Acked-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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- Nov 24, 2011
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Tony Breeds authored
Signed-off-by:
Tony Breeds <tony@bakeyournoodle.com> Acked-by:
Josh Boyer <jwboyer@gmail.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Kumar Gala authored
arch/powerpc/mm/hugetlbpage.c: In function 'reserve_hugetlb_gpages': arch/powerpc/mm/hugetlbpage.c:312:2: error: implicit declaration of function 'parse_args' Signed-off-by:
Kumar Gala <galak@kernel.crashing.org> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Jean-Christophe PLAGNIOL-VILLARD authored
rename all Atmel reference board as soc defconfig Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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