- Mar 21, 2013
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Joachim Eastwood authored
GPIO pins used by i2c-gpio must be set to multi drive (open drain) to work properly. Signed-off-by:
Joachim Eastwood <manabian@gmail.com> Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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Joachim Eastwood authored
Signed-off-by:
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Richard Genoud authored
i2c-gpio is sometimes used in place of i2c-at91. This adds the pin muxes for the gpios. Signed-off-by:
Richard Genoud <richard.genoud@gmail.com> Acked-by:
Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by:
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Richard Genoud authored
This adds the at19 i2c controller pin muxes for at91sam9x5 based boards. Signed-off-by:
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- Mar 12, 2013
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Arnd Bergmann authored
The ab8500 device is a child of the prcmu device, which is a memory mapped bus device, whose children are addressable using physical memory addresses, not using mailboxes, so a mailbox number in the ab8500 node cannot be parsed by DT. Nothing uses this number, since it was only introduced as part of the failed attempt to clean up prcmu mailbox handling, and we can simply remove it. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Samuel Ortiz <sameo@linux.intel.com>
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- Mar 11, 2013
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Padmavathi Venna authored
This patch adds #dma-cells property to PL330 DMA controller nodes for supporting generic dma dt bindings on SOCFPGA platform. #dma-channels and #dma-requests are not required now but added in advance. Signed-off-by:
Padmavathi Venna <padma.v@samsung.com> Signed-off-by:
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- Mar 08, 2013
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Thomas Petazzoni authored
The orion5x-lacie-ethernet-disk-mini-v2.dts file was using "marvell-orion5x-88f5182" as a compatible string, while it should have been "marvell,orion5x-88f5182". Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
There is no need to have a #address-cells property in the MPIC Device Tree node, and more than that, having it confuses the of_irq_map_raw() logic, which will be used by the Marvell PCIe driver. Signed-off-by:
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Heikki Krogerus authored
Setting the reg-io-width to 1 byte represents more accurate description of the HW. This will fix an issue where UART driver causes kernel panic during bootup. Gregory CLEMENT traced the issue to autoconfig() in 8250.c, where the existence of FIFO is checked from UART_IIR register. The register is now read as 32-bit value as the reg-io-width is set to 4-bytes. The retuned value seems to contain bogus data for bits 31:8, causing the issue. Signed-off-by:
Heikki Krogerus <heikki.krogerus@linux.intel.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Tested-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by:
Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Tested-by:
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Jean-Francois Moine authored
The commit: 48be9ac9 ARM: Dove: split legacy and DT setup removed the RTC initialization. This patch re-enables the RTC via the DT. Signed-off-by:
Jean-François Moine <moinejf@free.fr> Signed-off-by:
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Florian Fainelli authored
This patch modifies the Armada 370 Reference Design DTS file to enable support for the two USB ports found on this board. Signed-off-by:
Florian Fainelli <florian@openwrt.org> Signed-off-by:
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Andrew Lunn authored
The Marvell RTC on Kirkwood makes use of the runit clock. Ensure the driver clk_prepare_enable() this clock, otherwise there is a danger the SoC will lockup when accessing RTC registers with the clock disabled. Reported-by:
Simon Baatz <gmbnomis@gmail.com> Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Tested-by:
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Andrew Lunn authored
The kirkwood SoC GPIO cores use the runit clock. Add code to clk_prepare_enable() runit, otherwise there is a danger of locking up the SoC by accessing the GPIO registers when runit clock is not ticking. Reported-by:
Linus Walleij <linus.walleij@linaro.org> Cc: <stable@vger.kernel.org> Signed-off-by:
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Jason Cooper authored
When DT support for kirkwood was first introduced, there was no clock infrastructure. As a result, we had to manually pass the clock-frequency to the driver from the device node. Unfortunately, on kirkwood, with minimal config or all module configs, clock-frequency breaks booting because of_serial doesn't consume the gate_clk when clock-frequency is defined. The end result on kirkwood is that runit gets gated, and then the boot fails when the kernel tries to write to the serial port. Fix the issue by removing the clock-frequency parameter from all kirkwood dts files. Booted on dreamplug without earlyprintk and successfully logged in via ttyS0. Reported-by:
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- Mar 05, 2013
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Prashant Gaikwad authored
As DT support for clocks and smp_twd is enabled, add clock entry for smp_twd clock to DT. This fixes the following error while booting the kernel: smp_twd: clock not found -2 Signed-off-by:
Prashant Gaikwad <pgaikwad@nvidia.com> [swarren: include kernel log spew that this fixes] Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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Stephen Warren authored
BCM2835-ARM-Peripherals.pdf states that the I2C module's input clock is nominally 150MHz, and that value is currently reflected in bcm2835.dtsi. However, practical measurements show that the rate is actually 250MHz, and this agrees with various downstream kernels. Switch the I2C clock's frequency to 250MHz so that the generated bus clock rate is accurate. Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org> Signed-off-by:
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- Mar 04, 2013
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Shawn Guo authored
According to fsl,imx53-pinctrl.txt, the pin number of DISP1_DAT_21 should be 545, while 543 is IPU_CSI0_D_3. Along with the change, one duplication of DISP1_DAT_0 in disp1-grp1 is removed. Signed-off-by:Shawn Guo <shawn.guo@linaro.org>
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- Feb 28, 2013
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Florian Fainelli authored
The Armada 370 Reference Design board has one SD card slot, directly connected to the SDIO IP of the SoC, so we enable this IP. there are no GPIOs for card-detect and write-protect so we do not specify any. Signed-off-by:
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Jason Cooper authored
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Jason Cooper authored
Signed-off-by: -
Andrew Lunn authored
Add a DT node for I2C and pinctrl hog for the pins. There appears to be an i2c bus on topkick with a device on it: i2cdetect 0 WARNING! This program can confuse your I2C bus, cause data loss and worse! I will probe file /dev/i2c-0. I will probe address range 0x03-0x77. Continue? [Y/n] y 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- 64 -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- Signed-off-by: -
Jason Cooper authored
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Sebastian Hesselbarth authored
of_serial now has support for using clocks property and we have a DT clock provider. This patch replaces the hard coded clock-frequency property with a clocks phandle to tclk. Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by:
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Gregory CLEMENT authored
This patch add support for the SPI flash MX25l25635E which is present on the Armada 370 DB board. This flash stores the bootloader and its environment. Signed-off-by:
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Gregory CLEMENT authored
This patch add support for the SPI flash M25P64 which is present on the Armada XP DB board. This flash stores the bootloader and its environment. Signed-off-by:
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Ezequiel Garcia authored
This patch adds an SPI master device node for Armada XP-GP board. This master node is an SPI flash controller 'n25q128a13'. Since there is no 'partitions' node declared, one full sized partition named as the device will be created. Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Lior Amsalem <alior@marvell.com> Tested-by:
Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by:
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Ezequiel Garcia authored
The Armada 370 and Armada XP SoC has an SPI controller. This patch adds support for this controller in Armada 370 and Armada XP SoC common device tree files. Note that the Armada XP SPI register length is 0x50 bytes, while Armada 370 SPI register length is 0x28 bytes, so we choose the smaller of the two. Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Lior Amsalem <alior@marvell.com> Acked-by:
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Gregory CLEMENT authored
Now that the time-armada-370-xp support local timers, updated the device tree to take it into account. Signed-off-by:
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Sebastian Hesselbarth authored
With DT support for orion-ehci also convert Dove to it and remove the legacy calls and clock aliases. This patch is based on "ARM: Dove: split legacy and DT setup" applied to mvebu/boards recently. Signed-off-by:
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Ezequiel Garcia authored
This patch activates every USB port provided by each SoC. Except for Armada XP Openblocks AX3-4 board, where we enable only the first two USB ports until we have more information on the third one usage. Cc: Lior Amsalem <alior@marvell.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Tested-by:
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Ezequiel Garcia authored
The Armada 370 and Armada XP SoC has an Orion EHCI USB controller. This patch adds support for this controller in Armada 370 and Armada XP SoC common device tree files. Cc: Lior Amsalem <alior@marvell.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by:
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Thomas Petazzoni authored
The OpenBlocks AX3-4 board has one software-controlled button on the front side, labeled "INIT", so we add minimal support for this button in the kernel. Signed-off-by:
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Andrew Lunn authored
Remove C code and add a Device Tree node in its place. Signed-off-by:
Simon Guinot <simon.guinot@sequanux.org> Signed-off-by:
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Andrew Lunn authored
Add a sub-node into the I2C node to represent the adt7476 device. Signed-off-by:
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Andrew Lunn authored
Remove the C code and add a Device Tree node for gpio-poweroff. Signed-off-by:
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Andrew Lunn authored
Signed-off-by:
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Sebastian Hesselbarth authored
CuBox needs to enable USB power on a gpio pin. Add a fixed regulator to always enable usb power on boot. Signed-off-by:
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Sebastian Hesselbarth authored
gpio-leds has support for pinctrl allocation, make use of it. Signed-off-by:
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Nobuhiro Iwamatsu authored
Signed-off-by:
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Nobuhiro Iwamatsu authored
Signed-off-by:
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