- Jul 04, 2016
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Chen-Yu Tsai authored
Add uart1 pins for 4 pin (RX/TX/RTS/CTS) mode. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
Move uart0 pins to sort the list of pin settings in alphabetical order. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The AXP809 PMIC is the primary PMIC. It provides various supply voltages for the SoC and other peripherals. The PMIC's interrupt line is connected to NMI pin of the SoC. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The AXP809 PMIC is the primary PMIC. It provides various supply voltages for the SoC and other peripherals. The PMIC's interrupt line is connected to NMI pin of the SoC. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The AXP809 PMIC is used with the Allwinner A80 SoC, along with an AXP806 PMIC as a slave. This patch adds a dtsi file for all the common bindings and default values unrelated to board design. Currently this is just listing all the regulator nodes. The regulators are initialized based on their device node names. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Michal Suchanek authored
spi2 is available on the UEXT connector Signed-off-by:
Michal Suchanek <hramrach@gmail.com> [Maxime: Fixed the node order] Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Michal Suchanek authored
Used on A10s Olinuxino. Signed-off-by:
Michal Suchanek <hramrach@gmail.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
Q8 form factor A13 tablets have a 7" LCD panel. Unfortunately we don't know the exact model of the panel. Just pick a panel with display timings close to what we know. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The Q8 tablets use the audio codec to provide audio output via a headphone jack or a small mono speaker. A GPIO output is used to control speaker amp. The tablets may or may not have an internal microphone. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
On the A13 Q8 tablets, the PMIC's USB power supply (VBUS) is connected to the external OTG port. This can be used to provide power and OTG VBUS sensing. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The output pin of LDO is also a GPIO pin, and the on/off settings of the regulator are actually pinmux settings. Disable it by default so it doesn't conflict with GPIO usage. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
Most of the display engine is shared between the R8 and the A13. Move the common parts to the Á13 DTSI. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
The RGB bus can be used in several configurations, one of which being the RGB666. Add a pinctrl group for that case. Acked-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Priit Laes authored
Enable the display and TCON clocks that are needed to drive the display engine, tcon and TV encoders. Signed-off-by:
Priit Laes <plaes@plaes.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Priit Laes authored
Enable the display and TCON clocks that are needed to drive the display engine, tcon and TV encoders. Signed-off-by:
Priit Laes <plaes@plaes.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Jun 29, 2016
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Hans de Goede authored
Fix pll3x2 and pll7x2 not having a parent clock, specifically this fixes the kernel turning of pll3 while simplefb is using it when uboot has configured things to use pll3x2 as lcd ch clk parent. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Jun 22, 2016
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Hans de Goede authored
Now that we've a clock node describing pll3 we must add it to the simplefb nodes clocks lists to avoid it getting turned off when simplefb is used. This fixes the screen going black when using simplefb. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Jun 16, 2016
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Boris Brezillon authored
The sun4i-timer driver registers its sched_clock only if the machine is compatible with "allwinner,sun5i-a13", "allwinner,sun5i-a10s" or "allwinner,sun4i-a10". Add the missing "allwinner,sun5i-a13" string to the machine compatible. Signed-off-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Fixes: 465a225f ("ARM: sun5i: Add C.H.I.P DTS") Cc: <stable@vger.kernel.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- May 11, 2016
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Boris Brezillon authored
The memory range assigned to the PMC (Power Management Controller) was not including the PMC_PCR register which are used to control peripheral clocks. This was working fine thanks to the page granularity of ioremap(), but started to fail when we switched to syscon/regmap, because regmap is making sure that all accesses are falling into the reserved range. Signed-off-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Reported-by:
Richard Genoud <richard.genoud@gmail.com> Tested-by:
Richard Genoud <richard.genoud@gmail.com> Fixes: 863a81c3 ("clk: at91: make use of syscon to share PMC registers in several drivers") Cc: <stable@vger.kernel.org> Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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- May 10, 2016
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Marc Gonzalez authored
The device driver was added in v4.5 by commit dca536c4 ("watchdog: add support for Sigma Designs SMP86xx/SMP87xx") Signed-off-by:
Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Marc Gonzalez authored
This platform will use the new generic platdev driver. Signed-off-by:
Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Marc Gonzalez authored
Commit fefe0535 ("clk: tango4: improve clkgen driver") added support for USB and SDIO clocks. Signed-off-by:
Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Marc Gonzalez authored
Define the CPU temperature sensor, and critical trip point. Commit 799d71da471c ("add temperature sensor support for tango SoC") added the device driver. Acked-by:
Eduardo Valentin <edubezval@gmail.com> Signed-off-by:
Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Wenyou Yang authored
An error in documentation of the NAND Flash Controller (NFC) led to choose another compatibility string for sama5d2 with an impact on the NAND flash ready/busy information. It was producing the error message: atmel_nand 80000000.nand: Time out to wait for interrupt: 0x08000000 and had an impact on performance. So, switch back to the classical "atmel,sama5d3-nfc" compatibility string for this SoC which gives the proper ready/busy bit information. The NAND flash driver will be updated to remove the support for this different implementation. Signed-off-by:
Wenyou Yang <wenyou.yang@atmel.com> Acked-by:
Romain Izard <romain.izard.pro@gmail.com> [nicolas.ferre@atmel.com: change commit message] Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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- May 09, 2016
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Joel Stanley authored
This adds a common device tree for all fifth generation Aspeed systems, and a board specific device tree for the ast2500 evaluation board. Signed-off-by:
Joel Stanley <joel@jms.id.au>
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Joel Stanley authored
A common device tree for all forth gen/ast2400 systems and a board specific dts for the Palmetto OpenPower developemnt machine which was used for testing. Signed-off-by:
Joel Stanley <joel@jms.id.au>
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- May 08, 2016
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Priit Laes authored
Enable pll3 and pll7 clocks that are needed by display clocks. Signed-off-by:
Priit Laes <plaes@plaes.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Olliver Schinagl authored
There are 3 kinds of OLinuXino Lime2 boards. One without any on board storage, one with NAND storage and one with eMMC storage. This patch adds the eMMC variant of boards. eMMC storage is different from a regular SD card in that it is soldered on the board and cannot be changed. Additionally, it shares pins with the NAND module and with the second SPI port. Signed-off-by:
Olliver Schinagl <oliver@schinagl.nl> [Maxime: Removed the change log from the commit log] Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- May 06, 2016
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Marek Szyprowski authored
MAX8997 PMIC requires interrupt and fails probing without it. Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Fixes: d105f0b1 ("ARM: dts: Add basic dts file for Samsung Trats board") Cc: <stable@vger.kernel.org> [k.kozlowski: Write commit message, add CC-stable] Signed-off-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com>
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Marek Szyprowski authored
The usage of slash character causes failure when creating regulator debugfs entry. Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> [k.kozlowski: Write commit message] Signed-off-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com>
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Javier Martinez Canillas authored
The MFC nodes with the memory regions reserved for memory allocations are missing in the Exynos5420 Peach Pit and Exynos5800 Peach Pi DTS. This causes the s5p-mfc driver probe to fail with the following error: [ 4.140647] s5p_mfc_alloc_memdevs:1072: Failed to declare coherent memory for MFC device [ 4.216163] s5p-mfc: probe of 11000000.codec failed with error -12 Add the missing nodes so the driver probes and the {en,de}coder video nodes are registered correctly: [ 4.096277] s5p-mfc 11000000.codec: decoder registered as /dev/video4 [ 4.102282] s5p-mfc 11000000.codec: encoder registered as /dev/video5 Signed-off-by:
Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com>
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Mike Williams authored
Add node to support SAMA5D4 hardware random number generator. Signed-off-by:
Mike Williams <mike@mikebwilliams.com> [nicolas.ferre@atmel.com: reduce the register map size] Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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Mike Williams authored
Add node to support SAMA5D3 hardware random number generator. Signed-off-by:
Mike Williams <mike@mikebwilliams.com> [nicolas.ferre@atmel.com: reduce the register map size] Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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Mike Williams authored
Add node to support SAMA5D2 hardware random number generator. Signed-off-by:
Mike Williams <mike@mikebwilliams.com> [nicolas.ferre@atmel.com: reduce the register map size] Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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Nicolas Ferre authored
No need to map 0x4000 bytes for the TRNG device: reduce it to 0x100. Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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- May 04, 2016
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Priit Laes authored
Enable pll3 and pll7 clocks that are needed to drive display clocks. Signed-off-by:
Priit Laes <plaes@plaes.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
The CHIP has a composite output available muxed with the microphone in the micro-jack plug. Enable the composite output in its DTS. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
The TCON, tv-encoder and display engine backends and frontends are combined to create our display pipeline. Add them to the R8 DTSI. It's supposed to be perfectly compatible with the A10s and A13, but since we haven't tested it on them yet, it's safer to just enable it on the R8. Eventually, it should be moved to sun5i.dtsi Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
Enable the display and TCON (channel 0 and channel 1) clocks that are going to be needed to drive the display engine, tcon and TV encoders. Acked-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Linus Walleij authored
Configure the two accelerometers sharing GPIO line 82 as: - Open drain so that they can share the same interrupt line. Configure the corresponding interrupt pin: - Trigger on the falling edge since open drain implies that we do not actively drive the line high, but we will actively drive it low to generate interrupts and then it moves from high to low i.e. a falling edge. - Pulled up so the line will be biased to high unless an IRQ is active on any device on the line, and thus it goes high again after the interrupt is deasserted. Cc: linux-iio@vger.kernel.org Cc: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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