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  1. Jul 16, 2010
    • Russell King's avatar
      ARM: OMAP: Cleanup OMAP FB SDRAM reservation · a1af0fbb
      Russell King authored
      
      
      The logic in this file is rather convoluted, but essentially:
      
      1. region type 0 is SDRAM
      2. referring to the code fragment
                      if (set_fbmem_region_type(&rg, OMAPFB_MEMTYPE_SDRAM,
                                                sdram_start, sdram_size) < 0 ||
                          (rg.type != OMAPFB_MEMTYPE_SDRAM))
                              continue;
         - if rg.type is not OMAPFB_MEMTYPE_SDRAM, set_fbmem_region_type()
           returns zero immediately (since rg.type is non-zero), and so we
           'continue'.
         - if rg.type is OMAPFB_MEMTYPE_SDRAM, and rg.paddr is zero,
           we fall through.
         - if rg.type is OMAPFB_MEMTYPE_SDRAM, and the region lies within
           SDRAM, we fall through.
         - if rg.type is OMAPFB_MEMTYPE_SDRAM, and the region is not within
           SDRAM, we 'continue'.
      3. check_fbmem_region seems unnecessary.
         - we know rg.type is OMAPFB_MEMTYPE_SDRAM
         - we can check rg.size independently
         - bootmem_reserve() can check for overlapping reservations itself
         - we've already validated that the requested region lies within SDRAM.
      4. avoid BUG()ing if the region entry is already set; print an error,
         and mark the configuration invalid - at least we'll continue booting
         so the error message has a chance of being logged/visible via serial
         console.
      
      With these changes in place, it makes the code much easier to understand
      and hence easier to convert to LMB.
      
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      a1af0fbb
    • Russell King's avatar
      ARM: Move platform memory reservations out of generic code · 98c672cf
      Russell King authored
      
      
      Move the platform specific bootmem memory reservations out of
      arch/arm/mm/mmu.c into their respective platform files.
      
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      98c672cf
    • Russell King's avatar
      ARM: Remove 'node' argument form arch_adjust_zones() · b65b4781
      Russell King authored
      
      
      Since we no longer support discontigmem, node is always zero, so
      remove this argument.
      
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      b65b4781
    • Russell King's avatar
      ARM: Remove DISCONTIGMEM support · be370302
      Russell King authored
      
      
      Everything should now be using sparsemem rather than discontigmem, so
      remove the code supporting discontigmem from ARM.
      
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      be370302
    • Russell King's avatar
      ARM: Precalculate vmalloc_min · 79612395
      Russell King authored
      
      
      Rather than storing the minimum size of the vmalloc area, store the
      maximum permitted address of the vmalloc area instead.
      
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      79612395
  2. Jul 14, 2010
  3. Jul 12, 2010
  4. Jul 11, 2010
    • Matthew McClintock's avatar
      powerpc/fsl-booke: Fix address issue when using relocatable kernels · 77154a20
      Matthew McClintock authored
      
      
      When booting a relocatable kernel it needs to jump to the correct
      start address, which for BookE parts is usually unchanged
      regardless of the physical memory offset.
      
      Recent changes cause problems with how we calculate the start
      address, it was always adding the RMO into the start address
      which is incorrect. This patch only adds in the RMO offset
      if we are in the kexec code path, as it needs the RMO to work
      correctly.
      
      Instead of adding the RMO offset in in the common code path, we
      can just set r6 to the RMO offset in the kexec code path instead
      of to zero, and finally perform the masking in the common code
      path
      
      Signed-off-by: default avatarMatthew McClintock <msm@freescale.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      77154a20
    • Anton Vorontsov's avatar
      powerpc/cpm1: Mark micropatch code/data static and __init · af71bcfe
      Anton Vorontsov authored
      
      
      This saves runtime memory and fixes lots of sparse warnings like this:
      
          CHECK   arch/powerpc/sysdev/micropatch.c
        arch/powerpc/sysdev/micropatch.c:27:6: warning: symbol 'patch_2000'
        was not declared. Should it be static?
        arch/powerpc/sysdev/micropatch.c:146:6: warning: symbol 'patch_2f00'
        was not declared. Should it be static?
        ...
      
      Signed-off-by: default avatarAnton Vorontsov <avorontsov@mvista.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      af71bcfe
    • Anton Vorontsov's avatar
      powerpc/cpm1: Fix build with various CONFIG_*_UCODE_PATCH combinations · 2069a6ae
      Anton Vorontsov authored
      
      
      Warnings are treated as errors for arch/powerpc code, so build fails
      with CONFIG_I2C_SPI_UCODE_PATCH=y:
      
          CC      arch/powerpc/sysdev/micropatch.o
        cc1: warnings being treated as errors
        arch/powerpc/sysdev/micropatch.c: In function 'cpm_load_patch':
        arch/powerpc/sysdev/micropatch.c:630: warning: unused variable 'smp'
        make[1]: *** [arch/powerpc/sysdev/micropatch.o] Error 1
      
      And with CONFIG_USB_SOF_UCODE_PATCH=y:
      
        CC      arch/powerpc/sysdev/micropatch.o
        cc1: warnings being treated as errors
        arch/powerpc/sysdev/micropatch.c: In function 'cpm_load_patch':
        arch/powerpc/sysdev/micropatch.c:629: warning: unused variable 'spp'
        arch/powerpc/sysdev/micropatch.c:628: warning: unused variable 'iip'
        make[1]: *** [arch/powerpc/sysdev/micropatch.o] Error 1
      
      This patch fixes these issues by introducing proper #ifdefs.
      
      Cc: <stable@kernel.org> [ .33, .34 ]
      Signed-off-by: default avatarAnton Vorontsov <avorontsov@mvista.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      2069a6ae
    • Anton Vorontsov's avatar
      powerpc/cpm: Reintroduce global spi_pram struct (fixes build issue) · 56825c88
      Anton Vorontsov authored
      
      
      spi_t was removed in commit 644b2a68
      ("powerpc/cpm: Remove SPI defines and spi structs"), the commit assumed
      that spi_t isn't used anywhere outside of the spi_mpc8xxx driver. But
      it appears that the struct is needed for micropatch code. So, let's
      reintroduce the struct.
      
      Fixes the following build issue:
      
          CC      arch/powerpc/sysdev/micropatch.o
        micropatch.c: In function 'cpm_load_patch':
        micropatch.c:629: error: expected '=', ',', ';', 'asm' or '__attribute__' before '*' token
        micropatch.c:629: error: 'spp' undeclared (first use in this function)
        micropatch.c:629: error: (Each undeclared identifier is reported only once
        micropatch.c:629: error: for each function it appears in.)
      
      Reported-by: default avatarLEROY Christophe <christophe.leroy@c-s.fr>
      Reported-by: default avatarTony Breeds <tony@bakeyournoodle.com>
      Cc: <stable@kernel.org> [ .33, .34 ]
      Signed-off-by: default avatarAnton Vorontsov <avorontsov@mvista.com>
      Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
      56825c88
  5. Jul 10, 2010
    • Russell King's avatar
      ARM: lockdep: fix unannotated irqs-on · ac78884e
      Russell King authored
      
      
      CPU: Testing write buffer coherency: ok
      ------------[ cut here ]------------
      WARNING: at kernel/lockdep.c:3145 check_flags+0xcc/0x1dc()
      Modules linked in:
      [<c0035120>] (unwind_backtrace+0x0/0xf8) from [<c0355374>] (dump_stack+0x20/0x24)
      [<c0355374>] (dump_stack+0x20/0x24) from [<c0060c04>] (warn_slowpath_common+0x58/0x70)
      [<c0060c04>] (warn_slowpath_common+0x58/0x70) from [<c0060c3c>] (warn_slowpath_null+0x20/0x24)
      [<c0060c3c>] (warn_slowpath_null+0x20/0x24) from [<c008f224>] (check_flags+0xcc/0x1dc)
      [<c008f224>] (check_flags+0xcc/0x1dc) from [<c00945dc>] (lock_acquire+0x50/0x140)
      [<c00945dc>] (lock_acquire+0x50/0x140) from [<c0358434>] (_raw_spin_lock+0x50/0x88)
      [<c0358434>] (_raw_spin_lock+0x50/0x88) from [<c00fd114>] (set_task_comm+0x2c/0x60)
      [<c00fd114>] (set_task_comm+0x2c/0x60) from [<c007e184>] (kthreadd+0x30/0x108)
      [<c007e184>] (kthreadd+0x30/0x108) from [<c0030104>] (kernel_thread_exit+0x0/0x8)
      ---[ end trace 1b75b31a2719ed1c ]---
      possible reason: unannotated irqs-on.
      irq event stamp: 3
      hardirqs last  enabled at (2): [<c0059bb0>] finish_task_switch+0x48/0xb0
      hardirqs last disabled at (3): [<c002f0b0>] ret_slow_syscall+0xc/0x1c
      softirqs last  enabled at (0): [<c005f3e0>] copy_process+0x394/0xe5c
      softirqs last disabled at (0): [<(null)>] (null)
      
      Fix this by ensuring that the lockdep interrupt state is manipulated in
      the appropriate places.  We essentially treat userspace as an entirely
      separate environment which isn't relevant to lockdep (lockdep doesn't
      monitor userspace.)  We don't tell lockdep that IRQs will be enabled
      in that environment.
      
      Instead, when creating kernel threads (which is a rare event compared
      to entering/leaving userspace) we have to update the lockdep state.  Do
      this by starting threads with IRQs disabled, and in the kthread helper,
      tell lockdep that IRQs are enabled, and enable them.
      
      This provides lockdep with a consistent view of the current IRQ state
      in kernel space.
      
      This also revert portions of 0d928b0b
      which didn't fix the problem.
      
      Tested-by: default avatarMing Lei <tom.leiming@gmail.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      ac78884e
  6. Jul 09, 2010
    • Linus Walleij's avatar
      ARM: 6184/2: ux500: use neutral PRCMU base · d9e38040
      Linus Walleij authored
      
      
      The MTU wallclock timing fix-up patch was hardwired to the DB8500
      causing a regression. This makes it work on the DB5500 as well.
      
      Signed-off-by: default avatarLinus Walleij <linus.walleij@stericsson.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      d9e38040
    • Will Deacon's avatar
      ARM: 6212/1: atomic ops: add memory constraints to inline asm · 398aa668
      Will Deacon authored
      Currently, the 32-bit and 64-bit atomic operations on ARM do not
      include memory constraints in the inline assembly blocks. In the
      case of barrier-less operations [for example, atomic_add], this
      means that the compiler may constant fold values which have actually
      been modified by a call to an atomic operation.
      
      This issue can be observed in the atomic64_test routine in
      <kernel root>/lib/atomic64_test.c:
      
      00000000 <test_atomic64>:
         0:	e1a0c00d 	mov	ip, sp
         4:	e92dd830 	push	{r4, r5, fp, ip, lr, pc}
         8:	e24cb004 	sub	fp, ip, #4
         c:	e24dd008 	sub	sp, sp, #8
        10:	e24b3014 	sub	r3, fp, #20
        14:	e30d000d 	movw	r0, #53261	; 0xd00d
        18:	e3011337 	movw	r1, #4919	; 0x1337
        1c:	e34c0001 	movt	r0, #49153	; 0xc001
        20:	e34a1aa3 	movt	r1, #43683	; 0xaaa3
        24:	e16300f8 	strd	r0, [r3, #-8]!
        28:	e30c0afe 	movw	r0, #51966	; 0xcafe
        2c:	e30b1eef 	movw	r1, #48879	; 0xbeef
        30:	e34d0eaf 	movt	r0, #57007	; 0xdeaf
        34:	e34d1ead 	movt	r1, #57005	; 0xdead
        38:	e1b34f9f 	ldrexd	r4, [r3]
        3c:	e1a34f90 	strexd	r4, r0, [r3]
        40:	e3340000 	teq	r4, #0
        44:	1afffffb 	bne	38 <test_atomic64+0x38>
        48:	e59f0004 	ldr	r0, [pc, #4]	; 54 <test_atomic64+0x54>
        4c:	e3a0101e 	mov	r1, #30
        50:	ebfffffe 	bl	0 <__bug>
        54:	00000000 	.word	0x00000000
      
      The atomic64_set (0x38-0x44) writes to the atomic64_t, but the
      compiler doesn't see this, assumes the test condition is always
      false and generates an unconditional branch to __bug. The rest of the
      test is optimised away.
      
      This patch adds suitable memory constraints to the atomic operations on ARM
      to ensure that the compiler is informed of the correct data hazards. We have
      to use the "Qo" constraints to avoid hitting the GCC anomaly described at
      http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44492
      
       , where the compiler
      makes assumptions about the writeback in the addressing mode used by the
      inline assembly. These constraints forbid the use of auto{inc,dec} addressing
      modes, so it doesn't matter if we don't use the operand exactly once.
      
      Cc: stable@kernel.org
      Reviewed-by: default avatarNicolas Pitre <nicolas.pitre@linaro.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      398aa668
    • Will Deacon's avatar
      ARM: 6211/1: atomic ops: fix register constraints for atomic64_add_unless · 068de8d1
      Will Deacon authored
      
      
      The atomic64_add_unless function compares an atomic variable with
      a given value and, if they are not equal, adds another given value
      to the atomic variable. The function returns zero if the addition
      did not occur and non-zero otherwise.
      
      On ARM, the return value is initialised to 1 in C code. Inline assembly
      code then performs the atomic64_add_unless operation, setting the
      return value to 0 iff the addition does not occur. This means that
      when the addition *does* occur, the value of ret must be preserved
      across the inline assembly and therefore requires a "+r" constraint
      rather than the current one of "=&r".
      
      Thanks to Nicolas Pitre for helping to spot this.
      
      Cc: stable@kernel.org
      Reviewed-by: default avatarNicolas Pitre <nicolas.pitre@linaro.org>
      Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      068de8d1
    • Sascha Hauer's avatar
      ARM: 6210/1: Do not rely on reset defaults of L2X0_AUX_CTRL · 4082cfa7
      Sascha Hauer authored
      
      
      On i.MX35 the L2X0_AUX_CTRL register does not have sensible reset
      default values. Allow them to be overwritten with the aux_val/aux_mask
      arguments passed to l2x0_init().
      
      Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
      Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
      Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
      4082cfa7
  7. Jul 08, 2010
  8. Jul 06, 2010
    • Avi Kivity's avatar
      KVM: VMX: Fix host MSR_KERNEL_GS_BASE corruption · da38f438
      Avi Kivity authored
      
      
      enter_lmode() and exit_lmode() modify the guest's EFER.LMA before calling
      vmx_set_efer().  However, the latter function depends on the value of EFER.LMA
      to determine whether MSR_KERNEL_GS_BASE needs reloading, via
      vmx_load_host_state().  With EFER.LMA changing under its feet, it took the
      wrong choice and corrupted userspace's %gs.
      
      This causes 32-on-64 host userspace to fault.
      
      Fix not touching EFER.LMA; instead ask vmx_set_efer() to change it.
      
      Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
      da38f438
  9. Jul 05, 2010
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