- Mar 26, 2014
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James Hogan authored
Add a CPU_P5600 case to various switch statements, doing the same thing as for CPU_PROAPTIV. Signed-off-by:
James Hogan <james.hogan@imgtec.com> Reviewed-by:
Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6408/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Paul Burton authored
This patch adds a simple handler for MSA FP exceptions which delivers a SIGFPE to the running task. In the future it should probably be extended to re-execute the instruction with the MSACSR.NX bit set in order to generate results for any elements which did not cause an exception before delivering the SIGFPE signal. Signed-off-by:
Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6432/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Paul Burton authored
This patch adds support for context switching the MSA vector registers. These 128 bit vector registers are aliased with the FP registers - an FP register accesses the least significant bits of the vector register with which it is aliased (ie. the register with the same index). Due to both this & the requirement that the scalar FPU must be 64-bit (FR=1) if enabled at the same time as MSA the kernel will enable MSA & scalar FP at the same time for tasks which use MSA. If we restore the MSA vector context then we might as well enable the scalar FPU since the reason it was left disabled was to allow for lazy FP context restoring - but we just restored the FP context as it's a subset of the vector context. If we restore the FP context and have previously used MSA then we have to restore the whole vector context anyway (see comment in enable_restore_fp_context for details) so similarly we might as well enable MSA. Thus if a task does not use MSA then it will continue to behave as without this patch - the scalar FP context will be saved & restored as usual. But if a task executes an MSA instruction then it will save & restore the vector context forever more. Signed-off-by:
Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6431/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Mar 06, 2014
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Steven J. Hill authored
The 1074K is a multiprocessing coherent processing system (CPS) based on modified 74K cores. This patch makes the 1074K an actual unique CPU type, instead of a 74K derivative, which it is not. Signed-off-by:
Steven J. Hill <Steven.Hill@imgtec.com> Reviewed-by:
Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6389/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Jan 22, 2014
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Leonid Yegoshin authored
The interAptiv is a power-efficient multi-core microprocessor for use in system-on-chip (SoC) applications. The interAptiv combines a multi-threading pipeline with a coherence manager to deliver improved computational throughput and power efficiency. The interAptiv can contain one to four MIPS32R3 interAptiv cores, system level coherence manager with L2 cache, optional coherent I/O port, and optional floating point unit. Signed-off-by:
Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by:
Markos Chandras <markos.chandras@imgtec.com> Signed-off-by:
John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6163/
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Leonid Yegoshin authored
The Fixed Page Size TLB (FTLB) is a set-associative dual entry TLB. Its purpose is to reduce the number of TLB misses by increasing the effective TLB size and keep the implementation complexity to minimum levels. A supported core can have both VTLB and FTLB. Reviewed-by:
James Hogan <james.hogan@imgtec.com> Reviewed-by:
Paul Burton <paul.burton@imgtec.com> Signed-off-by:
Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by:
Markos Chandras <markos.chandras@imgtec.com> Signed-off-by:
John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6139/
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Leonid Yegoshin authored
The proAptiv Multiprocessing System is a power efficient multi-core microprocessor for use in system-on-chip (SoC) applications. The proAptiv Multiprocessing System combines a deep pipeline with multi-issue out of order execution for improved computational throughput. The proAptiv Multiprocessing System can contain one to six MIPS32r3 proAptiv cores, system level coherence manager with L2 cache, optional coherent I/O port, and optional floating point unit. Signed-off-by:
Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by:
Markos Chandras <markos.chandras@imgtec.com> Signed-off-by:
John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6134/
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Leonid Yegoshin authored
The cacheer register is always implemented in the same way in the MIPS32r2 Imgtec cores so print the ES bit when an cache error occurs. Signed-off-by:
Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by:
Markos Chandras <markos.chandras@imgtec.com> Signed-off-by:
John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6041/
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- Jan 13, 2014
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Paul Burton authored
CPUs implementing MIPS32 R2 may include a 64-bit FPU, just as MIPS64 CPUs do. In order to preserve backwards compatibility a 64-bit FPU will act like a 32-bit FPU (by accessing doubles from the least significant 32 bits of an even-odd pair of FP registers) when the Status.FR bit is zero, again just like a mips64 CPU. The standard O32 ABI is defined expecting a 32-bit FPU, however recent toolchains support use of a 64-bit FPU from an O32 MIPS32 executable. When an ELF executable is built to use a 64-bit FPU a new flag (EF_MIPS_FP64) is set in the ELF header. With this patch the kernel will check the EF_MIPS_FP64 flag when executing an O32 binary, and set Status.FR accordingly. The addition of O32 64-bit FP support lessens the opportunity for optimisation in the FPU emulator, so a CONFIG_MIPS_O32_FP64_SUPPORT Kconfig option is introduced to allow this support to be disabled for those that don't require it. Inspired by an earlier patch by Leonid Yegoshin, but implemented more cleanly & correctly. Signed-off-by:
Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Paul Burton <paul.burton@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/6154/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Oct 29, 2013
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Ralf Baechle authored
Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Leonid Yegoshin authored
An NMI exception delivered from YAMON delivers the PC in ErrorPC instead of EPC. It's also necessary to clear the Status.BEV bit for the page fault exception handler to work properly. [ralf@linux-mips: Let the assembler do the loading of the mask value rather than the convoluted explicit %hi/%lo manual relocation sequence from the original patch.] Signed-off-by:
Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by:
Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6035/ Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Reviewed-by:
Markos Chandras <markos.chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/6084/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Markos Chandras authored
Checking for n<0 && n>9 makes no sense because it can never be true. Moreover, we can have up to 64 vectored interrupts so BUG_ON(n>9) was wrong anyway. Signed-off-by:
Markos Chandras <markos.chandras@imgtec.com> Acked-by:
Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5909/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Sep 17, 2013
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Ralf Baechle authored
o Move current_cpu_type() to a separate header file o #ifdefing on supported CPU types lets modern GCC know that certain code in callers may be discarded ideally turning current_cpu_type() into a function returning a constant. o Use current_cpu_type() rather than direct access to struct cpuinfo_mips. Signed-off-by:
Ralf Baechle <ralf@linux-mips.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5833/
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- Jul 17, 2013
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Ralf Baechle authored
panic() doesn't return so this call was useless. Signed-off-by:
Ralf Baechle <ralf@linux-mips.org> Reported-by:
Alexander Sverdlin <alexander.sverdlin@nsn.com>
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- Jul 14, 2013
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Paul Gortmaker authored
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream. The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) and are flagged as __cpuinit -- so if we remove the __cpuinit from the arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit related content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. Here, we remove all the MIPS __cpuinit from C code and __CPUINIT from asm files. MIPS is interesting in this respect, because there are also uasm users hiding behind their own renamed versions of the __cpuinit macros. [1] https://lkml.org/lkml/2013/5/20/589 [ralf@linux-mips.org: Folded in Paul's followup fix.] Signed-off-by:
Paul Gortmaker <paul.gortmaker@windriver.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5494/ Patchwork: https://patchwork.linux-mips.org/patch/5495/ Patchwork: https://patchwork.linux-mips.org/patch/5509/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Jul 01, 2013
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Steven J. Hill authored
The ISA exception bit selects whether exceptions are taken in classic or microMIPS mode. This bit is Config3.ISAOnExc and was improperly defined as bits 16 and 17 instead of just bit 16. A new function was added so that platforms could set this bit when running a kernel compiled with only microMIPS instructions. Signed-off-by:
Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5377/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
MIPS I is the ancestor of all MIPS ISA and architecture variants. Anything ever build in the MIPS empire is either MIPS I or at least contains MIPS I. If it's running Linux, that is. So there is little point in having cpu_has_mips_1 because it will always evaluate as true - though usually only at runtime. Thus there is no point in having the MIPS_CPU_ISA_I ISA flag, so get rid of it. Little complication: traps.c was using a test for a pure MIPS I ISA as a test for an R3000-style cp0. To deal with that, use a check for cpu_has_3kex or cpu_has_4kex instead. cpu_has_3kex is a new macro. At the moment its default implementation is !cpu_has_4kex but this may eventually change if Linux is ever going to support the oddball MIPS processors R6000 and R8000 so users of either of these macros should not make any assumptions. Signed-off-by:
Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5551/
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- Jun 25, 2013
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Jonas Gorski authored
When having enabled MIPS_PGD_C0_CONTEXT, trap_init() might call the generated tlbmiss_handler_setup_pgd before it was committed to memory, causing boot failures: trap_init() |- per_cpu_trap_init() | |- TLBMISS_HANDLER_SETUP() | |- tlbmiss_handler_setup_pgd() |- flush_tlb_handlers() To avoid this, move flush_tlb_handlers() into build_tlb_refill_handler() right after they were generated. We can do this as the cache handling is initialized just before creating the tlb handlers. This issue was introduced in 3d8bfdd0 ("MIPS: Use C0_KScratch (if present) to hold PGD pointer."). Signed-off-by:
Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Jayachandran C <jchandra@broadcom.com> Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/5539/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Jun 13, 2013
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Jayachandran C authored
Kernel threads should be able to use COP2 if the platform needs it. Do not call die_if_kernel() for a coprocessor unusable exception if the exception due to COP2 usage. Instead, the default notifier for COP2 exceptions is updated to call die_if_kernel. Signed-off-by:
Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/5415/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Jun 10, 2013
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Ralf Baechle authored
This enables support for CONFIG_NO_HZ_FULL. Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- May 23, 2013
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Maciej W. Rozycki authored
2a0b24f5 broke Trap exception handling in the standard MIPS mode. Additionally the microMIPS-mode trap code mask is wrong, as it's a 4-bit field. Here's a fix. Signed-off-by:
Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5309/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- May 21, 2013
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Ralf Baechle authored
Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- May 16, 2013
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David Daney authored
This reverts commit d532f3d2. The original commit has several problems: 1) Doesn't work with 64-bit kernels. 2) Calls TLBMISS_HANDLER_SETUP() before the code is generated. 3) Calls TLBMISS_HANDLER_SETUP() twice in per_cpu_trap_init() when only one call is needed. [ralf@linux-mips.org: Also revert the bits of the ASID patch which were hidden in the KVM merge.] Signed-off-by:
David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: "Steven J. Hill" <Steven.Hill@imgtec.com> Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/5242/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- May 09, 2013
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Steven J. Hill authored
All exceptions must be taken in microMIPS mode, never in classic MIPS mode or the kernel falls apart. A few NOP instructions are used to maintain the correct alignment of microMIPS versions of the exception vectors. Signed-off-by:
Steven J. Hill <Steven.Hill@imgtec.com>
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Leonid Yegoshin authored
Add logic needed to do floating point emulation in microMIPS mode. Signed-off-by:
Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Signed-off-by:
Steven J. Hill <Steven. <Hill@imgtec.com>
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- May 08, 2013
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Steven J. Hill authored
Original patch by Ralf Baechle and removed by Harold Koerfgen with commit f67e4ffc79905482c3b9b8c8dd65197bac7eb508. This allows for more generic kernels since the size of the ASID and corresponding masks can be determined at run-time. This patch is also required for the new Aptiv cores and has been tested on Malta and Malta Aptiv platforms. [ralf@linux-mips.org: Added relevant part of fix https://patchwork.linux-mips.org/patch/5213/ ] Signed-off-by:
Steven J. Hill <Steven.Hill@imgtec.com> Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Sanjay Lal authored
Both Guest kernel and Guest Userspace execute in UM. The memory map is as follows: Guest User address space: 0x00000000 -> 0x40000000 Guest Kernel Unmapped: 0x40000000 -> 0x60000000 Guest Kernel Mapped: 0x60000000 -> 0x80000000 - Guest Usermode virtual memory is limited to 1GB. Signed-off-by:
Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- May 01, 2013
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Tejun Heo authored
show_regs() is inherently arch-dependent but it does make sense to print generic debug information and some archs already do albeit in slightly different forms. This patch introduces a generic function to print debug information from show_regs() so that different archs print out the same information and it's much easier to modify what's printed. show_regs_print_info() prints out the same debug info as dump_stack() does plus task and thread_info pointers. * Archs which didn't print debug info now do. alpha, arc, blackfin, c6x, cris, frv, h8300, hexagon, ia64, m32r, metag, microblaze, mn10300, openrisc, parisc, score, sh64, sparc, um, xtensa * Already prints debug info. Replaced with show_regs_print_info(). The printed information is superset of what used to be there. arm, arm64, avr32, mips, powerpc, sh32, tile, unicore32, x86 * s390 is special in that it used to print arch-specific information along with generic debug info. Heiko and Martin think that the arch-specific extra isn't worth keeping s390 specfic implementation. Converted to use the generic version. Note that now all archs print the debug info before actual register dumps. An example BUG() dump follows. kernel BUG at /work/os/work/kernel/workqueue.c:4841! invalid opcode: 0000 [#1] PREEMPT SMP DEBUG_PAGEALLOC Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.9.0-rc1-work+ #7 Hardware name: empty empty/S3992, BIOS 080011 10/26/2007 task: ffff88007c85e040 ti: ffff88007c860000 task.ti: ffff88007c860000 RIP: 0010:[<ffffffff8234a07e>] [<ffffffff8234a07e>] init_workqueues+0x4/0x6 RSP: 0000:ffff88007c861ec8 EFLAGS: 00010246 RAX: ffff88007c861fd8 RBX: ffffffff824466a8 RCX: 0000000000000001 RDX: 0000000000000046 RSI: 0000000000000001 RDI: ffffffff8234a07a RBP: ffff88007c861ec8 R08: 0000000000000000 R09: 0000000000000000 R10: 0000000000000001 R11: 0000000000000000 R12: ffffffff8234a07a R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000 FS: 0000000000000000(0000) GS:ffff88007dc00000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b CR2: ffff88015f7ff000 CR3: 00000000021f1000 CR4: 00000000000007f0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400 Stack: ffff88007c861ef8 ffffffff81000312 ffffffff824466a8 ffff88007c85e650 0000000000000003 0000000000000000 ffff88007c861f38 ffffffff82335e5d ffff88007c862080 ffffffff8223d8c0 ffff88007c862080 ffffffff81c47760 Call Trace: [<ffffffff81000312>] do_one_initcall+0x122/0x170 [<ffffffff82335e5d>] kernel_init_freeable+0x9b/0x1c8 [<ffffffff81c47760>] ? rest_init+0x140/0x140 [<ffffffff81c4776e>] kernel_init+0xe/0xf0 [<ffffffff81c6be9c>] ret_from_fork+0x7c/0xb0 [<ffffffff81c47760>] ? rest_init+0x140/0x140 ... v2: Typo fix in x86-32. v3: CPU number dropped from show_regs_print_info() as dump_stack_print_info() has been updated to print it. s390 specific implementation dropped as requested by s390 maintainers. Signed-off-by:
Tejun Heo <tj@kernel.org> Acked-by:
David S. Miller <davem@davemloft.net> Acked-by:
Jesper Nilsson <jesper.nilsson@axis.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Fengguang Wu <fengguang.wu@intel.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Sam Ravnborg <sam@ravnborg.org> Acked-by: Chris Metcalf <cmetcalf@tilera.com> [tile bits] Acked-by: Richard Kuo <rkuo@codeaurora.org> [hexagon bits] Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Tejun Heo authored
Both dump_stack() and show_stack() are currently implemented by each architecture. show_stack(NULL, NULL) dumps the backtrace for the current task as does dump_stack(). On some archs, dump_stack() prints extra information - pid, utsname and so on - in addition to the backtrace while the two are identical on other archs. The usages in arch-independent code of the two functions indicate show_stack(NULL, NULL) should print out bare backtrace while dump_stack() is used for debugging purposes when something went wrong, so it does make sense to print additional information on the task which triggered dump_stack(). There's no reason to require archs to implement two separate but mostly identical functions. It leads to unnecessary subtle information. This patch expands the dummy fallback dump_stack() implementation in lib/dump_stack.c such that it prints out debug information (taken from x86) and invokes show_stack(NULL, NULL) and drops arch-specific dump_stack() implementations in all archs except blackfin. Blackfin's dump_stack() does something wonky that I don't understand. Debug information can be printed separately by calling dump_stack_print_info() so that arch-specific dump_stack() implementation can still emit the same debug information. This is used in blackfin. This patch brings the following behavior changes. * On some archs, an extra level in backtrace for show_stack() could be printed. This is because the top frame was determined in dump_stack() on those archs while generic dump_stack() can't do that reliably. It can be compensated by inlining dump_stack() but not sure whether that'd be necessary. * Most archs didn't use to print debug info on dump_stack(). They do now. An example WARN dump follows. WARNING: at kernel/workqueue.c:4841 init_workqueues+0x35/0x505() Hardware name: empty Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.9.0-rc1-work+ #9 0000000000000009 ffff88007c861e08 ffffffff81c614dc ffff88007c861e48 ffffffff8108f50f ffffffff82228240 0000000000000040 ffffffff8234a03c 0000000000000000 0000000000000000 0000000000000000 ffff88007c861e58 Call Trace: [<ffffffff81c614dc>] dump_stack+0x19/0x1b [<ffffffff8108f50f>] warn_slowpath_common+0x7f/0xc0 [<ffffffff8108f56a>] warn_slowpath_null+0x1a/0x20 [<ffffffff8234a071>] init_workqueues+0x35/0x505 ... v2: CPU number added to the generic debug info as requested by s390 folks and dropped the s390 specific dump_stack(). This loses %ksp from the debug message which the maintainers think isn't important enough to keep the s390-specific dump_stack() implementation. dump_stack_print_info() is moved to kernel/printk.c from lib/dump_stack.c. Because linkage is per objecct file, dump_stack_print_info() living in the same lib file as generic dump_stack() means that archs which implement custom dump_stack() - at this point, only blackfin - can't use dump_stack_print_info() as that will bring in the generic version of dump_stack() too. v1 The v1 patch broke build on blackfin due to this issue. The build breakage was reported by Fengguang Wu. Signed-off-by:
Tejun Heo <tj@kernel.org> Acked-by:
David S. Miller <davem@davemloft.net> Acked-by:
Vineet Gupta <vgupta@synopsys.com> Acked-by:
Jesper Nilsson <jesper.nilsson@axis.com> Acked-by:
Vineet Gupta <vgupta@synopsys.com> Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390 bits] Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Fengguang Wu <fengguang.wu@intel.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Sam Ravnborg <sam@ravnborg.org> Acked-by: Richard Kuo <rkuo@codeaurora.org> [hexagon bits] Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Apr 11, 2013
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Ralf Baechle authored
Without this, it's possible that LTO will discard the calls to set_except_vector() in the probe for the DADDI overflow bug resulting in a kernel crash like this: [...] Mount-cache hash table entries: 256 Checking for the daddi bug... Integer overflow[#1]: Cpu 0 $ 0 : 0000000000000000 0000000010008ce1 0000000000000001 0000000000000000 $ 4 : 7fffffffffffedcd ffffffff81410000 0000000000000030 000000000000003f [...] There are other similar places in the kernel so we've just been lucky that GCC's been tolerant. Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
The code was written as it is because it's more expressive, a bit easier. But it's always been dirty, if not a bug. But we can't cheat with LTO compilers, so this results in: [...] LDFINAL vmlinux.o In file included from arch/mips/kernel/topology.c:604:0, from arch/mips/kernel/time.c:212, from arch/mips/kernel/syscall.c:300, from arch/mips/kernel/signal.c:853, from arch/mips/kernel/setup.c:1030, from arch/mips/kernel/reset.c:354, from arch/mips/kernel/ptrace.c:562, from arch/mips/kernel/process.c:770, from arch/mips/kernel/irq.c:350, from arch/mips/kernel/branch.c:321, from arch/mips/kernel/cpu-probe.c:1370, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/thread_info.h:345, from arch/mips/sgi-ip22/ip22-gio.c:660, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/sgialib.h:219, from arch/mips/sgi-ip22/ip22-reset.c:224, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/paccess.h:116, from arch/mips/sgi-ip22/ip22-nvram.c:334, from include/linux/kernel_stat.h:79, from arch/mips/sgi-ip22/ip22-int.c:592, from arch/mips/sgi-ip22/ip22-hpc.c:470, from arch/mips/sgi-ip22/ip22-mc.c:135, from init/init_task.c:54, from init/calibrate.c:744, from init/noinitramfs.c:62, from init/do_mounts.c:573, from init/version.c:1009, from init/main.c:777, from :729: arch/mips/kernel/traps.c:63:49: error: variable ‘handle_tlbl’ redeclared as function In file included from arch/mips/mm/page.c:310:0, from arch/mips/mm/mmap.c:208, from arch/mips/mm/init.c:641, from arch/mips/mm/gup.c:811, from arch/mips/mm/fault.c:659, from include/linux/module.h:682, from arch/mips/mm/dma-default.c:161, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/thread_info.h:397, from arch/mips/kernel/i8253.c:538, from arch/mips/kernel/proc.c:145, from arch/mips/kernel/irq_cpu.c:129, from arch/mips/kernel/i8259.c:229, from include/uapi/linux/elf.h:251, from arch/mips/kernel/mips_ksyms.c:129, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/time.h:50, from arch/mips/kernel/cevt-r4k.c:90, from arch/mips/kernel/vdso.c:136, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/thread_info.h:351, from arch/mips/kernel/unaligned.c:809, from arch/mips/kernel/traps.c:1720, from arch/mips/kernel/topology.c:684, from arch/mips/kernel/time.c:212, from arch/mips/kernel/syscall.c:300, from arch/mips/kernel/signal.c:853, from arch/mips/kernel/setup.c:1030, from arch/mips/kernel/reset.c:354, from arch/mips/kernel/ptrace.c:562, from arch/mips/kernel/process.c:770, from arch/mips/kernel/irq.c:350, from arch/mips/kernel/branch.c:321, from arch/mips/kernel/cpu-probe.c:1370, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/thread_info.h:345, from arch/mips/sgi-ip22/ip22-gio.c:660, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/sgialib.h:219, from arch/mips/sgi-ip22/ip22-reset.c:224, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/paccess.h:116, from arch/mips/sgi-ip22/ip22-nvram.c:334, from include/linux/kernel_stat.h:79, from arch/mips/sgi-ip22/ip22-int.c:592, from arch/mips/sgi-ip22/ip22-hpc.c:470, from arch/mips/sgi-ip22/ip22-mc.c:135, from init/init_task.c:54, from init/calibrate.c:744, from init/noinitramfs.c:62, from init/do_mounts.c:573, from init/version.c:1009, from init/main.c:777, from :729: arch/mips/mm/tlbex.c:1448:5: note: previously declared here In file included from arch/mips/kernel/topology.c:604:0, from arch/mips/kernel/time.c:212, from arch/mips/kernel/syscall.c:300, from arch/mips/kernel/signal.c:853, from arch/mips/kernel/setup.c:1030, from arch/mips/kernel/reset.c:354, from arch/mips/kernel/ptrace.c:562, from arch/mips/kernel/process.c:770, from arch/mips/kernel/irq.c:350, from arch/mips/kernel/branch.c:321, from arch/mips/kernel/cpu-probe.c:1370, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/thread_info.h:345, from arch/mips/sgi-ip22/ip22-gio.c:660, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/sgialib.h:219, from arch/mips/sgi-ip22/ip22-reset.c:224, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/paccess.h:116, from arch/mips/sgi-ip22/ip22-nvram.c:334, from include/linux/kernel_stat.h:79, from arch/mips/sgi-ip22/ip22-int.c:592, from arch/mips/sgi-ip22/ip22-hpc.c:470, from arch/mips/sgi-ip22/ip22-mc.c:135, from init/init_task.c:54, from init/calibrate.c:744, from init/noinitramfs.c:62, from init/do_mounts.c:573, from init/version.c:1009, from init/main.c:777, from :729: arch/mips/kernel/traps.c:62:49: error: variable ‘handle_tlbm’ redeclared as function In file included from arch/mips/mm/page.c:310:0, from arch/mips/mm/mmap.c:208, from arch/mips/mm/init.c:641, from arch/mips/mm/gup.c:811, from arch/mips/mm/fault.c:659, from include/linux/module.h:682, from arch/mips/mm/dma-default.c:161, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/thread_info.h:397, from arch/mips/kernel/i8253.c:538, from arch/mips/kernel/proc.c:145, from arch/mips/kernel/irq_cpu.c:129, from arch/mips/kernel/i8259.c:229, from include/uapi/linux/elf.h:251, from arch/mips/kernel/mips_ksyms.c:129, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/time.h:50, from arch/mips/kernel/cevt-r4k.c:90, from arch/mips/kernel/vdso.c:136, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/thread_info.h:351, from arch/mips/kernel/unaligned.c:809, from arch/mips/kernel/traps.c:1720, from arch/mips/kernel/topology.c:684, from arch/mips/kernel/time.c:212, from arch/mips/kernel/syscall.c:300, from arch/mips/kernel/signal.c:853, from arch/mips/kernel/setup.c:1030, from arch/mips/kernel/reset.c:354, from arch/mips/kernel/ptrace.c:562, from arch/mips/kernel/process.c:770, from arch/mips/kernel/irq.c:350, from arch/mips/kernel/branch.c:321, from arch/mips/kernel/cpu-probe.c:1370, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/thread_info.h:345, from arch/mips/sgi-ip22/ip22-gio.c:660, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/sgialib.h:219, from arch/mips/sgi-ip22/ip22-reset.c:224, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/paccess.h:116, from arch/mips/sgi-ip22/ip22-nvram.c:334, from include/linux/kernel_stat.h:79, from arch/mips/sgi-ip22/ip22-int.c:592, from arch/mips/sgi-ip22/ip22-hpc.c:470, from arch/mips/sgi-ip22/ip22-mc.c:135, from init/init_task.c:54, from init/calibrate.c:744, from init/noinitramfs.c:62, from init/do_mounts.c:573, from init/version.c:1009, from init/main.c:777, from :729: arch/mips/mm/tlbex.c:1450:5: note: previously declared here In file included from arch/mips/kernel/topology.c:604:0, from arch/mips/kernel/time.c:212, from arch/mips/kernel/syscall.c:300, from arch/mips/kernel/signal.c:853, from arch/mips/kernel/setup.c:1030, from arch/mips/kernel/reset.c:354, from arch/mips/kernel/ptrace.c:562, from arch/mips/kernel/process.c:770, from arch/mips/kernel/irq.c:350, from arch/mips/kernel/branch.c:321, from arch/mips/kernel/cpu-probe.c:1370, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/thread_info.h:345, from arch/mips/sgi-ip22/ip22-gio.c:660, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/sgialib.h:219, from arch/mips/sgi-ip22/ip22-reset.c:224, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/paccess.h:116, from arch/mips/sgi-ip22/ip22-nvram.c:334, from include/linux/kernel_stat.h:79, from arch/mips/sgi-ip22/ip22-int.c:592, from arch/mips/sgi-ip22/ip22-hpc.c:470, from arch/mips/sgi-ip22/ip22-mc.c:135, from init/init_task.c:54, from init/calibrate.c:744, from init/noinitramfs.c:62, from init/do_mounts.c:573, from init/version.c:1009, from init/main.c:777, from :729: arch/mips/kernel/traps.c:64:49: error: variable ‘handle_tlbs’ redeclared as function In file included from arch/mips/mm/page.c:310:0, from arch/mips/mm/mmap.c:208, from arch/mips/mm/init.c:641, from arch/mips/mm/gup.c:811, from arch/mips/mm/fault.c:659, from include/linux/module.h:682, from arch/mips/mm/dma-default.c:161, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/thread_info.h:397, from arch/mips/kernel/i8253.c:538, from arch/mips/kernel/proc.c:145, from arch/mips/kernel/irq_cpu.c:129, from arch/mips/kernel/i8259.c:229, from include/uapi/linux/elf.h:251, from arch/mips/kernel/mips_ksyms.c:129, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/time.h:50, from arch/mips/kernel/cevt-r4k.c:90, from arch/mips/kernel/vdso.c:136, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/thread_info.h:351, from arch/mips/kernel/unaligned.c:809, from arch/mips/kernel/traps.c:1720, from arch/mips/kernel/topology.c:684, from arch/mips/kernel/time.c:212, from arch/mips/kernel/syscall.c:300, from arch/mips/kernel/signal.c:853, from arch/mips/kernel/setup.c:1030, from arch/mips/kernel/reset.c:354, from arch/mips/kernel/ptrace.c:562, from arch/mips/kernel/process.c:770, from arch/mips/kernel/irq.c:350, from arch/mips/kernel/branch.c:321, from arch/mips/kernel/cpu-probe.c:1370, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/thread_info.h:345, from arch/mips/sgi-ip22/ip22-gio.c:660, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/sgialib.h:219, from arch/mips/sgi-ip22/ip22-reset.c:224, from /fluff/home/ralf/src/linux/lto/linux-misc/arch/mips/include/asm/paccess.h:116, from arch/mips/sgi-ip22/ip22-nvram.c:334, from include/linux/kernel_stat.h:79, from arch/mips/sgi-ip22/ip22-int.c:592, from arch/mips/sgi-ip22/ip22-hpc.c:470, from arch/mips/sgi-ip22/ip22-mc.c:135, from init/init_task.c:54, from init/calibrate.c:744, from init/noinitramfs.c:62, from init/do_mounts.c:573, from init/version.c:1009, from init/main.c:777, from :729: arch/mips/mm/tlbex.c:1449:5: note: previously declared here lto1: fatal error: errors during merging of translation units compilation terminated. lto-wrapper: /usr/bin/mips-linux-gcc returned 1 exit status /usr/lib64/gcc/mips-linux/4.7.1/../../../../mips-linux/bin/ld: lto-wrapper failed collect2: error: ld returned 1 exit status make: *** [vmlinux] Error 1 Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Apr 05, 2013
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Dengcheng Zhu authored
The commit a96102be introduced set_isa() where compatible ISA info is also set aside from the one gets passed in. It means, for example, 1004K will have MIPS_CPU_ISA_M32R2/M32R1/II/I flags. This leads to things like the following inappropriate: if (c->isa_level == MIPS_CPU_ISA_M32R1 || c->isa_level == MIPS_CPU_ISA_M32R2 || c->isa_level == MIPS_CPU_ISA_M64R1 || c->isa_level == MIPS_CPU_ISA_M64R2) This patch fixes it. Signed-off-by:
Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Feb 01, 2013
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Ralf Baechle authored
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Steven J. Hill authored
Signed-off-by:
Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Cc: Steven J. Hill <sjhill@mips.com> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/4781/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Jan 21, 2013
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Rusty Russell authored
Fix up all callers as they were before, with make one change: an unsigned module taints the kernel, but doesn't turn off lockdep. Signed-off-by:
Rusty Russell <rusty@rustcorp.com.au>
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- Dec 13, 2012
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Maciej W. Rozycki authored
Our FP emulator is hardcoded for the MIPS IV FP instruction set and does not match the FP ISA with the general ISA. However for the few MIPS IV FP instructions that use the COP1X major opcode it relies on the Coprocessor Unusable exception to be delivered as a COP1 rather than COP3 exception. This includes indexed transfer (LDXC1, etc.) and FP multiply-accumulate (MADD.D, etc.) instructions. All the MIPS I, II, III and IV processors and some newer chips that do not implement the FPU use the COP3 exception however. Therefore I believe the kernel should follow and redirect any COP3 Unusable traps to the emulator unless an actual FPU part or core is present. This is a change that implements it. Any minor opcode encodings that are not recognised as valid FP instructions are rejected by the emulator and will result in a SIGILL signal being delivered as they currently do. We do not support vendor-specific coprocessor 3 implementations supported with MIPS I and MIPS II ISA processors; we never set CP0.Status.CU3. [Ralf: On MIPS IV processors the kernel always enables the XX bit which replaces the CU3 bit off earlier architecture revisions.] If matching between the CPU and the FPU ISA is considered required one day, this can still be done in the emulator itself. I think the CpU exception dispatcher is not the right place to do this anyway, as there are further differences between MIPS I, MIPS II, MIPS III, MIPS IV and MIPS32 FP ISAs. Corresponding explanation of this implementation is included within the change itself. Signed-off-by:
Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/project/linux-mips/list/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
[ralf@linux-mips.org: Original patch by Maxim Uvarov <muvarov@gmail.com> with plenty of further shining, polishing, debugging and testing by me.] Signed-off-by:
Maxim Uvarov <muvarov@gmail.com> Cc: linux-mips@linux-mips.org Cc: kexec@lists.infradead.org Cc: horms@verge.net.au Patchwork: https://patchwork.linux-mips.org/patch/1025/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Jul 23, 2012
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Kelvin Cheung authored
Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology (ICT) and the Chinese Academy of Sciences (CAS), which implements the MIPS32 release 2 instruction set. [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device which also is why it identifies itself with the Legacy Vendor ID in the PrID register. When applying the patch I shoveled some code around to keep things in alphabetical order and avoid forward declarations.] Signed-off-by:
Kelvin Cheung <keguang.zhang@gmail.com> Cc: To: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3976/ Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- Jul 19, 2012
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Ralf Baechle authored
When building oprofile as a module for R10000 or R7000 class processors, E9000 or MIPSxx class cores since 3572a2c3 [MIPS: make oprofile use cp0_perfcount_irq if it is set] an ERROR: "cp0_compare_irq" [arch/mips/oprofile/oprofile.ko] undefined! error will happen. Fixed by exporting cp0_compare_irq. Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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