Working on sound support I noticed the Apalis T30 Evaluation board
device tree missing the more generic Apalis T30 compatible string.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Indentation of the clock property used a hodgepodge of tabs and spaces.
Make them more consistent (tabs for indentation followed by spaces for
alignment).

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.

Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Matt Porter <mporter@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>

The Lenovo Iomega ix4-300d is a 4-Bay sata NAS with dual Gb, USB2.0 & 3.0,
powered by a Marvell Armada XP MV78230 dual core CPU.

http://shop.lenovo.com/us/en/servers/network-storage/lenovoemc/ix4-300d/



Signed-off-by: Benoit Masson <yahoo@perenite.com>
Link: https://lkml.kernel.org/r/1406503839-4662-1-git-send-email-yahoo@perenite.com


Signed-off-by: Jason Cooper <jason@lakedaemon.net>

Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>

Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.

Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>

This adds a device tree node for the infrared receiver connected to a
GPIO pin on the Radxa Rock.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

This adds the necessary nodex and pinctrl settings for the Rockchip PWM-driver.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>

Modified to use the new clock defines and added rk3066 pins.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Use the newly ammended dw_8250 clock binding to define both the baudclk as
well as the pclk supplying the ip.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

The Radxa Rock contains one sd-card slot. Add the supplying regulator
and enable its dw_mmc node.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

This enables the 2nd i2c bus and adds the act8846 pmic as device.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

The Curie2 uses a tps659102 as its main pmic, so add the i2c1 and tps65910
node as well as define the used voltages and regulator-names according to
the schematics.

Also fix the supply of the sd0 regulator, as it is supplied by the vio reg.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

The core controller settings themself are identical, only the compatible and
pinctrl settings differ.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

To create some sort of ordering of nodes, they are suggested to be ordered by
their register address.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

The pincontroller uses the GRF and PMU syscons nowadays, so should not
contain an address in its device node.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Use the handles for subsequent changes to nodes, similar to like the rk3288
submission does it.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Some nodes that are changed in the dtsi hierarchy do not have handles yet.
As it was suggested in the rk3288 submission to do subsequent nodes changes
through such handle-references, add the missing ones.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Comments received from the rk3288 submission indicated that a generic subnode
to group soc components should not be used.

So to keep all rockchip devicetree files similar, remove it from rk3066 and rk3188.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

The clock and reset unit is now provided by the rk3188-cru clock driver and thus
the old style definitions of the gate clocks can go away.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>

The clock definitions get a lot shorter due to the soc clocks being handled by
rk3188-cru and only the input clock remains. These can now simply live
in the main rk3xxx.dtsi without affecting readability.

At the same time, rename the node to oscillator, adding a clock-output-names
property to match how the rk3288 handles this.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>

This adds a node for the clock and reset unit on rk3188 and rk3066 SoCs and
also updates the device nodes retrieve their clocks from there, instead of
the previous gate clock nodes.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>

This allows the "make dtbs" target to work.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>

There exist 2 variants using either the act8846 or rk808 as pmic, while the
rest of the board stays the same.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>

Node definitions shared by all rk3288 based boards.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>

Add the DT fragment for the Marvell Dove LCD controllers.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/E1XAKGS-0004WE-8h@rmk-PC.arm.linux.org.uk


Signed-off-by: Jason Cooper <jason@lakedaemon.net>

Add node describing Zynq's GPIO controller.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Add node for the Xilinx A/D Converter.

Cc: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

In Armada 375 SoCs, the MDIO is handled by a separate orion-mdio driver,
despite the register is contained within the "LMS" block of the network
controller.

Therefore we need to add the clock to the MDIO devicetree to prevent the
controller from being accesed with its clock gated. This is needed, for
instance, to be able to load the MDIO driver before the network driver.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1405961296-5846-7-git-send-email-ezequiel.garcia@free-electrons.com


Signed-off-by: Jason Cooper <jason@lakedaemon.net>

The vendor bootloader provided for Armada 375 boards expect an
alias for the ethernet nodes, which is used to fixup the MAC address.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Link: https://lkml.kernel.org/r/1405961296-5846-6-git-send-email-ezequiel.garcia@free-electrons.com


Signed-off-by: Jason Cooper <jason@lakedaemon.net>

This adds support for the A31 Hummingbird:
http://www.merrii.com/en/pla_d.asp?id=172



The Merrii A31 Hummingbird is a development board based on the
Allwinner A31 SoC with multiple USB ports through a USB hub chip,
a uSD slot, a 10/100/1000M ethernet port, an AP6210 WiFi/BT chip,
TV-in, HDMI, VGA, audio in/out ports, and LCD/CSI headers.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
[wens@csie.org: enable usbphy, ehci0, ohci0 for on-board usb hub;
 add pcf8563 rtc node; add comments for i2c0 and mmc0 pull-ups;
 correct ethernet phy address to 0x01; drop uart2 (BT chip has
 no power) and uart3 (no device); use proper commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Alias GMAC as ethernet0 so U-boot can fill in the MAC address.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The A31 has the same GMAC found on the A20 SoC, except it has
an extra reset control.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The GMAC uses 1 of 2 sources for its transmit clock, depending on the
PHY interface mode. Add both sources as dummy clocks, and as parents
to the GMAC clock node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

The A31 SoC has a GMAC gigabit ethernet controller supporting
MII, GMII, RGMII modes. Add pin muxing options for these modes.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

This patch add I2S (Inter-IC Sound) dt node which supports 1-port
stereo (1 channels) IIS-bus for audio interface with DMA-based
operation.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Inha Song <ideal.song@samsung.com>
Tested-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

This adds cros_ec to exynos5420-peach-pit and exynos5800-peach-pi,
including:
* The keyboard
* The i2c tunnel
* The tps65090 under the i2c tunnel
* The battery under the i2c tunnel

To add extra motivation, it should be noted that tps65090 is one of
the things needed to get display-related FETs turned on for pit and
pi.

Signed-off-by: Doug Anderson <dianders@chromium.org>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Tushar Behera <tushar.b@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

This patch cleans a arm-pmu node up for exynos4. Only exynos4412 series
boards have four pmu interrupts. Rest of exynos4 boards, except 4412, have only
two pmu interrupts. Thus, we can define two interrupts in the
exynos4.dtsi and extends the interrupts only exynos4412.dtsi.

Cc: Chanwoo Choi <cw00.choi@samsung.com>
Cc: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Tested-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

The pwm driver requires a clocks property referencing the pwm peripheral
clk.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

udphs_clk (USB Device Controller clock) is referenced instead of
uhphs_clk (USB Host Controller clock).

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Correct the typo error for the second "uhphs_clk".

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>