Commits · b579dfe71a6a5c3967ca9ad648673b6ca10ab0d5 · jan.koester / Linux · GitLab

Jan 11, 2022
- RISC-V: Use SBI SRST extension when available · b579dfe7
  Anup Patel authored Jun 09, 2021
  b579dfe7
Jan 09, 2022
- riscv: mm: fix wrong phys_ram_base value for RV64 · b0fd4b1b
  Jisheng Zhang authored Dec 02, 2021
  b0fd4b1b
- RISC-V: Use common riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=n · 869c7060
  Sean Christopherson authored Nov 29, 2021
  869c7060
- riscv: head: remove useless __PAGE_ALIGNED_BSS and .balign · 51f23e53
  Jisheng Zhang authored Nov 29, 2021
  51f23e53
- riscv: errata: alternative: mark vendor_patch_func __initdata · 1546541f
  Jisheng Zhang authored Nov 29, 2021
  1546541f
- riscv: head: make secondary_start_common() static · 153c46fa
  Jisheng Zhang authored Nov 29, 2021
  153c46fa
- riscv: remove cpu_stop() · 7f3de1ad
  Jisheng Zhang authored Nov 29, 2021
  7f3de1ad
- riscv: try to allocate crashkern region from 32bit addressible memory · decf89f8
  Nick Kossifidis authored Nov 26, 2021
  decf89f8
- riscv: use hart id instead of cpu id on machine_kexec · 0e105f1d
  Nick Kossifidis authored Nov 26, 2021
  0e105f1d
- riscv: Don't use va_pa_offset on kdump · a11c07f0
  Nick Kossifidis authored Nov 26, 2021
  a11c07f0
- riscv: dts: sifive: fu540-c000: Fix PLIC node · 893eae9a
  Geert Uytterhoeven authored Dec 17, 2021
  893eae9a
- riscv: dts: sifive: fu540-c000: Drop bogus soc node compatible values · 8fc6e62a
  Geert Uytterhoeven authored Dec 17, 2021
  8fc6e62a
- riscv: dts: sifive: Group tuples in register properties · 8e9b1c95
  Geert Uytterhoeven authored Dec 17, 2021
  8e9b1c95
- riscv: dts: sifive: Group tuples in interrupt properties · cc79be0e
  Geert Uytterhoeven authored Dec 17, 2021
  cc79be0e
- riscv: dts: microchip: mpfs: Group tuples in interrupt properties · e35b07a7
  Geert Uytterhoeven authored Dec 17, 2021
  e35b07a7
- riscv: dts: microchip: mpfs: Fix clock controller node · 9e85020c
  Geert Uytterhoeven authored Dec 17, 2021
  9e85020c
- riscv: dts: microchip: mpfs: Fix reference clock node · 9d7b3078
  Geert Uytterhoeven authored Dec 17, 2021
  9d7b3078
- riscv: dts: microchip: mpfs: Fix PLIC node · 53abf980
  Geert Uytterhoeven authored Dec 17, 2021
  53abf980
- riscv: dts: microchip: mpfs: Drop empty chosen node · 53ef0732
  Geert Uytterhoeven authored Dec 17, 2021
  53ef0732
- riscv: dts: canaan: Group tuples in interrupt properties · 75c0dc04
  Geert Uytterhoeven authored Dec 17, 2021
  75c0dc04
- riscv: dts: canaan: Fix SPI FLASH node names · fe38b4d6
  Geert Uytterhoeven authored Dec 17, 2021
  fe38b4d6
Jan 07, 2022
- riscv/mm: Enable THP migration · d062a79b
  Nanyong Sun authored Nov 23, 2021
  d062a79b
- riscv/mm: Adjust PAGE_PROT_NONE to comply with THP semantics · fba88ede
  Nanyong Sun authored Nov 23, 2021
  fba88ede
- riscv/head: fix misspelling of guaranteed · 8ee30439
  hasheddan authored Nov 20, 2021
  8ee30439
Jan 06, 2022
- RISC-V: Clean up the defconfigs · d4cb5d36
  Palmer Dabbelt authored Jan 06, 2022
  d4cb5d36
- RISC-V: defconfigs: Remove redundant K210 DT source · ce3fe7a4
  Palmer Dabbelt authored Nov 19, 2021
  ce3fe7a4
- RISC-V: defconfigs: Remove redundant CONFIG_EFI=y · d4b22b2f
  Palmer Dabbelt authored Nov 19, 2021
  d4b22b2f
- RISC-V: defconfigs: Remove redundant CONFIG_POWER_RESET · c2e4ff7f
  Palmer Dabbelt authored Nov 19, 2021
  c2e4ff7f
- RISC-V: defconfigs: Sort CONFIG_BLK_DEV_BSG · bd72a95f
  Palmer Dabbelt authored Nov 19, 2021
  bd72a95f
- RISC-V: defconfigs: Sort CONFIG_SURFACE_PLATFORMS · 2fadc6ea
  Palmer Dabbelt authored Nov 19, 2021
  2fadc6ea
- RISC-V: defconfigs: Sort CONFIG_MMC · a7e9fbef
  Palmer Dabbelt authored Nov 19, 2021
  a7e9fbef
- RISC-V: defconfigs: Sort CONFIG_PTP_1588_CLOCK · 23592d5a
  Palmer Dabbelt authored Nov 19, 2021
  23592d5a
- RISC-V: defconfigs: Sort CONFIG_SOC_POLARFIRE · a669a1f4
  Palmer Dabbelt authored Nov 19, 2021
  a669a1f4
- RISC-V: defconfigs: Sort CONFIG_SYSFS_SYSCALL · f8bbea64
  Palmer Dabbelt authored Nov 19, 2021
  f8bbea64
- RISC-V: defconfigs: Sort CONFIG_BPF_SYSCALL · 61063ad3
  Palmer Dabbelt authored Nov 19, 2021
  61063ad3
- RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOW · 9f36b96b
  Palmer Dabbelt authored Nov 19, 2021
  9f36b96b
- RISC-V: defconfigs: Set CONFIG_FB=y, for FB console · 3d12b634
  Palmer Dabbelt authored Nov 19, 2021
  3d12b634
- riscv: mm: Enable PMD split page table lock for RV64 · 5a7ac592
  Kefeng Wang authored Sep 27, 2021
  5a7ac592
- riscv: Make vmalloc/vmemmap end equal to the start of the next region · 7cc8c75b
  Alexandre Ghiti authored Nov 18, 2021
  7cc8c75b
- riscv: switch to relative extable and other improvements · 1f77ed94
  Palmer Dabbelt authored Jan 05, 2022
  1f77ed94