- Jan 20, 2015
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Olof Johansson authored
The file is roughly sorted alphabetically (with some exceptions where old options have been split in two), so alphascale should go at the top instead of at the bottom. Also linewrap like other entries have been lately. Signed-off-by:Olof Johansson <olof@lixom.net>
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Oleksij Rempel authored
for now it is wary basic SoC description with most important IPs needed to make this device work Signed-off-by:
Oleksij Rempel <linux@rempel-privat.de> Signed-off-by:
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- Jan 15, 2015
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Josh Wu authored
According to v4l2 dt document, we add: a camera host: ISI port. a i2c camera sensor: ov2640 port. to sama5d3xmb.dtsi. The ov2640 node defines the pinctrls, clocks and refer to isi port. The ISI node also has a reference to the ov2640 port. Signed-off-by:
Josh Wu <josh.wu@atmel.com> Acked-by:
Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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Josh Wu authored
For sama5d3xmb board, the pins: pinctrl_isi_pck_as_mck is pck1, and used to provide MCK for camera sensor. We change its name to: pinctrl_pck1_as_isi_mck. As we want camera sensor instead of ISI to configure the pck1 (ISI_MCK) pin. So we remove this pinctrl from ISI DT node. It will be added in sensor's DT node. Signed-off-by:
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Josh Wu authored
For sama5d3xmb board, the pins: pinctrl_isi_{power,reset} is used to power-down or reset camera sensor. So we should let camera sensor instead of ISI to configure the pins. This patch will change pinctrl name from pinctrl_isi_{power,reset} to pinctrl_sensor_{power,reset}. And remove these two pinctrl from ISI's DT node. We will add these two pinctrl to sensor's DT node. Signed-off-by: -
Bo Shen authored
The mck is decided by the board design, move it to mb related dtsi file. Signed-off-by:
Bo Shen <voice.shen@atmel.com> Acked-by:
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Bo Shen authored
The ISI has 12 data lines, add the missing two data lines. Signed-off-by:
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Bo Shen authored
As the ISI has 12 data lines, however we only use 8 data lines with sensor module. So, split the data line into two groups which make it can be choosed depends on the hardware design. Signed-off-by:
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Josh Wu authored
Add ISI peripheral clock in sama5d3.dtsi. Signed-off-by:
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Alexandre Belloni authored
The ethernut5 is actually based on an at91sam9xe, use the correct dts include. Cc: Martin Reimann <martin.reimann@egnite.de> Cc: Tim Schendekehl <tim.schendekehl@egnite.de> Signed-off-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by:
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Alexandre Belloni authored
at91sam9xe is slightly different from at91sam9260, in particular it has a different SRAM size and location. Signed-off-by:
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Alexandre Belloni authored
Add nodes for the SRAM available on atmel SoCs For the at91sam9260 and the at91sam9g20, address mirroring is used to create a single contiguous SRAM range instead of declaring two separate banks. Also remove leftover TODOs in the sam9g45 file Signed-off-by:
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Alexandre Belloni authored
Enable the RTC on the at91rm9200ek. Signed-off-by:
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Alexandre Belloni authored
Add a node for the RTC available on at91rm9200. Signed-off-by:
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Alexandre Belloni authored
Add node for the RTC available on the at91sam9n12. Signed-off-by:
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Alexandre Belloni authored
The sama4d4 has Special Function Registers that allow to manage DDR, OHCI, EBI and AIC interrupt redirection. Signed-off-by:
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Alexandre Belloni authored
The sama5d3 has Special Function Registers that allow to manage OHCI, EBI and the UTMI clock. Signed-off-by:
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Alexander Stein authored
That clock should be called ac97_clk. Signed-off-by:
Alexander Stein <alexanders83@web.de> Signed-off-by:
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Josh Wu authored
This D2 led is available for all sama5d3x-ek board. So make it a heartbeat LED. Signed-off-by:
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- Jan 13, 2015
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Zhiwu Song authored
CSR atlas7 uses Network on Chip(NoC) bus architecture, there are dozens of MARCOs, in each MARCO, there are dozens of hardware modules. Signed-off-by:
Zhiwu Song <Zhiwu.Song@csr.com> Signed-off-by:
Hao Liu <Hao.Liu@csr.com> Signed-off-by:
Barry Song <Baohua.Song@csr.com> Acked-by:
Arnd Bergmann <arnd@arndb.de>
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Kuninori Morimoto authored
Renesas sound driver needs #sound-dai-cells settings, but, this usage is a little bit confusable. It came from ALSA SoC historical reasons. The sound DAI naming method is different between Single/Multi DAI in the ALSA framework, and it is used for sound card matching. And this #sound-dai-cells has relationship to it. Current SoC dtsi has #sound-dai-cells = <1> as default settings (= it is assuming that board/platform has multi DAI), and board/platform side needs to overwrite it if board/platform was single DAI. This style is more confusable for users. This patch removes SoC side default settings, and force to set it by board/platform side. Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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Kuninori Morimoto authored
Renesas sound driver needs #sound-dai-cells settings, but, this usage is a little bit confusable. It came from ALSA SoC historical reasons. The sound DAI naming method is different between Single/Multi DAI in the ALSA framework, and it is used for sound card matching. And this #sound-dai-cells has relationship to it. Current SoC dtsi has #sound-dai-cells = <1> as default settings (= it is assuming that board/platform has multi DAI), and board/platform side needs to overwrite it if board/platform was single DAI. This style is more confusable for users. This patch removes SoC side default settings, and force to set it by board/platform side. Signed-off-by:
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Geert Uytterhoeven authored
The "renesas,rcar_sound" compatible property value was never processed nor documented. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
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Geert Uytterhoeven authored
The "renesas,rcar_sound" compatible property value was never processed nor documented. Signed-off-by:
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Peter Robinson authored
A number of arches (EXYNOS/IMX/TEGRA) are separated out into finer grained definitions whether it be sub ARCH or SOC definitions. The device tree blobs should only be built if the specific option is enabled that supports that device or it might be that there's an expectation that the device is supported when in actual fact it's not. This ensures only the relevant bits are built. Also standardised the line break between the arch/soc definitions and the dtbs to be on separate lines for better consistency as per feedback. Signed-off-by:
Peter Robinson <pbrobinson@gmail.com> Reviewed-by:
Lucas Stach <l.stach@pengutronix.de> Acked-by:
Thierry Reding <treding@nvidia.com> Acked-by:
Stephen Warren <swarren@nvidia.com> Acked-by:
Shawn Guo <shawn.guo@freescale.com> [olof: Fixed stray \ in one of the IMX rules] Signed-off-by:
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- Jan 11, 2015
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Matthias Brugger authored
This patch enables uart port for the Aquaris5 mobile phone. Signed-off-by:Matthias Brugger <matthias.bgg@gmail.com>
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Matthias Brugger authored
This patch adds the uart ports to the device tree of Mediatek mt6589 SoC. Signed-off-by: -
Barry Song authored
MARCO will not be supported any more. it has been replaced by CSR atlas7. Signed-off-by:
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- Jan 09, 2015
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Victor Kamensky authored
In v3.19-rc3 tree when CONFIG_ARM_LPAE and CONFIG_DEBUG_RODATA are enabled image failed to compile with the following error: arch/arm/mm/init.c:661:14: error: ‘PMD_SECT_RDONLY’ undeclared here (not in a function) It seems that '80d6b0c2 ARM: mm: allow text and rodata sections to be read-only' and 'ded94779 ARM: 8109/1: mm: Modify pte_write and pmd_write logic for LPAE' commits crossed. 80d6b0c2 uses PMD_SECT_RDONLY macro but ded94779 renames it and uses software bits L_PMD_SECT_RDONLY instead. Fix is to use L_PMD_SECT_RDONLY instead PMD_SECT_RDONLY as ded94779 does in another places. Signed-off-by:
Victor Kamensky <victor.kamensky@linaro.org> Acked-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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Gregory CLEMENT authored
The A388-GP is a board produced by Marvell that holds - 1 PCIe slot - 2 mini PCIe slot (one of them is multiplexed with the PCIe slot, muxing is selected through the GPIO expander) - 1 16MB SPI-NOR - 2 Gigabit Ethernet ports - 4 SATA ports (2 of them are multiplexed with the mini PCIe slots, muxing is selected through the GPIO expander) - 1 SDIO slot - 1 USB3 port - 2 USB2 port - 2 GPIO/interrupts expander on I2C Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Andrew Lunn <andrew@lunn.ch>
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Gregory CLEMENT authored
This SoC belongs to the Armada 38x family. The main difference with the Armada 385 is that the 388 can handle two more SATA ports. Currently the consequence is the use of a different compatible string for the pinctrl node, in order to be able to use the pins associated to this 2 new SATA ports. The second SATA controller has also been moved from the armada38x.dtsi as it it specific to the Armada388 version. In the same time the Armada385 DB and Armada 385 RD board have been renamed in the 388 one and now include the armada-388.dtsi file. AS both of them have 4 SATA ports the SoC used on them were wrongly described. Signed-off-by:
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Gregory CLEMENT authored
The pintcrl label was missing. Adding it allowed referring it from the root of the device tree. Also add the uart0 label used by the bootloader. Signed-off-by:
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Gregory CLEMENT authored
With the Armada 385 GP board more pinctrl functions depending of the SoC are needed. Add them to the DTSI to avoid duplication. Signed-off-by:
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Maxime Ripard authored
The A385-AP is a board produced by Marvell that holds 3 mPCIe slot, a 16MB SPI-NOR, 3 Gigabit Ethernet ports, USB3 and NAND flash storage. [gregory.clement@free-electrons.com: switch the license to the dual X11/GPL with the agreement of the author] Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
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Maxime Ripard authored
Some pinctrl functions can be shared with all DTS out there, since they are generic, SoC-wide muxing options. Add a number of these to the DTSI to avoid duplication. Signed-off-by:
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Maxime Ripard authored
The compatible set in the armada-38x DTSI is always overridden, and the reg defined in there is duplicated in the armada-380 and armada-385 DTSIs. Remove these useless items. Signed-off-by:
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Maxime Ripard authored
Some nodes in the DTs have a reg property but no unit name in their node name. This contradicts the way the ePAPR defines the node names. Fix this. Signed-off-by:
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Andi Kleen authored
There was another report of a boot failure with a #GP fault in the uncore SBOX initialization. The earlier work around was not enough for this system. The boot was failing while trying to initialize the third SBOX. This patch detects parts with only two SBOXes and limits the number of SBOX units to two there. Stable material, as it affects boot problems on 3.18. Tested-by:
Andreas Oehler <andreas@oehler-net.de> Signed-off-by:
Andi Kleen <ak@linux.intel.com> Signed-off-by:
Peter Zijlstra (Intel) <peterz@infradead.org> Cc: <stable@vger.kernel.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Stephane Eranian <eranian@google.com> Cc: Yan, Zheng <zheng.z.yan@intel.com> Link: http://lkml.kernel.org/r/1420583675-9163-1-git-send-email-andi@firstfloor.org Signed-off-by:
Ingo Molnar <mingo@kernel.org>
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Andy Lutomirski authored
Perf reports user regs for kernel-mode samples so that samples can be backtraced through user code. The old code was very broken in syscall context, resulting in useless backtraces. The new code, in contrast, is still dangerously racy, but it should at least work most of the time. Tested-by:
Jiri Olsa <jolsa@kernel.org> Signed-off-by:
Andy Lutomirski <luto@amacapital.net> Signed-off-by:
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Andy Lutomirski authored
On x86_64, at least, task_pt_regs may be only partially initialized in many contexts, so x86_64 should not use it without extra care from interrupt context, let alone NMI context. This will allow x86_64 to override the logic and will supply some scratch space to use to make a cleaner copy of user regs. Tested-by:
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