- Jul 06, 2015
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Sascha Hauer authored
This adds the SCPSYS device node to the MT8173 dtsi file. Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by:
Daniel Kurtz <djkurtz@chromium.org> Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Eddie Huang authored
Add MT8173 I2C device nodes, include I2C controllers and pins. MT8173 has six I2C controllers, from i2c0 to i2c6, exclude i2c5. The 6th I2C controller register base doesn't next to 5th I2C, and there is a hardware between 5th and 6th I2C controller. So SoC designer name 6th controller as "i2c6", not "i2c5". Signed-off-by:
Eddie Huang <eddie.huang@mediatek.com> Reviewed-by:
Daniel Kurtz <djkurtz@chromium.org> Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Eddie Huang authored
Add MT8173 watchdog device node. Signed-off-by:
Eddie Huang <eddie.huang@mediatek.com> Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Sascha Hauer authored
This adds the device node for the PMIC wrapper. Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by:
Daniel Kurtz <djkurtz@chromium.org> Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Sascha Hauer authored
We used to use a fixed rate clock for the UARTs. Now that we have clock support we can associate the correct clocks to the UARTs and drop the 26MHz fixed rate UART clock. Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Sascha Hauer authored
This adds the device nodes providing clocks on the Mediatek MT8173. These are: topckgen, infracfg, pericfg and apmixedsys. These are fed by two oscillators also added by this patch. Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by:
Daniel Kurtz <djkurtz@chromium.org> Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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- Jul 03, 2015
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Suzuki K. Poulose authored
Commit 86dca36e introduced ratelimited usage for 'unhandled_signal' messages. The commit checks the ratelimit irrespective of whether the signal is handled or not, which is wrong and leads to false reports like the below in dmesg : __do_user_fault: 127 callbacks suppressed Do the ratelimit check only if the signal is unhandled. Fixes: 86dca36e ("arm64: use private ratelimit state along with show_unhandled_signals") Cc: Vladimir Murzin <Vladimir.Murzin@arm.com> Signed-off-by:
Suzuki K. Poulose <suzuki.poulose@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Hanjun Guo authored
It is normal that firmware presents GICC entry or entries (processors) with disabled flag in ACPI MADT, taking a system of 16 cpus for example, ACPI firmware may present 8 ebabled first with another 8 cpus disabled in MADT, the disabled cpus can be hot-added later. Firmware may also present more cpus than the hardware actually has, but disabled the unused ones, and easily enable it when the hardware has such cpus to make the firmware code scalable. So that's not an error for disabled cpus in MADT, we can switch pr_err() to pr_debug() to make the boot a little quieter by default. Since hwid for disabled cpus often are invalid, and we check invalid hwid first in the code, for use case that hot add cpus later will be filtered out and will not be counted in possible cups, so move this check before the hwid one to prepare the code to count for disabeld cpus when cpu hot-plug is introduced. Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Reviewed-by:
Al Stone <ahs3@redhat.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Jul 02, 2015
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Jisheng Zhang authored
It is not needed after booting, this patch moves the arm_cpuidle_init() function to the __init section. Signed-off-by:
Jisheng Zhang <jszhang@marvell.com> Reviewed-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Jul 01, 2015
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Y Vo authored
Add standby domain gpio controller for APM X-Gene SoC platform. Signed-off-by:
Y Vo <yvo@apm.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Kevin Hilman <khilman@linaro.org>
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Christoffer Dall authored
The current pmd_huge() and pud_huge() functions simply check if the table bit is not set and reports the entries as huge in that case. This is counter-intuitive as a clear pmd/pud cannot also be a huge pmd/pud, and it is inconsistent with at least arm and x86. To prevent others from making the same mistake as me in looking at code that calls these functions and to fix an issue with KVM on arm64 that causes memory corruption due to incorrect page reference counting resulting from this mistake, let's change the behavior. Signed-off-by:
Christoffer Dall <christoffer.dall@linaro.org> Reviewed-by:
Steve Capper <steve.capper@linaro.org> Acked-by:
Marc Zyngier <marc.zyngier@arm.com> Fixes: 084bd298 ("ARM64: mm: HugeTLB support.") Cc: <stable@vger.kernel.org> # 3.11+ Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Jun 30, 2015
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Shannon Zhao authored
Commit d795ef9a ("arm64: perf: don't warn about missing interrupt-affinity property for PPIs") added a check for PPIs so that we avoid parsing the interrupt-affinity property for these naturally affine interrupts. Unfortunately, this check can trigger an early (successful) return and we will not assign the value of cpu_pmu->plat_device. This patch fixes the issue. Signed-off-by:
Shannon Zhao <shannon.zhao@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Stephen Boyd authored
It's possible, albeit unlikely, that using the of_node here will reference freed memory. Call of_node_put() after printing the name to be safe. Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Ard Biesheuvel authored
This fixes a build failure under STRICT_MM_TYPECHECKS, by adding a missing pgprot_val() around a pgport_t reference. Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Jun 26, 2015
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Maninder Singh authored
Header <asm/kdebug.h> is not needed for arm64/hw_breakpoint.c, Removing the same. Signed-off-by:
Maninder Singh <maninder1.s@samsung.com> Reviewed-by:
Vaneet Narang <v.narang@samsung.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Xi Wang authored
Upper bits should be zeroed in endianness conversion: - even when there's no need to change endianness (i.e., BPF_FROM_BE on big endian or BPF_FROM_LE on little endian); - after rev16. This patch fixes such bugs by emitting extra instructions to clear upper bits. Cc: Zi Shen Lim <zlim.lnx@gmail.com> Acked-by:
Alexei Starovoitov <ast@plumgrid.com> Fixes: e54bcde3 ("arm64: eBPF JIT compiler") Cc: <stable@vger.kernel.org> # 3.18+ Signed-off-by:
Xi Wang <xi.wang@gmail.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Dominik Dingel authored
Nobody used these hooks so they were removed from common code, and can now be removed from the architectures. Signed-off-by:
Dominik Dingel <dingel@linux.vnet.ibm.com> Acked-by:
Martin Schwidefsky <schwidefsky@de.ibm.com> Acked-by:
Ralf Baechle <ralf@linux-mips.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jun 25, 2015
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Xi Wang authored
Problems occur when bpf_to or bpf_from has value prog->len - 1 (e.g., "Very long jump backwards" in test_bpf where the last instruction is a jump): since ctx->offset has length prog->len, ctx->offset[bpf_to + 1] or ctx->offset[bpf_from + 1] will cause an out-of-bounds read, leading to a bogus jump offset and kernel panic. This patch moves updating ctx->offset to after calling build_insn(), and changes indexing to use bpf_to and bpf_from without + 1. Fixes: e54bcde3 ("arm64: eBPF JIT compiler") Cc: <stable@vger.kernel.org> # 3.18+ Cc: Zi Shen Lim <zlim.lnx@gmail.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by:
Alexei Starovoitov <ast@plumgrid.com> Signed-off-by:
Xi Wang <xi.wang@gmail.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Stephen Boyd authored
John Stultz reported an RCU splat on ARM with ipi trace events enabled. It looks like the same problem exists on ARM64. At this point in the IPI handling path we haven't called irq_enter() yet, so RCU doesn't know that we're about to exit idle and properly warns that we're using RCU from an idle CPU. Use trace_ipi_entry_rcuidle() instead of trace_ipi_entry() so that RCU is informed about our exit from idle. Cc: John Stultz <john.stultz@linaro.org> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by:
Steven Rostedt <rostedt@goodmis.org> Reviewed-by:
Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: <stable@vger.kernel.org> # 3.17+ Fixes: 45ed695a ("ARM64: add IPI tracepoints") Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Zhang Zhen authored
Currently we have many duplicates in definitions of hugetlb_prefault_arch_hook. In all architectures this function is empty. Signed-off-by:
Zhang Zhen <zhenzhang.zhang@huawei.com> Acked-by:
David Rientjes <rientjes@google.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Laurent Dufour authored
CRIU is recreating the process memory layout by remapping the checkpointee memory area on top of the current process (criu). This includes remapping the vDSO to the place it has at checkpoint time. However some architectures like powerpc are keeping a reference to the vDSO base address to build the signal return stack frame by calling the vDSO sigreturn service. So once the vDSO has been moved, this reference is no more valid and the signal frame built later are not usable. This patch serie is introducing a new mm hook framework, and a new arch_remap hook which is called when mremap is done and the mm lock still hold. The next patch is adding the vDSO remap and unmap tracking to the powerpc architecture. This patch (of 3): This patch introduces a new set of header file to manage mm hooks: - per architecture empty header file (arch/x/include/asm/mm-arch-hooks.h) - a generic header (include/linux/mm-arch-hooks.h) The architecture which need to overwrite a hook as to redefine it in its header file, while architecture which doesn't need have nothing to do. The default hooks are defined in the generic header and are used in the case the architecture is not defining it. In a next step, mm hooks defined in include/asm-generic/mm_hooks.h should be moved here. Signed-off-by:
Laurent Dufour <ldufour@linux.vnet.ibm.com> Suggested-by:
Andrew Morton <akpm@linux-foundation.org> Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Cc: Hugh Dickins <hughd@google.com> Cc: Rik van Riel <riel@redhat.com> Cc: Mel Gorman <mgorman@suse.de> Cc: Pavel Emelyanov <xemul@parallels.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Ingo Molnar <mingo@kernel.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Zhang Zhen authored
Currently we have many duplicates in definitions of huge_pmd_unshare. In all architectures this function just returns 0 when CONFIG_ARCH_WANT_HUGE_PMD_SHARE is N. This patch puts the default implementation in mm/hugetlb.c and lets these architectures use the common code. Signed-off-by:
Zhang Zhen <zhenzhang.zhang@huawei.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Tony Luck <tony.luck@intel.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Chris Metcalf <cmetcalf@ezchip.com> Cc: David Rientjes <rientjes@google.com> Cc: James Yang <James.Yang@freescale.com> Cc: Aneesh Kumar <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jun 19, 2015
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Vladimir Murzin authored
printk_ratelimit() shares the ratelimiting state with other callers what may lead to scenarios where at the time we want to print out debug information we already limited, so nothing appears in the dmesg - this makes exception-trace quite poor helper in debugging. Additionally, we have imbalance with some messages limited with global ratelimit state and other messages limited with their private state defined via pr_*_ratelimited(). To address this inconsistency show_unhandled_signals_ratelimited() macro is introduced and caller sites are converted to use it. Signed-off-by:
Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Vladimir Murzin authored
Report unhandled SP/PC alignment faults if the show_unhandled_signals variable is set (via /proc/sys/debug/exception-trace). Signed-off-by:
Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Will Deacon authored
When building the kernel with a bare-metal (ELF) toolchain, the -shared option may not be passed down to collect2, resulting in silent corruption of the vDSO image (in particular, the DYNAMIC section is omitted). The effect of this corruption is that the dynamic linker fails to find the vDSO symbols and libc is instead used for the syscalls that we intended to optimise (e.g. gettimeofday). Functionally, there is no issue as the sigreturn trampoline is still intact and located by the kernel. This patch fixes the problem by explicitly passing -shared to the linker when building the vDSO. Cc: <stable@vger.kernel.org> Reported-by:
Szabolcs Nagy <Szabolcs.Nagy@arm.com> Reported-by:
James Greenlaigh <james.greenhalgh@arm.com> Signed-off-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Sudeep Holla authored
This patch renames __cpu_suspend to cpu_suspend so that it's aligned with ARM32. It also removes the redundant wrapper created. This is in preparation to implement generic PSCI system suspend using the cpu_{suspend,resume} which now has the same interface on both ARM and ARM64. Cc: Mark Rutland <mark.rutland@arm.com> Reviewed-by:
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by:
Ashwin Chaugule <ashwin.chaugule@linaro.org> Signed-off-by:
Sudeep Holla <sudeep.holla@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Jun 17, 2015
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Vladimir Murzin authored
We check against compat_sp, but print out arm64's sp - fix it. Signed-off-by:
Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Dave P Martin authored
The memmap freeing code in free_unused_memmap() computes the end of each memblock by adding the memblock size onto the base. However, if SPARSEMEM is enabled then the value (start) used for the base may already have been rounded downwards to work out which memmap entries to free after the previous memblock. This may cause memmap entries that are in use to get freed. In general, you're not likely to hit this problem unless there are at least 2 memblocks and one of them is not aligned to a sparsemem section boundary. Note that carve-outs can increase the number of memblocks by splitting the regions listed in the device tree. This problem doesn't occur with SPARSEMEM_VMEMMAP, because the vmemmap code deals with freeing the unused regions of the memmap instead of requiring the arch code to do it. This patch gets the memblock base out of the memblock directly when computing the block end address to ensure the correct value is used. Signed-off-by:
Dave Martin <Dave.Martin@arm.com> Cc: <stable@vger.kernel.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Mark Rutland authored
Commit 6c81fe79 ("arm64: enable context tracking") did not update el0_sp_pc to use ct_user_exit, but this appears to have been unintentional. In commit 6ab6463a ("arm64: adjust el0_sync so that a function can be called") we made x0 available, and in the return to userspace we call ct_user_enter in the kernel_exit macro. Due to this, we currently don't correctly inform RCU of the user->kernel transition, and may erroneously account for time spent in the kernel as if we were in an extended quiescent state when CONFIG_CONTEXT_TRACKING is enabled. As we do record the kernel->user transition, a userspace application making accesses from an unaligned stack pointer can demonstrate the imbalance, provoking the following warning: ------------[ cut here ]------------ WARNING: CPU: 2 PID: 3660 at kernel/context_tracking.c:75 context_tracking_enter+0xd8/0xe4() Modules linked in: CPU: 2 PID: 3660 Comm: a.out Not tainted 4.1.0-rc7+ #8 Hardware name: ARM Juno development board (r0) (DT) Call trace: [<ffffffc000089914>] dump_backtrace+0x0/0x124 [<ffffffc000089a48>] show_stack+0x10/0x1c [<ffffffc0005b3cbc>] dump_stack+0x84/0xc8 [<ffffffc0000b3214>] warn_slowpath_common+0x98/0xd0 [<ffffffc0000b330c>] warn_slowpath_null+0x14/0x20 [<ffffffc00013ada4>] context_tracking_enter+0xd4/0xe4 [<ffffffc0005b534c>] preempt_schedule_irq+0xd4/0x114 [<ffffffc00008561c>] el1_preempt+0x4/0x28 [<ffffffc0001b8040>] exit_files+0x38/0x4c [<ffffffc0000b5b94>] do_exit+0x430/0x978 [<ffffffc0000b614c>] do_group_exit+0x40/0xd4 [<ffffffc0000c0208>] get_signal+0x23c/0x4f4 [<ffffffc0000890b4>] do_signal+0x1ac/0x518 [<ffffffc000089650>] do_notify_resume+0x5c/0x68 ---[ end trace 963c192600337066 ]--- This patch adds the missing ct_user_exit to the el0_sp_pc entry path, correcting the context tracking for this case. Signed-off-by:
Mark Rutland <mark.rutland@arm.com> Acked-by:
Will Deacon <will.deacon@arm.com> Fixes: 6c81fe79 ("arm64: enable context tracking") Cc: <stable@vger.kernel.org> # v3.17+ Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Marc Zyngier authored
The GIC Hypervisor Configuration Register is used to enable the delivery of virtual interupts to a guest, as well as to define in which conditions maintenance interrupts are delivered to the host. This register doesn't contain any information that we need to read back (the EOIcount is utterly useless for us). So let's save ourselves some cycles, and not save it before writing zero to it. Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com>
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Alex Bennée authored
The elr_el2 and spsr_el2 registers in fact contain the processor state before entry into EL2. In the case of guest state it could be in either el0 or el1. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com>
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Kim Phillips authored
The KVM-VFIO device is used by the QEMU VFIO device. It is used to record the list of in-use VFIO groups so that KVM can manipulate them. Signed-off-by:
Kim Phillips <kim.phillips@linaro.org> Signed-off-by:
Eric Auger <eric.auger@linaro.org> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com>
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- Jun 15, 2015
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Mark Rutland authored
The kernel memtest utility is incredibly useful for detecting memory problems, but sadly isn't in defconfig. The memtest itself is only run when the user has explicitly passed a memtest option on the kernel command line, so simply enabling the option should not have a negative impact. Signed-off-by:
Mark Rutland <mark.rutland@arm.com> Cc: Vladimir Murzin <vladimir.murzin@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Suthikulpanit, Suravee authored
section 6.2.17 _CCA states that ARM platforms require ACPI _CCA object to be specified for DMA-cabpable devices. Therefore, this patch specifies ACPI_CCA_REQUIRED in arm64 Kconfig. In addition, to handle the case when _CCA is missing, arm64 would assign dummy_dma_ops to disable DMA capability of the device. Acked-by:
Catalin Marinas <catalin.marinas@arm.com> Signed-off-by:
Mark Salter <msalter@redhat.com> Signed-off-by:
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Signed-off-by:
Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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- Jun 12, 2015
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Vladimir Murzin authored
tlb.S has been removed since fa48e6f7 "arm64: mm: Optimise tlb flush logic where we have >4K granule", so align comment with that. Signed-off-by:
Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Catalin Marinas authored
After secondary CPU boot or hotplug, the active_mm of the idle thread is &init_mm. The init_mm.pgd (swapper_pg_dir) is only meant for TTBR1_EL1 and must not be set in TTBR0_EL1. Since when active_mm == &init_mm the TTBR0_EL1 is already set to the reserved value, there is no need to perform any context reset. Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@vger.kernel.org>
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Marc Zyngier authored
So far, we configured the world-switch by having a small array of pointers to the save and restore functions, depending on the GIC used on the platform. Loading these values each time is a bit silly (they never change), and it makes sense to rely on the instruction patching instead. This leads to a nice cleanup of the code. Acked-by:
Will Deacon <will.deacon@arm.com> Reviewed-by:
Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Marc Zyngier authored
Add a new item to the feature set (ARM64_HAS_SYSREG_GIC_CPUIF) to indicate that we have a system register GIC CPU interface This will help KVM switching to alternative instruction patching. Reviewed-by:
Andre Przywara <andre.przywara@arm.com> Reviewed-by:
Christoffer Dall <christoffer.dall@linaro.org> Acked-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Jun 11, 2015
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Linus Walleij authored
The Juno board, and likely many other boards, likes to use simple GPIO keys for input events. Enabled this in the default ARM64 defconfig. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Reviewed-by:
Shannon Zhao <shannon.zhao@linaro.org> Signed-off-by:
Kevin Hilman <khilman@linaro.org>
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Linus Walleij authored
The Juno board has two keys connected to a PL061 GPIO block, in accordance to DDI0524B "ARM Versatile Express Juno Development Platform" revision 1.0, table 2-4 "GPIO (0) and GPIO (1) used for additional user key entry". By trial-and-error I found that these are connected to the two keys named "power" and "home" on the motherboard. Register the GPIO block and these two keys in the device tree using the PL061 GPIO driver and the generic gpio keys. - Map POWER, HOME, VOL+ and VOL- to the obvious input events. - Map RLOCK to KEY_SCREENLOCK/KEY_COFFEE unless someone can explain better what this is for. - Map the NMI button to KEY_SYSREQ as this is used like so in the SYSREQ debugging hack. Acked-by:
Liviu Dudau <Liviu.Dudau@arm.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Kevin Hilman <khilman@linaro.org>
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