- Jan 23, 2013
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Richard Genoud authored
The PIN_BANK 3 is for PDxx pins, not PCxx pins. And PIN_BANK 1 is for PBxx, not PIN_BANK 0. Signed-off-by:
Richard Genoud <richard.genoud@gmail.com> Acked-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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- Jan 14, 2013
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Stephen Warren authored
if_changed (used by the *.dts->*.dtc rule) rebuilds files if they aren't contained in $(targets). (make V=2 indicates this). Add $(dtb-y) to $(targets) to prevent *.dtb from always being rebuilt. This fixes a regression introduced by the .dtb rule rework in 499cd829 "ARM: dt: change .dtb build rules to build in dts directory". Reported-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Rob Herring <rob.herring@calxeda.com>
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- Jan 12, 2013
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Bo Shen authored
Add pinctrl support for SSC on AT91 dtsi files. Signed-off-by:
Bo Shen <voice.shen@atmel.com> [nicolas.ferre@atmel.com: split dtsi and driver changes] Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com> Reluctantly-acked-by:
Olof Johansson <olof@lixom.net> Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com>
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- Jan 08, 2013
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Rob Herring authored
With the addition of commit a0ae0240 (ARM: kernel: add device tree init map function), the cpu reg values must match the cpu mpidr register or we'll get warnings. For some reason, the CLUSTERID on highbank is 9, so the reg value needs to be 0x90n to quiet the warnings. Signed-off-by:
Rob Herring <rob.herring@calxeda.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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Rob Herring authored
While device_type is considered deprecated, it is still needed for tools like lshw to identify cpu nodes. Signed-off-by:
Rob Herring <rob.herring@calxeda.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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Marek Vasut authored
The second FlexCAN port uses different clock than the first one, configure correct clock to prevent hanging of the system during bringing up of the port. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by:
Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- Jan 07, 2013
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Sebastian Hesselbarth authored
During merge of the mvebu patches a clock gate for pinctrl was lost. This patch just readds the clock gate. Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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- Jan 06, 2013
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Andrew Lunn authored
The Armada XP MV78230 DT include file is missing a ; at the end of the cpu node. Reported-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
We originally thought that the MV78230 variant of the Armada XP had four Ethernet interfaces, like the other variants MV78260 and MV78460. In fact, this is not true, and the MV78230 has only three Ethernet interfaces. So, the definitions of the Ethernet interfaces is now done as follows: * armada-370-xp.dtsi: definitions of the first two interfaces, that are common to Armada 370 and Armada XP * armada-xp.dtsi: definition of the third interface, common to all Armada XP variants. * armada-xp-mv78260.dtsi and armada-xp-mv78460.dtsi: definition of the fourth interface. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
Contrary to our understanding at the time armada-xp-mv78230.dtsi was written, the MV78230 variant of the Armada XP SoC has two cores and not one. This patch updates the .dtsi file to take into account this reality. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
With the change to a DT based pinctrl/gpio driver, using gpio API calls in board-*.c files no longer works, a dereferenced NULL pointer exception occurs instead. By converting the GPIO code into a fixed-regulator which gets probed later once pinctrl/gpio is available, we avoid the exception. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Tested-by:
Stefan Peter <s.peter@mplch> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Nobuhiro Iwamatsu authored
Clock Management of kirkwood has moved to DT clock providers. However, TWSI1 has not yet been done. This switches TWSI1 of 88f6282 to DT clock providers. Signed-off-by:
Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
Without the clock being held by a driver, it gets turned off at a bad time causing the SoC to lockup. This is often during reboot. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Tested-by:
Stefan Peter <s.peter@mpl.ch> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Gregory CLEMENT authored
The UART controller used in the Armada 370 and Armada XP SoCs is the Synopsys DesignWare 8250 (aka Synopsys DesignWare ABP UART). The improper use of the ns16550 can lead to a kernel oops during boot if a character is sent to the UART before the initialization of the driver. The DW APB has an extra interrupt that gets raised when writing to the LCR when busy. This explains why we need to use dw-apb-uart driver to handle this. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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- Jan 04, 2013
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Fabio Estevam authored
In the compatible field we should point the manufacturer of the board, which in this case is Buglabs. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- Jan 02, 2013
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Aaro Koskinen authored
Add DT support for twl4030_wdt. This is needed to get twl4030_wdt to probe when booting with DT. Signed-off-by:
Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by:
Wim Van Sebroeck <wim@iguana.be>
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- Dec 28, 2012
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Kukjin Kim authored
Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Kukjin Kim authored
Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- Dec 27, 2012
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Sean Paul authored
Reduce the HDMI resource size from 0x100000 to 0x70000 so it doesn't overlap the Displayport resource space. HDMI: (0x14530000 - 0x145A0000) DP: (0x145B0000 - 0x145B1000) Signed-off-by:
Sean Paul <seanpaul@chromium.org> Signed-off-by:
Prathyush K <prathyush.k@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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- Dec 26, 2012
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Fabio Baltieri authored
Current nmk_pinctrl driver is not PRCMU dependent anymore, so it needs its own DT address resources to work properly, as done for platform_device in: f4828336 ARM: ux500: add PRCM register base for pinctrl Signed-off-by:
Fabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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- Dec 25, 2012
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Fabio Estevam authored
On the imx23-olinuxino board GPIO2_1 is connected to the LED and GPIO0_17 is the USB PHY reset. So make the IOMUX assignment properly. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org>
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- Dec 22, 2012
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Kukjin Kim authored
Commit db5b0ae0 ("Merge tag 'dt' of git://git.kernel.org/.../arm-soc" ) causes a duplicated build target. This patch fixes it and sorts out the build target alphabetically so that we can recognize something wrong easily. Cc: Olof Johansson <olof@lixom.net> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Dec 20, 2012
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Olof Johansson authored
This is the rename portion of "ARM: sunxi: Change device tree naming scheme for sunxi" that were missed when the patch was applied. Signed-off-by:
Olof Johansson <olof@lixom.net>
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- Dec 17, 2012
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Maxime Ripard authored
There is several different SoCs sharing the sun5i codename: A10s, A12 and A13. Since there is enough differences to not consider those the same SoCs, change a bit the naming scheme to reflect this. Moreover, some boards like the olinuxino come in A10s and A13 variants, which also share the same SoC codename. So change the naming scheme to reflect both the codename and the market name of the SoCs used in the dtsi and in the board files Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Olof Johansson <olof@lixom.net>
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Fabio Estevam authored
FEC controller is connected to AIPI2 bus. Also fix the AIPI1 address range. Signed-off-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Sascha Hauer <s.hauer@pengutronix.de>
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- Dec 16, 2012
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Shawn Guo authored
Commit 91a9fec0 (ARM: move debug macros to common location) moves arch/arm/kernel/debug.S and arch/arm/kernel/head.S to CONFIG_DEBUG_LL_INCLUDE, but leaves arch/arm/boot/compressed/head.S still with mach/debug-macro.S. This causes the following build error on platforms that moved to new DEBUG_LL inclusion mechanism, when arch/arm/boot/compressed/head.S is compiled with DEBUG turned on. AS arch/arm/boot/compressed/head.o arch/arm/boot/compressed/head.S:49:30: fatal error: mach/debug-macro.S: No such file or directory compilation terminated. Fix the problem by replacing mach/debug-macro.S inclusion with CONFIG_DEBUG_LL_INCLUDE one. Reported-by:
Steev Klimaszewski <steev@genesi-usa.com> Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
Russell King <rmk+kernel@arm.linux.org.uk>
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- Dec 15, 2012
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Bo Shen authored
Change the value of status to disabled to keep the consistent Signed-off-by:
Bo Shen <voice.shen@atmel.com> Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com>
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- Dec 14, 2012
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Jon Hunter authored
Commit 0d9250c4 (ARM: dts: omap4-panda: Add pinmux configuration for HDMI) added a new device-tree source file for Rev A4 of the OMAP4430 Panda board but it did not add this version to the makefile. Hence, add this file to the makefile. Signed-off-by:
Jon Hunter <jon-hunter@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Jon Hunter authored
The system memory node for the OMAP2420 H4 was incorrectly defined as start address followed by end address, instead of start address and size. No noticable side-effects were observed but fix this for correctness. Signed-off-by:
Jon Hunter <jon-hunter@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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- Dec 03, 2012
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Grant Likely authored
The current rules have the .dtb files build in a different directory from the .dts files. The only reason for this is that it was what PowerPC has done historically. This patch changes ARM to use the generic dtb rule which builds .dtb files in the same directory as the source .dts. Cc: Russell King <linux@arm.linux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> Acked-by:
Olof Johansson <olof@lixom.net> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by:
Grant Likely <grant.likely@secretlab.ca> [swarren: added rm command for old stale .dtb files] Signed-off-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Rob Herring <rob.herring@calxeda.com>
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- Nov 27, 2012
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Bartlomiej Zolnierkiewicz authored
Add missing PL330 MDMA1 controller node to the device tree (DT). [ Currently there is no problem with using 'non-secure' mdma1 address instead of 'secure' one on revision 0 of Exynos4210 SOC (as used by Universal C210 board) as this SOC revision is unsupported by DT. ] Reviewed-by:
Tomasz Figa <t.figa@samsung.com> Signed-off-by:
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by:
Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com>
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Gregory CLEMENT authored
Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
Yehuda Yitschak <yehuday@marvell.com> Tested-and-reviewed-by:
Yehuda Yitschak <yehuday@marvell.com> Tested-and-reviewed-by:
Lior Amsalem <alior@marvell.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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Fabio Baltieri authored
This adds hrefprev60, hrefv60plus and ccu9540 to device trees compiled during build. Acked-by:
Linus Walleij <linus.walleij@linaro.org> Acked-by:
Lee Jones <lee.jones@linaro.org> Signed-off-by:
Fabio Baltieri <fabio.baltieri@linaro.org>
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Lee Jones authored
GPIO numbers for the newly created gpio-regulator will differ from board to board. Therefore it's not sensible to leave this information in the top level DTSI file. Let's move them out to the DTS files where they can correctly vary. Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Lee Jones authored
Not all supported boards will require a MMCI gpio-regulator, therefore it's a good idea to only enable the node when and if it is required. Let's disable it by default. Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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- Nov 26, 2012
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Stefan Roese authored
Patch f055f1f6 [ARM: sunxi: Add sun4i and cubieboard support] missed this sun4i.dtsi include file. This patch finally brings it upstream enabling support for sun4i boards. Signed-off-by:
Stefan Roese <sr@denx.de> Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
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Shiraz Hashim authored
This adds support for SPEAr320-HMI board. Signed-off-by:
Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by:
Viresh Kumar <viresh.kumar@linaro.org>
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Shiraz Hashim authored
shirq layer has been adapted to DT, add corresponding nodes in all SPEAr3xx variants. Signed-off-by:
Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by:
Viresh Kumar <viresh.kumar@linaro.org>
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Shiraz Hashim authored
This patch adds multiple device nodes for SPEAr machines and boards. Signed-off-by:
Bhavna Yadav <bhavna.yadav@st.com> Signed-off-by:
Deepak Sikri <deepak.sikri@st.com> Signed-off-by:
Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by:
Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by:
Vijay Kumar Mishra <vijay.kumar@st.com> Signed-off-by:
Vipin Kumar <vipin.kumar@st.com> Signed-off-by:
Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by:
Viresh Kumar <viresh.kumar@linaro.org>
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Vipul Kumar Samar authored
amba-pl011 driver supports two pin state "default" and "sleep" and it expect from dt to provide this pinctrl states and phandler otherwise it gives a warning message. To remove this warning message pass default state with null phandler to uart pins in device node (In our case all the pins are configured in default states so we pass null phandler to pins). Signed-off-by:
Vipul Kumar Samar <vipulkumar.samar@st.com> Signed-off-by:
Viresh Kumar <viresh.kumar@linaro.org>
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