Commits · cf85c109831ce11ffa9befd4e970d6363e410a10 · jan.koester / Linux

Apr 28, 2008

[MIPS] Pb1200: do register SMC 91C111 · cf85c109

Sergei Shtylyov authored Apr 15, 2008



Pb1200 does have SMC 91C111 Ethernet chip on board but the platform code
did not register it, so one couldn't mount NFS...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

cf85c109

[MIPS] DBAu1200: fix bad SMC 91C111 resource size · 3854c69a

Sergei Shtylyov authored Apr 15, 2008

The on-board SMC 91C111 chip only decodes 16 bytes of memory (obviously, it
can not decode a whole megabyte starting from address 0x19000300).

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

3854c69a

[MIPS] Fix some sparse warnings on traps.c and irq-msc01.c · 411ba7fc

Atsushi Nemoto authored Apr 26, 2008



* Declare board_bind_eic_interrupt, board_watchpoint_handler in traps.h
* Make msc_bind_eic_interrupt static and fix its argument types.
* Make msc_levelirq_type, msc_edgeirq_type static.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

411ba7fc

[MIPS] cevt-gt641xx: Kill unnecessary include · 85580839

Atsushi Nemoto authored Apr 24, 2008



Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

85580839

[MIPS] DS1287: Add clockevent driver · 6457d9fc

Yoichi Yuasa authored Apr 25, 2008



Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

6457d9fc

[MIPS] add DECstation I/O ASIC clocksource · 4247417d

Yoichi Yuasa authored Apr 24, 2008



Add DECstation I/O ASIC clocksource

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

4247417d

[MIPS] rbtx4938: minor cleanup · 05a96fae

Atsushi Nemoto authored Apr 22, 2008



Do not initialize res->parent for platform device.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

05a96fae

[MIPS] rbtx4938: misc cleanups · 66140c8e

Atsushi Nemoto authored Apr 14, 2008



* Do not use non-standard I/O accessors, such as reg_rd08, etc.
* Kill unnecessary wbflush()
* Kill tx4938_mips.h
* Kill unnecessary includes

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

66140c8e

[MIPS] jmr3927: use generic txx9 gpio · 1bd0962e

Atsushi Nemoto authored Apr 05, 2008



Use generic txx9 gpio (and gpiolib) for JMR3927 board.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

1bd0962e

[MIPS] rbhma4500: use generic txx9 gpio · 4cad154b

Atsushi Nemoto authored Apr 05, 2008



Use generic txx9 gpio (and gpiolib) for RBHMA4500 board.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

4cad154b

[MIPS] generic txx9 gpio support · a9aec7fe

Atsushi Nemoto authored Apr 05, 2008



This is a board-independent TXx9 gpio API implementation using gpiolib.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

a9aec7fe

[MIPS] unexport null_perf_irq() and make it static · 46684734

Dmitri Vorobiev authored Apr 02, 2008



This patch unexports the null_perf_irq() symbol, and simultaneously
makes this function static.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

46684734

[MIPS] unexport rtc_mips_set_time() · c5b0680a

Dmitri Vorobiev authored Apr 02, 2008



No users for the rtc_mips_set_time() routine exist outside of the
core kernel code. Therefore, EXPORT_SYMBOL(rtc_mips_set_time) is
useless, and this patch removes it.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

c5b0680a

[MIPS] unexport copy_from_user_page() · e698d66b

Dmitri Vorobiev authored Apr 02, 2008



No users for the copy_from_user_page() routine exist outside of the
core kernel code. Therefore, EXPORT_SYMBOL(copy_from_user_page) is
useless, and this patch removes it.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

e698d66b

[MIPS] unexport copy_to_user_page() · 715243e6

Dmitri Vorobiev authored Apr 02, 2008



The copy_to_user_page() function is called only in the core kernel
code. Therefore, there is no need to export it. This patch removes
EXPORT_SYMBOL(copy_to_user_page).

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

715243e6

[MIPS] unexport copy_user_highpage() · 11327ef7

Dmitri Vorobiev authored Apr 02, 2008



The copy_user_highpage() routine has no users outside of the
core kernel code, so exporting this symbol is pointless.
This patch removes EXPORT_SYMBOL(copy_user_highpage).

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

11327ef7

[MIPS] Alchemy: move UART platform code to its proper place · 6e766458

Sergei Shtylyov authored Apr 04, 2008



Move the code registering the Alchemy UART platform devices from
drivers/serial/ to its proper place, into the Alchemy platform code.  Fix
the related Kconfig entry, while at it...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

6e766458

[MIPS] Alchemy: kill useless #include's, #define's and extern's · ce28f94c

Sergei Shtylyov authored Apr 23, 2008



Go thru the Alchemy code and hunt down every unneeded #include, #define, and
extern (some of which refer to already long dead functions).

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

ce28f94c

[MIPS] malta_int.c: make 4 variables static · b57c1913

Dmitri Vorobiev authored Apr 01, 2008



The following variables defined in arch/mips/mips-boards/malta/malta_int.c
can become static: msc_irqmap[], msc_nr_irqs, msc_eicirqmap[], and
msc_nr_eicirqs. This patch makes them static.

Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.

Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

b57c1913

[MIPS] make standard_io_resources[] static · 52d65cf8

Dmitri Vorobiev authored Apr 01, 2008



The array standard_io_resources[] needs not to be exposed in the kernel
global namespace. This patch makes it static.

Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.

Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

52d65cf8

[MIPS] make plat_perf_setup() static · b31dc3c4

Dmitri Vorobiev authored Apr 01, 2008



There is no need for the plat_perf_setup() function to be global,
so make it static.

Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.

Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

b31dc3c4

[MIPS] make mdesc and prom_getmdesc() static · ddaf5740

Dmitri Vorobiev authored Apr 01, 2008



Neither the mdesc[] array nor the prom_getmdesc() function need to
be global. This patch makes them static.

Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.

Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

ddaf5740

[MIPS] make mips_ejtag_setup() static · 33d69d2a

Dmitri Vorobiev authored Apr 01, 2008



This change makes the needlessly global function mips_ejtag_setup() static.

Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.

Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

33d69d2a

[MIPS] make mips_nmi_setup() static · cd2675fb

Dmitri Vorobiev authored Apr 01, 2008



This change makes the needlessly global function mips_nmi_setup() static.

Successfully build-tested using default configs for Malta, Atlas
and SEAD boards.

Runtime test successfully performed by booting the Malta 4Kc board
up to the shell prompt.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

cd2675fb

[MIPS] replace remaining __FUNCTION__ occurrences · bb09a954

Harvey Harrison authored Mar 28, 2008



__FUNCTION__ is gcc-specific, use __func__

Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

bb09a954

[MIPS] remove redundant display of free swap space in show_mem() · f2ce89f3

Johannes Weiner authored Mar 28, 2008



Signed-off-by: Johannes Weiner <hannes@saeurebad.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

f2ce89f3

[MIPS] Alchemy: kill useless time variables · eba8291b

Sergei Shtylyov authored Mar 27, 2008



Since the commit 91a2fcc8 ([MIPS]
Consolidate all variants of MIPS cp0 timer interrupt handlers) removed the
Alchemy specific timer handler, 'r4k_offset' and 'r4k_cur' variables became
practically useless, so get rid of them at last, renaming cal_r4off()
function into calc_clock() and making it return CPU frequency. Also, make
'no_au1xxx_32khz' variable static...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

eba8291b

[MIPS] Alchemy: don't unmask timer IRQ early · 01675095

Sergei Shtylyov authored Mar 24, 2008



Defer the unmasking of the count/compare interrupt (IRQ5) till the
clockevent driver initialization:

- only enable the cascaded IRQs 0 thru 4 in arch_init_irq(); kill the
  ALLINTS macro -- this change is blessed by AMD as I saw it in their own
  patch; :-)

- do not force IRQ5 enabled in plat_time_init() if PM is enabled and there's
  no 32 KHz crystal.

Update the copyrights (taking into account my prior changes), also removing
Pete Popov's old email...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

01675095

[MIPS] Move arch/mips/philips to arch/mips/nxp · a92b0588

Daniel Laird authored Mar 06, 2008



Signed-off-by: daniel.j.laird <daniel.j.laird@nxp.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

a92b0588

[MIPS] replace __inline with inline · 389310e2

Harvey Harrison authored Mar 04, 2008



Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

389310e2

[MIPS] Add support for MIPS CMP platform. · 39b8d525

Ralf Baechle authored Apr 28, 2008



Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

39b8d525

[MIPS] Add CoreFPGA5 support; distinguish between SOCit/ROCit · 30840244
Chris Dearman authored Sep 21, 2007
```
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
30840244
[MIPS] Add noulri kernel argument to disable "rdhwr $29" usermode support. · bdc94eb4
Chris Dearman authored Oct 03, 2007
```
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
```
bdc94eb4

[MIPS] Allow setting of the cache attribute at run time. · 35133692

Chris Dearman authored Sep 19, 2007



Slightly tacky, but there is a precedent in the sparc archirecture code.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

35133692

[MIPS] All MIPS32 processors support64-bit physical addresses. · 962f480e

Chris Dearman authored Sep 19, 2007



Still, only the 4K may actually implement it.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

962f480e

[MIPS] Remove TLB sanitation code · 0bfa130e

Chris Dearman authored Sep 14, 2007



It is not being used by Malta and shouldn't be needed for MIPSsim.
    
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

0bfa130e

[MIPS] Basic SPRAM support · 0b6d497f

Chris Dearman authored Sep 13, 2007



Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

0b6d497f

[MIPS] Reimplement clear_page/copy_page · fb2a27e7

Thiemo Seufer authored Feb 18, 2008



Fold the SB-1 specific implementation of clear_page/copy_page in the
generic version, and rewrite that one in tlbex style. The immediate
benefits:
  - It converts the compile-time workaround for SB-1 pass 1 prefetches
    to a more efficient run-time check.
  - It allows adjustment of loop unfolling, which helps to reduce the
    number of redundant cdex cache ops.
  - It fixes some esoteric cornercases (the cache line length calculations
    can go wrong, and support for 64k pages without prefetch instructions
    will overflow the addiu immediate).
  - Somewhat better guesses of "good" prefetch values.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

fb2a27e7

Apr 27, 2008

KVM: MMU: kvm_pv_mmu_op should not take mmap_sem · 960b3991

Marcelo Tosatti authored Apr 16, 2008



kvm_pv_mmu_op should not take mmap_sem. All gfn_to_page() callers down
in the MMU processing will take it if necessary, so as it is it can
deadlock.

Apparently a leftover from the days before slots_lock.

Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>

960b3991

KVM: SVM: remove selective CR0 comment · 1336028b

Joerg Roedel authored Apr 16, 2008

There is not selective cr0 intercept bug. The code in the comment sets the
CR0.PG bit. But KVM sets the CR4.PG bit for SVM always to implement the paged
real mode. So the 'mov %eax,%cr0' instruction does not change the CR0.PG bit.
Selective CR0 intercepts only occur when a bit is actually changed. So its the
right behavior that there is no intercept on this instruction.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>

1336028b