Commits · d5c1e84b3a130f0743b218b33ff7d9cb493ab5b4 · jan.koester / Linux · GitLab

Jan 23, 2014
- drm/nouveau: hold mutex while syncing to kernel channel · d5c1e84b
  Maarten Lankhorst authored Jan 14, 2014
  d5c1e84b
- drm/nv50-/devinit: prevent use of engines marked as disabled by hw/vbios · 4019aaa2
  Ilia Mirkin authored Jan 14, 2014
  4019aaa2
- drm/nouveau/device: provide a way for devinit to mark engines as disabled · f0d13e3a
  Ilia Mirkin authored Jan 09, 2014
  f0d13e3a
- drm/nouveau/devinit: tidy up the subdev class definition · cf336014
  Ben Skeggs authored Jan 14, 2014
  cf336014
- drm/nouveau/bar: tidy up the subdev and object class definitions · 52225551
  Ben Skeggs authored Dec 23, 2013
  52225551
- drm/nouveau/instmem: tidy up the object class definition · ab606194
  Ben Skeggs authored Dec 23, 2013
  ab606194
- drm/nouveau/instmem: tidy up the subdev class definition · 24a4ae86
  Ben Skeggs authored Dec 23, 2013
  24a4ae86
- drm/nouveau/pwr: implement a simple i2c stack · 64c672ae
  Ben Skeggs authored Nov 09, 2013
  64c672ae
- drm/nouveau/pwr: have rd/wr32 routines clobber data instead of addr · 2e9dfe23
  Ben Skeggs authored Dec 12, 2013
  2e9dfe23
- drm/nve0/fb: turn off some bits in 10f584 at init · 73216231
  Ben Skeggs authored Dec 03, 2013
  73216231
- drm/nve0/fb/gddr5: merge a fix from ddr3 for one of the timing settings · cb54dd2f
  Ben Skeggs authored Dec 03, 2013
  cb54dd2f
- drm/nve0/fb/gddr5: yet another random 10f200 bit · b13d0e4a
  Ben Skeggs authored Dec 03, 2013
  b13d0e4a
- drm/nvc0-/fb: hook up skeleton interrupt handler · c814a60d
  Ben Skeggs authored Dec 03, 2013
  c814a60d
- drm/nve0/fb/gddr5: more 10f200 stuff · 7f39e597
  Ben Skeggs authored Dec 03, 2013
  7f39e597
- drm/nve0/clk: report ddr memory frequency · 12642e36
  Ben Skeggs authored Dec 03, 2013
  12642e36
- drm/nouveau/fb/gddr5: make sure we update mr7 when we're supposed to · 1a894c06
  Ben Skeggs authored Dec 03, 2013
  1a894c06
- drm/nve0/fb/gddr5: 10f698/69c · a8ccbb77
  Ben Skeggs authored Dec 03, 2013
  a8ccbb77
- drm/nve0/fb: it's now safe to obey the memory voltage setting properly · cfe17608
  Ben Skeggs authored Dec 03, 2013
  cfe17608
- drm/nve0/fb: multi-stage reclock is required for certain transitions · 46bf1c38
  Ben Skeggs authored Dec 03, 2013
  46bf1c38
- drm/nouveau/clk: allow fb to signal it needs to do a multi-stage reclock · 1789cab4
  Ben Skeggs authored Dec 03, 2013
  1789cab4
- drm/nve0/fb/gddr5: parse bios data into struct rather than using directly · b655f2bb
  Ben Skeggs authored Dec 02, 2013
  b655f2bb
- drm/nve0/fb/gddr5: found LP3 setting · ea8b4a38
  Ben Skeggs authored Dec 02, 2013
  ea8b4a38
- drm/nve0/fb: note the memory voltage toggle, not using it yet · 971372ea
  Ben Skeggs authored Dec 02, 2013
  971372ea
- drm/nve0/fb/gddr5: somewhat better attempt at 100770/10f604/610/614 · db6735ca
  Ben Skeggs authored Nov 30, 2013
  db6735ca
- drm/nve0/fb/gddr5: fixup delays a bit · f4aa2c66
  Ben Skeggs authored Nov 30, 2013
  f4aa2c66
- drm/nouveau/bios: timing 2.0 entries can have subentries · 1522ecae
  Ben Skeggs authored Nov 30, 2013
  1522ecae
- drm/nve0/fb/gddr5: note another semi-unknown · 09692e5b
  Ben Skeggs authored Nov 28, 2013
  09692e5b
- drm/nouveau/fb/gddr5: modify mr8 with high bits of CL/WR · 1e1d6b4c
  Ben Skeggs authored Nov 28, 2013
  1e1d6b4c
- drm/nve0/fb/gddr5: fix calculation of RDQS setting · e7084c66
  Ben Skeggs authored Nov 28, 2013
  e7084c66
- drm/nve0/fb/gddr5: switch off some other random bit at some point · 334565ab
  Ben Skeggs authored Nov 28, 2013
  334565ab
- drm/nve0/fb/gddr5: punt all 10f910/914 accesses through ram_train · 01891690
  Ben Skeggs authored Nov 28, 2013
  01891690
- drm/nve0/fb/gddr5: not all memory partitions are created equal · d394fb12
  Ben Skeggs authored Nov 27, 2013
  d394fb12
- drm/nve0/fb: typo in register name · dd95c8f7
  Ben Skeggs authored Nov 27, 2013
  dd95c8f7
- drm/nouveau/bios: make common code to handle ramcfg strap etc · 0a0dc8f5
  Ben Skeggs authored Nov 27, 2013
  0a0dc8f5
- drm/nve0/fb/gddr5: fix an assumption of sane memory controller layout · 59054392
  Ben Skeggs authored Nov 26, 2013
  59054392
- drm/nve0/fb/gddr5: fix behaviour of lp3 setting · 2daaf5b0
  Ben Skeggs authored Nov 26, 2013
  2daaf5b0
- drm/nve0/fifo: recover from mmu faults on bar1/bar3 · cb1567c2
  Ben Skeggs authored Jan 09, 2014
  cb1567c2
- drm/nve0/fifo: keep mmu fault interrupts enabled at all times · 649ec925
  Ben Skeggs authored Jan 09, 2014
  649ec925
- drm/nve0/fifo: update human-readable mmu fault descriptions · e1b6b14a
  Ben Skeggs authored Jan 08, 2014
  e1b6b14a
- drm/nve0/fifo: document more intr status bits · e9fb9805
  Ben Skeggs authored Jan 08, 2014
  e9fb9805