- Jun 21, 2016
-
-
Daode Huang authored
The default driver sets anchor led bit to 0 when link down, actually, the anchor bit should be set to 1, so fixes it when link status is down. Secondly, change the return value of cpld_set_led_id to 0, which means leave the cpld to control led blink frequece other than the driver itself. Signed-off-by:
Daode Huang <huangdaode@hisilicon.com> Signed-off-by:
Yisen Zhuang <Yisen.Zhuang@huawei.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
-
Daode Huang authored
When network interface is enabled, the ring enable operation is conducted twice. This patch deletes the redundancy code of ring enable, and integrates hnae_ae_ops.toggle_queue_status other functions to hns_ae_start. Signed-off-by:
-
Daode Huang authored
This patch adds get_coalesce_range api for hns, it shows range of coalesce usecs and frames that can be set on this interface. Signed-off-by:
-
Daode Huang authored
The current driver stores the high bit value of tcam data register to the tcam data low element, stores the low bit value of tcam data register to tcam data high element, this patch fixes this bug. Signed-off-by:
-
Daode Huang authored
This patch adds spin lock for tcam table operation, there maybe a race condition happens when more than one thread try to change the tcam talbe entries. Signed-off-by:
-
Daode Huang authored
For SoC hip06, PFC pause handled in dsaf, while hip05 in XGMAC, so change the statistics of pfc pause in dsaf and remove the old pfc pause frame statistics. Signed-off-by:
-
Qianqian Xie authored
For debug-ports,there are two non-synchronized processes: Speed-Auto-Negotiation and Link-Update-Status. The two processes are towed by two different state machines. Bond reads the speed when link up, but the speed maybe not update the right value at that time.That make for bond's wrong speed. Thus only one state machine should be used and if phy_state_machine is used, it does not need to do hns_nic_update_link_status(). Signed-off-by:
Qianqian Xie <xieqianqian@huawei.com> Signed-off-by:
-
Kejian Yan authored
When run ethtool cmd(ethtool -t ethx) again and again for a long time, it will be probabilistically fail. The PHYs' registers may be on different pages, so it must be switch to the right page before setting PHYs' registers. And __lb_up() calls phy_start() to startup the PHYs device, but this function may change Copper Control Register(Page 0, Register 0) to an other value. It would cause phy loopback test fail. if we remove phy_start(), we have to remove the relative phy_stop(), phy_disconnect() when doing phy loopback to keep the phy stay in right status. Reported-by:
hejun <hjat2005@huawei.com> Signed-off-by:
Kejian Yan <yankejian@huawei.com> Signed-off-by:
-
Kejian Yan authored
As Hilink3 and Hilink4 use the same xge training and xge u adaptor for HNSv2, it needs to select which Hilink to be set before relative serdes being configed. The hilink_access_sel is the register to do that. Signed-off-by:
-
Qianqian Xie authored
The error info should be printed as "set mask to 64bit fail!" instead of "set mask to 32bit fail!" in dma_set_mask_and_coherent(). Signed-off-by:
-
Qianqian Xie authored
The driver uses devm_ioremap_resource, it will unmap the map automatically, remove the unnecessary the resource free. Signed-off-by:
Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by:
-
Qianqian Xie authored
The annotation info for hns_nic_reset_subtask() should be "for resetting subtask" instead of "for resetting suntask". Signed-off-by:
-
Kejian Yan authored
HNS receives a packet without doing anything, but it should call skb_reset_mac_header() to initialize the header before using eth_hdr(). Fixes: 0d6b425a Signed-off-by:
-
Qianqian Xie authored
For service port, hns dsaf v1 support to close tx_pause. However, the port will be invalid when it run command ethtool to close tx_pause. This patch will fix it. Signed-off-by:
Qianqian Xie <xieqiaqian@huawei.com> Signed-off-by:
-
Qianqian Xie authored
The bit fileds of PPE reset register are different between HNS v1 and HNS v2, but the current procedure just only match HNS v1. Here is a patch to fix it. Signed-off-by:
-
David S. Miller authored
Vivien Didelot says: ==================== net: dsa: mv88e6xxx: probe compatible This patchset factorizes the legacy and new SMI probing and abstracts the switch register accesses. This simplifies adding support for new chips or alternative register accesses. This will allow us to use a compatible chip info to describe how to access the SMI device and its switch ID register at probe time. For the legacy probe, we fix the compatible info to 88E6085. For the MDIO probe, we will use the compatible info from the device node data. All patches are reviewed. Changes since v4: - fix debug printing (was 'val' instead of '*val') Changes since v3 [3]: - better register access abstraction using the chip structure Changes since v2 [2]: - do not guess compatible model in legacy probe - add low level SMI API using a chip structure - allocate before probe and detection - add 3 cosmetic patches Changes since v1 [1]: - merge style fix from Ben Dooks - add Acked-by/Reviewed-by tags - drop one compatible string per model - detect the SMI device based on the compatible info - add an SMI ops structure [1] https://lkml.org/lkml/2016/6/8/1201 [2] https://lkml.org/lkml/2016/6/14/671 [3] https://lkml.org/lkml/2016/6/17/995 ==================== Signed-off-by:
-
Vivien Didelot authored
When the SMI address of the switch chip is zero, the chip assumes to be the only one on the SMI master bus and thus responds to all its known SMI devices addresses (port registers, Global2, etc.) When its SMI address is not zero, some chips (e.g. 88E6352) use an indirect access through two SMI Command and Data registers. Other models (e.g. 88E6060) using less than 16 internal SMI addresses always use a direct access. Add a capability flag to describe chips supporting the (indirect) Multi-chip Addressing Mode, and a low-level API to access the registers via SMI. Other accesses (like Ethernet management frames) may be added later. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
-
Vivien Didelot authored
The switch ID is located at address 0x3 of every Port Registers bank. But not all Marvell switches have their Port Registers SMI Addresses starting at 0x10. 88E6060 starts at 0x8 and 88E6390 starts at 0x0. Add this data in the info structure and use it in the detection code. Signed-off-by:
-
Vivien Didelot authored
After allocating the chip structure, pass it a compatible info pointer. The compatible info structure will be used later to describe how to access the switch registers and where to read the switch ID. For the standard MDIO probe, get it from the device node data. For the legacy DSA driver probing, pass it the 88E6085 info. Signed-off-by:
-
Vivien Didelot authored
Extract the common detection code which assigns the info structure to the chip given the read switch ID. Signed-off-by:
-
Vivien Didelot authored
Add an helper function to isolate SMI specific assignments and checks. This function will later help choosing the different SMI accesses based of the compatible info. Since the chip structure is already allocated in the legacy probe, use the mv88e6xxx_reg_read access routine instead of __mv88e6xxx_reg_read. Signed-off-by:
-
Vivien Didelot authored
Add an helper function to allocate the chip structure at the beginning of the probe functions. It will be used to initialize the SMI access. Signed-off-by:
-
Vivien Didelot authored
The chip smi_mutex mutex is used to protect the access to the internal switch registers, not only the Multi-chip Addressing Mode, as commented. Since we will isolate SMI-specific pieces of code, avoid the confusion now by renaming smi_mutex to reg_lock. No functional changes here. Signed-off-by:
-
Vivien Didelot authored
The mv88e6xxx_table array and the mv88e6xxx_lookup_info function are static, so remove the table and size arguments from the lookup function. Signed-off-by:
-
Vivien Didelot authored
Use the optional variant to get the reset GPIO line, instead of checking for the -ENOENT error. Signed-off-by:
-
Vivien Didelot authored
The mixed assignments, allocations and registrations in the probe code make it hard to follow the logic and figure out what is DSA or chip specific. Extract the struct dsa_switch related code in a simple mv88e6xxx_register_switch helper function. For symmetry in the code, add a mv88e6xxx_unregister_switch function. Signed-off-by:
-
Vivien Didelot authored
The MDIO device probe and remove functions are respectively incrementing and decrementing the bus refcount themselves. Since these bus level actions are out of the device scope, remove them. Signed-off-by:
-
Vivien Didelot authored
In the MDIO probing function, dev is already assigned to &mdiodev->dev and np is already assigned to mdiodev->dev.of_node, so use them. Signed-off-by:
-
Vivien Didelot authored
The chip->ds and ds->slave_mii_bus assignments are common to both legacy and new MDIO probing and are already done in the later setup code. Remove the duplicated assignments from the MDIO probing code. Signed-off-by:
-
Vivien Didelot authored
This patch fixes 5 style problems reported by checkpatch: WARNING: suspect code indent for conditional statements (8, 24) #492: FILE: drivers/net/dsa/mv88e6xxx.c:492: + if (phydev->link) + reg |= PORT_PCS_CTRL_LINK_UP; CHECK: Logical continuations should be on the previous line #1318: FILE: drivers/net/dsa/mv88e6xxx.c:1318: + oldstate == PORT_CONTROL_STATE_FORWARDING) + && (state == PORT_CONTROL_STATE_DISABLED || CHECK: multiple assignments should be avoided #1662: FILE: drivers/net/dsa/mv88e6xxx.c:1662: + vlan->vid_begin = vlan->vid_end = next.vid; WARNING: line over 80 characters #2097: FILE: drivers/net/dsa/mv88e6xxx.c:2097: + const struct switchdev_obj_port_vlan *vlan, WARNING: suspect code indent for conditional statements (16, 32) #2734: FILE: drivers/net/dsa/mv88e6xxx.c:2734: + if (mv88e6xxx_6352_family(ps) || mv88e6xxx_6351_family(ps) || [...] + reg |= PORT_CONTROL_EGRESS_ADD_TAG; total: 0 errors, 3 warnings, 2 checks, 3805 lines checked It also rebases and integrates changes sent by Ben Dooks [1]: The driver has a number of functions that are not exported or declared elsewhere, so make them static to avoid the following warnings from sparse: drivers/net/dsa/mv88e6xxx.c:113:5: warning: symbol 'mv88e6xxx_reg_read' was not declared. Should it be static? drivers/net/dsa/mv88e6xxx.c:167:5: warning: symbol 'mv88e6xxx_reg_write' was not declared. Should it be static? drivers/net/dsa/mv88e6xxx.c:231:5: warning: symbol 'mv88e6xxx_set_addr' was not declared. Should it be static? drivers/net/dsa/mv88e6xxx.c:367:6: warning: symbol 'mv88e6xxx_ppu_state_init' was not declared. Should it be static? drivers/net/dsa/mv88e6xxx.c:3157:5: warning: symbol 'mv88e6xxx_phy_page_read' was not declared. Should it be static? drivers/net/dsa/mv88e6xxx.c:3169:5: warning: symbol 'mv88e6xxx_phy_page_write' was not declared. Should it be static? drivers/net/dsa/mv88e6xxx.c:3583:26: warning: symbol 'mv88e6xxx_switch_driver' was not declared. Should it be static? drivers/net/dsa/mv88e6xxx.c:3621:5: warning: symbol 'mv88e6xxx_probe' was not declared. Should it be static? [1] http://patchwork.ozlabs.org/patch/632708/ Signed-off-by:
-
- Jun 19, 2016
-
-
Philippe Reynes authored
There are two generics functions phy_ethtool_{get|set}_link_ksettings, so we can use them instead of defining the same code in the driver. Signed-off-by:Philippe Reynes <tremyfr@gmail.com> Reviewed-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
-
Philippe Reynes authored
The private structure contain a pointer to phydev, but the structure net_device already contain such pointer. So we can remove the pointer phydev in the private structure, and update the driver to use the one contained in struct net_device. Signed-off-by:
-
Philippe Reynes authored
There are two generics functions phy_ethtool_{get|set}_link_ksettings, so we can use them instead of defining the same code in the driver. Signed-off-by:Mans Rullgard <mans@mansr.com> Signed-off-by:
-
Philippe Reynes authored
The private structure contain a pointer to phydev, but the structure net_device already contain such pointer. So we can remove the pointer phydev in the private structure, and update the driver to use the one contained in struct net_device. Signed-off-by:
-
David S. Miller authored
Eric Dumazet says: ==================== ipv6: better traceroute support in sit and gre In commit ca15a078 ("sit: generate icmpv6 error when receiving icmpv4 error"), Oussama Ghorbel added minimal support for SIT tunnels to generate ICMPv6 messages when receiving ICMPv4 messages. This patch series extends this to GRE tunnels. It also adds support for ICMPV6_TIME_EXCEED. Partial support for RFC 4884 is added, to forward ICMP Multi-part extensions eventually found in the ICMPv4 message. v2: replaced an overlapping memcpy() by memmove() ==================== Signed-off-by:
-
Eric Dumazet authored
When receiving an ICMPv4 message containing extensions as defined in RFC 4884, and translating it to ICMPv6 at SIT or GRE tunnel, we need some extra manipulation in order to properly forward the extensions. This patch only takes care of Time Exceeded messages as they are the ones that typically carry information from various routers in a fabric during a traceroute session. It also avoids complex skb logic if the data_len is not a multiple of 8. RFC states : The "original datagram" field MUST contain at least 128 octets. If the original datagram did not contain 128 octets, the "original datagram" field MUST be zero padded to 128 octets. In practice routers use 128 bytes of original datagram, not more. Initial translation was added in commit ca15a078 ("sit: generate icmpv6 error when receiving icmpv4 error") Signed-off-by:
Eric Dumazet <edumazet@google.com> Cc: Oussama Ghorbel <ghorbel@pivasoftware.com> Signed-off-by:
-
Eric Dumazet authored
ipgre_err() can call ip6_err_gen_icmpv6_unreach() for proper support of ipv4+gre+icmp+ipv6+... frames, used for example by traceroute/mtr. Signed-off-by:
-
Eric Dumazet authored
For better traceroute/mtr support for SIT and GRE tunnels, we translate IPV4 ICMP ICMP_TIME_EXCEEDED to ICMPV6_TIME_EXCEED We also have to translate the IPv4 source IP address of ICMP message to IPv6 v4mapped. Signed-off-by:
-
Eric Dumazet authored
We want to use this helper from GRE as well, so this is the time to move it in net/ipv6/icmp.c Also add a @nhs parameter, since SIT and GRE have different values for the header(s) to skip. Signed-off-by:
-
Eric Dumazet authored
SIT or GRE tunnels might want to translate an IPV4 address into a v4mapped one when translating ICMP to ICMPv6. This patch adds the parameter to icmp6_send() but does not change icmpv6_send() signature. Signed-off-by:
-
