- Jan 21, 2010
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Tero Kristo authored
Due to OMAP3 erratas 1.157, 1.185 the save of the last pad register (ETK_D14 and ETK_D15) can fail sometimes when there is simultaneous OCP access to the SCM register area. Fixed by writing the last register to the save area. Also, optimized the delay loop for the HW save to include an udelay(1), which limits the number of unnecessary HW accesses to SCM register area during the save. Signed-off-by:
Tero Kristo <tero.kristo@nokia.com> Acked-by:
Nishanth Menon <nm@ti.com> Reviewed-by:
Anand Gadiyar <gadiyar@ti.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
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Roel Kluin authored
val is an u64 pointer, we need an int to check the error. Signed-off-by:
Roel Kluin <roel.kluin@gmail.com> Signed-off-by:
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Peter Ujfalusi authored
Wake-up from McBSP ports are needed, especially when the THRESHOLD dma mode is in use for audio playback. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by:
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Manjunatha GK authored
The PM debug code fails to build on when CONFIG_DEBUG_FS is not enabled. Build error log: arch/arm/mach-omap2/built-in.o: In function `omap_sram_idle': arch/arm/mach-omap2/pm34xx.c:449: undefined reference to `pm_dbg_regset_save' arch/arm/mach-omap2/pm34xx.c:460: undefined reference to `pm_dbg_regset_save' arch/arm/mach-omap2/built-in.o: In function `configure_vc': arch/arm/mach-omap2/pm34xx.c:1237: undefined reference to `pm_dbg_regset_init' arch/arm/mach-omap2/pm34xx.c:1238: undefined reference to `pm_dbg_regset_init' make: *** [.tmp_vmlinux1] Error 1 This patch fixes the above errors. Kernel booting is tested on omap zoom2 and zoom3 boards. Signed-off-by:
Manjunatha GK <manjugk@ti.com> Signed-off-by:
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Sripathy, Vishwanath authored
As part of Core domain context restoration while coming out of off mode there are some registers being restored which are not required to be restored. ROM code will have restored them already. Overwriting some of them can have potential side effect. Eg: CM_CLKEN_PLL register should not be written while dpll is locked. Tested on OMAP 3430 SDP for suspend/resume and off mode with sleep_while_idle enabled. Signed-off-by:
Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by:
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Tero Kristo authored
Current value is stored on SDRAM and it is written back during wakeup. Previously a static value of 0x72 was written there. Signed-off-by:
Thara Gopinath <thara@ti.com> Signed-off-by:
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Tero Kristo authored
Previously used u32 as temporary data storage that wraps around at 4.294s. Signed-off-by:
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Sanjeev Premi authored
This patch removes code blocks that are repeated in function prcm_setup_regs(). Signed-off-by:
Sanjeev Premi <premi@ti.com> Signed-off-by:
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Tero Kristo authored
OMAP interrupt controller goes to unknown state when there is right combination of l3,l4 sleep/wake-up transitions, l4 autoidle in interrupt controller and some interrupt. When this happens, interrupts are not delivered to ARM anymore and ARM will remain in WFI (wait for interrupt) until interrupt controller is forced to wake-up (i.e. lauterbach). Signed-off-by:
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Tero Kristo authored
Enable the auto-idle feature of the SCM block to save some additional power. Signed-off-by:
Mika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by:
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Tero Kristo authored
Suspending drivers may still generate interrupts just before their suspend is completed. Any pending interrupts here will prevent sleep. Signed-off-by:
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- Jan 08, 2010
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Paul Walmsley authored
Dynamically allocate the CPUFreq frequency table on OMAP2xxx chips. This fixes some compilation problems, since the kernel may not know what chip it is running on until boot-time. This also reduces the size of the CPUFreq frequency table. Problem originally reported by Felipe Balbi <felipe.balbi@nokia.com>. Thanks also for comments on the patch from Felipe and Kevin. Signed-off-by:Paul Walmsley <paul@pwsan.com> Cc: Felipe Balbi <felipe.balbi@nokia.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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Paul Walmsley authored
Revise some of the comments in the OMAP2xxx OPP data for clarity. Signed-off-by: -
Felipe Balbi authored
if we enable CPUFREQ we can't build omap2 for two reasons, one of them is fixed by the patch below. It's failing because the __must_be_array() check in ARRAY_SIZE() is failing and printing the following message: arch/arm/mach-omap2/clock2xxx.c:453: error: negative width in bit-field '<anonymous>' Signed-off-by:
Felipe Balbi <felipe.balbi@nokia.com> [paul@pwsan.com: commit message updated; changed rate variable name] Signed-off-by:
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Tuukka Toivonen authored
Add necessary definitions to clock framework to allow changing dpll4_m5_ck rate. This is used by the camera code. Signed-off-by:
Jouni Högander <jouni.hogander@nokia.com> Signed-off-by:
Tuukka Toivonen <tuukka.o.toivonen@nokia.com> Signed-off-by:
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Paul Walmsley authored
The correct parent of the McBSP 2, 3, and 4 functional clocks is PER_96M_FCLK, not CORE_96M_FCLK. Fix this in the OMAP clock tree. Reported by Nicole Chalhoub <n-chalhoub@ti.com>. Signed-off-by: -
Kevin Hilman authored
UART1 & 2 were missing clockdomains resulting in broken omap_hwmod init for these devices. Signed-off-by:
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Paul Walmsley authored
Out of the three major OMAP2 chip types, OMAP2420, OMAP2430, and OMAP3430, we only map the IVA on OMAP2420. The memory mapping is not shared between OMAP2420 and OMAP2430, so it is inappropriate to label those macros as '24XX'; this patch changes them to '2420'. Signed-off-by: -
Abhijit Pagare authored
In OMAP2/3 some of the clock-domains which did not have control facility were being falsely written to and read using the CM_CLKSTCTRL register though it did not exist for them. One check is added to remove this flaw. Signed-off-by:
Abhijit Pagare <abhijitpagare@ti.com> Signed-off-by:
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Huang Weiyi authored
Remove duplicated #include('s) in arch/arm/mach-omap2/clock34xx.c arch/arm/mach-omap2/io.c Signed-off-by:Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by:
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Vaibhav Hiremath authored
Without this the kernel doesn't boot, it craches in omap_mux_package_fixup(), since the package_subset becomes NULL. Signed-off-by:
Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
Otherwise bringing up new boards can be harder: Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = c0004000 [00000000] *pgd=00000000 Internal error: Oops: 5 [#1] last sysfs file: Modules linked in: CPU: 0 Not tainted (2.6.33-rc2-00015-g0bc9c93-dirty #37) PC is at omap_mux_init+0xa4/0x3d8 LR is at omap_mux_init+0x3c/0x3d8 ... Signed-off-by: -
Roel Kluin authored
`!' has a higher precedence than `&' so parentheses are required. Signed-off-by:
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Vimal Singh authored
Keys: 'right arrow', 'up arrow' and 'select' were mapped wrongly. This patch corrects them. This patch also adds one missing key present in the board, currently I added it as 'unknown' key, as I am not able to find proper description for this key. One key entry (r: 7, c: 5) is present in the keymap, which is really not present in the board, removing it. Signed-off-by:
Vimal Singh <vimalsingh@ti.com> Signed-off-by:
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Alexander Shishkin authored
Commit f62349ee makes it possible to have some other than first uart port as ttyS0, which breaks the workaround serial_in_override() function which will try to address the first uart port (for ttyS0) and not the one that was initialized. Signed-off-by:
Alexander Shishkin <virtuoso@slind.org> CC: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Acked-by:
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- Dec 16, 2009
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Mika Westerberg authored
Commit f62349ee had side effect that causes kernel to oops when we are suspending to ram: # echo mem > /sys/power/state WARNING: at kernel/irq/manage.c:858 __free_irq+0x90/0x174() Trying to free already-free IRQ 72 Modules linked in: Backtrace: [<c00328d0>] (dump_backtrace+0x0/0x110) from [<c0347298>] (dump_stack+0x18/0x1c) r7:dfd4be08 r6:c009505c r5:c03fbfd1 r4:0000035a [<c0347280>] (dump_stack+0x0/0x1c) from [<c005a408>] (warn_slowpath_common+0x50/0x68) [<c005a3b8>] (warn_slowpath_common+0x0/0x68) from [<c005a46c>] (warn_slowpath_fmt+0x30) r7:c0474afc r6:00000048 r5:00000000 r4:c0474ac0 [<c005a43c>] (warn_slowpath_fmt+0x0/0x38) from [<c009505c>] (__free_irq+0x90/0x174) r3:00000048 r2:c03fc0ef [<c0094fcc>] (__free_irq+0x0/0x174) from [<c0095184>] (free_irq+0x44/0x64) [<c0095140>] (free_irq+0x0/0x64) from [<c0038100>] (omap_uart_enable_irqs+0x4c/0x90) r7:c034d58c r6:00000003 r5:00000000 r4:c0463028 [<c00380b4>] (omap_uart_enable_irqs+0x0/0x90) from [<c003d8f8>] (omap3_pm_begin+0x1c/0) r5:00000003 r4:00000000 [<c003d8dc>] (omap3_pm_begin+0x0/0x28) from [<c008d008>] (suspend_devices_and_enter+0x) [<c008cfd8>] (suspend_devices_and_enter+0x0/0x1dc) from [<c008d29c>] (enter_state+0xe8) r5:c03f7f46 r4:00000000 [<c008d1b4>] (enter_state+0x0/0x140) from [<c008c8e0>] (state_store+0x9c/0xc4) r7:c034d58c r6:00000003 r5:00000003 r4:c03f7f46 [<c008c844>] (state_store+0x0/0xc4) from [<c01cb2dc>] (kobj_attr_store+0x20/0x24) [<c01cb2bc>] (kobj_attr_store+0x0/0x24) from [<c0119420>] (sysfs_write_file+0x114/0x14) [<c011930c>] (sysfs_write_file+0x0/0x148) from [<c00cb298>] (vfs_write+0xb8/0x164) [<c00cb1e0>] (vfs_write+0x0/0x164) from [<c00cb408>] (sys_write+0x44/0x70) r8:4001f000 r7:00000004 r6:df81bd00 r5:00000000 r4:00000000 [<c00cb3c4>] (sys_write+0x0/0x70) from [<c002f040>] (ret_fast_syscall+0x0/0x38) r8:c002f204 r7:00000004 r6:401fa5e8 r5:4001f000 r4:00000004 This is due the fact that uart_list list was populated in omap_serial_early_init() and omap_uart_enable_irqs() went through this list even when serial idle wasn't enabled for all uarts. This patch moves the code that populates the uart_list and enables uart clocks into omap_serial_init_port(). Signed-off-by:
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Balaji T K authored
Recent drivers/mfd/twl4030* renames to twl broke compile for various boards as the series was missing a patch to change the board-*.c files. This patch renames include twl4030.h to include twl.h and also renames twl4030_i2c_ routines. Signed-off-by:
Balaji T K <balajitk@ti.com> Acked-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by:
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- Dec 15, 2009
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Olof Johansson authored
OMAP34XX has EHCI, so select USB_ARCH_HAS_EHCI. Signed-off-by:
Olof Johansson <olof@lixom.net> Acked-by:
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- Dec 13, 2009
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Santosh Shilimkar authored
The upcoming TWL6030 is companion chip for OMAP4 like the current TWL4030 for OMAP3. The common modules like RTC, Regulator creates opportunity to re-use the most of the code from twl4030. This patch renames few common drivers twl4030* files to twl* to enable the code re-use. Signed-off-by:
Rajendra Nayak <rnayak@ti.com> Signed-off-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by:
Samuel Ortiz <sameo@linux.intel.com>
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Amit Kucheria authored
The power scripts optimisation was mainly done by: Tero Kristo <tero.kristo@nokia.com> and Arnaud Mandy <ext-arnaud.2.mandy@nokia.com> I'm only refactoring and testing it against the mainline kernel. Signed-off-by:
Amit Kucheria <amit.kucheria@verdurent.com> Cc: Tero Kristo <tero.kristo@nokia.com> Cc: linux-omap@vger.kernel.org Acked-by:
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- Dec 12, 2009
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vikram pandita authored
OMAP3xxx and OMAP4430 UART IP blocks have a restriction wrt RX FIFO. Empty RX fifo read causes an abort. OMAP3xxx: UART IP revision >= 0x52 have this issue MVR register format is: Bits Field Name Description Type Reset 31:8 RESERVED RO 0x0 7:4 MAJOR Major revision number of the module. RO 0x-- 3:0 MINOR Minor revision number of the module. RO 0x-- OMAP4xxx: All revisions have this issue Revision id check is not used as the format of MVR resigster has changed For omap4 MVR register reads as: 0x50410602 => Revision id = 0x0602 Format of MVR register on omap4 is: (Courtesy: Cousson, Benoit) Bits Field Name Description Type Reset 31:30 SCHEME Scheme revision number of module RO 0x1 29:28 RESERVED RO 0x1 27:16 FUNC Function revision number of module RO 0x041 15:11 RTL Rtl revision number of module RO 0x00 10:8 MAJOR Major revision number of the module. RO 0x6 7:6 CUSTOM Custom revision number of the module. RO 0x0 5:0 MINOR Minor revision number of the module. RO 0x02 Override the default 8250 read handler: mem_serial_in() by a custom handler: serial_in_8250() which makes sure that RX fifo is not read when empty tested on zoom3(3630) board Cc: Benoit Cousson <b-cousson@ti.com> Signed-off-by:
Vikram Pandita <vikram.pandita@ti.com> Signed-off-by:
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Madhusudhan Chikkature authored
Update the hsmmc zoom peripheral configuration to support: Power saving mode mmc2 8-bit support Configure mmc2 as non removable Signed-off-by:
Madhusudhan Chikkature <madhu.cr@ti.com> Signed-off-by:
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Sergey Lapin authored
The runtime detection of OMAP3515 and OMAP3525 was reversed. Signed-off-by:
Sergey Lapin <slapin@ossfans.org> Signed-off-by:
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Kalle Valo authored
Otherwise Extreme Lower Power (ELP) wakeup doesn't work properly. Signed-off-by:
Kalle Valo <kalle.valo@nokia.com> Signed-off-by:
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Anand Gadiyar authored
omap3: zoom2/3: make MMC slot work again Commit 12f8dfb56 accidentally broke MMC on zoom2/3. The .vmmc1 field of zoom_twldata was deleted. Restoring it allows the MMC slot to work again Signed-off-by:
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Mika Westerberg authored
This patch adds new function: omap_serial_init_port(port) that can be used to initialize only selected UARTs as serial ports. Platforms can then in their board files call this function instead of omap_serial_init() if they don't want to use all UARTs as serial ports. Signed-off-by:
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Mike Rapoport authored
CM-T35 can be assembled with different set of peripherals thus making certain interfaces available to user as GPIOs or dedicated pins. Because of it CM-T35 bootloader sets up mux configuration only for pins necessary to boot the system and the rest of the mux configuration is done by the kernel. Besides, having mux configuration in the kernel allows to minimize dependancy on bootloader. Signed-off-by:
Mike Rapoport <mike@compulab.co.il> Signed-off-by:
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Santosh Shilimkar authored
The secondary cores wakes up in time so the wait loop is not necessary anymore. Signed-off-by:
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Santosh Shilimkar authored
The AuxCoreBoot0 and AuxCoreBoot1 can be only accessed in secure mode. Replace the current code with secure monitor API's to access/modify these registers. Signed-off-by:
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Santosh Shilimkar authored
This patch fixes the OMAP4430 cpu detection. The IC rev detection is done with hawkeye and rev. Note that rev does not map directly to defined processor revision numbers as ES1.0 uses value 0.It also fixes the SCM base address to read the correct ID_CODE register. Also the cpu_is_omap44xx() and cpu_is_omap443x() correctly populated instead of always being true Signed-off-by:
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