- Jul 20, 2007
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Jeremy Kerr authored
In 6cbf93960e64f313f6e247cbca7afaa50e3ee2c we added a WARN_ON for calling spu_deactivate on contexts created with the SPU_CREATE_NOSCHED flag. However, all NOSCHED contexts will need to be deactivated when the context is destroyed, so this gives a spurious warning when any NOSCHED context is closed. This change removes the WARN_ON. Signed-off-by:
Jeremy Kerr <jk@ozlabs.org> Signed-off-by:
Arnd Bergmann <arnd.bergmann@de.ibm.com>
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Jeremy Kerr authored
Reading from the signal{1,2} files requires a spu_acquire_saved, so make these files write-only for contexts created with SPU_CREATE_NOSCHED. Signed-off-by: -
Kazunori Asayama authored
The current SPU context saving procedure in SPUFS unexpectedly restarts MFC when halting decrementer, because MFC_CNTL[Dh] is set without MFC_CNTL[Sm]. This bug causes, for example, saving broken DMA queues. Here is a patch to fix the problem. Signed-off-by:
Kazunori Asayama <asayama@sm.sony.co.jp> Signed-off-by:
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Sebastian Siewior authored
WARNING: arch/powerpc/platforms/cell/spufs/spufs.o(.init.text+0x158): Section mismatch: reference to .exit.text:.spu_sched_exit (between '.init_module' and '.spu_sched_init') was introduced by c99c1994 This patch removes the warning. Cc: Christoph Hellwig <hch@lst.de> Signed-off-by:
Sebastian Siewior <sebastian@breakpoint.cc> Signed-off-by:
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Michael Ellerman authored
This patch adds support for the setup and decoding of MSIs on Axon-based Cell systems, using the MSIC mechanism. This involves setting up an area of BE memory which the Axon then uses as a FIFO for MSI messages. When one or more MSIs are decoded by the MSIC we receive an interrupt on the MPIC, and the MSI messages are written into the FIFO. At the moment we use a 64KB FIFO, one per MSIC/BE. Signed-off-by:
Michael Ellerman <michael@ellerman.id.au> Signed-off-by:
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Andre Detsch authored
This patch adds support for investigating spus information after a kernel crash event, through kdump vmcore file. Implementation is based on xmon code, but the new functionality was kept independent from xmon. Signed-off-by:
Lucio Jose Herculano Correia <luciojhc@br.ibm.com> Signed-off-by:
Andre Detsch <adetsch@br.ibm.com> Signed-off-by:
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Maxim Shchetynin authored
The Axon bridge chip used on new Cell/B.E. based blade servers comes with a DDR2 memory controller that can be used to attach cheap memory modules, as opposed to the high-speed XDR memory that is used by the CPU itself. Since the memory controller does not participate in the cache coherency protocol, we can not use the memory direcly for Linux applications, but by providing a block device it can be used for swap space, temporary file storage and through the use of the direct_access block device operation for mapping into user addresses, when it is mounted with an appropriate file system. Signed-off-by:
Maxim Shchetynin <maxim@de.ibm.com> Signed-off-by:
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Jean-Christophe DUBOIS authored
The platforms missing the "cpus" property in the "be" node are mono-Cell platforms such as CAB or Getaway. Therefore it is possible to assume that if there is no "cpus" properties under the "be" node then we can safely return the "device node" without more checking. This is a bit hacky but ... it allows it to work on these platforms. Signed-off-by:
Jean-Christophe DUBOIS <jcd@tribudubois.net> Acked-by:
Christian Krafft <krafft@de.ibm.com> Signed-off-by:
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Jean-Christophe DUBOIS authored
Previous patch changed based on Christian Krafft's comment. On some legacy SLOF tree the generic code is unable to ioremap some Cell BE registers. Therefore the "generic" functions are returning a NULL pointer, triggering a crash on such platforms. Let's handle this more gracefully. Signed-off-by:
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Jean-Christophe DUBOIS authored
Previous patch changed based on Christian Krafft's comment. On some legacy SLOF tree the generic code is unable to ioremap some Cell BE registers. Therefore the "generic" functions are returning a NULL pointer, triggering a crash on such platforms. Let's handle this more gracefully. Signed-off-by:
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Christian Krafft authored
This patch reorganizes the code of the driver into three files. Two cbe_cpufreq_pmi.c and cbe_cpufreq_pervasive.c care about hardware. cbe_cpufreq.c contains the logic. There is no changed behaviour, except that the PMI related function is now located in a seperate module cbe_cpufreq_pmi. This module will be required by cbe_cpufreq, if CONFIG_CBE_CPUFREQ_PMI has been set. Signed-off-by:
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Christian Krafft authored
Minor issues have been fixed: * added a missing call to of_node_put() * signedness of a function parameter * added some line breaks * changed global pmi_frequency_limit to a per node pmi_slow_mode_limit array Signed-off-by:
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Christian Krafft authored
This patch fixes the initialization of the cbe_cpufreq driver. The code that initializes the PMI related functions was called per cpu: * registering cpufreq notifier block * registering a pmi handler This ends in a bug that the notifier block gets called in an endless loop. The initialization code is being put to the module init code path by this patch. This way it only gets called once. Signed-off-by:
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Christian Krafft authored
This patch fixes the debug code that calculates the transition time when changing the slow modes on a Cell BE cpu. Signed-off-by:
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Christian Krafft authored
The pmi driver got simplified by removing support for multiple devices. As there is no more than one pmi device per maschine, there is no need to specify the device for listening and sending messages. This way the caller (cbe_cpufreq) doesn't need to scan the device tree. When registering the handler on a board without a pmi interface, pmi.c will just return -ENODEV. The patch that fixed the breakage of cell_defconfig has been broken out of the earlier version of this patch. So this is the version that applies cleanly on top of it. Signed-off-by:
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Nicholas Piggin authored
Update arm to use bitwise types for its VM_FAULT_ constants. Signed-off-by:
Nick Piggin <npiggin@suse.de> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Greg Ungerer authored
Reformat show_cpuinfo() to be consistent with normal coding style (and rest of this file). Signed-off-by:
Greg Ungerer <gerg@uclinux.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
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Adrian Bunk authored
Every file should include the headers containing the prototypes for its global functions. Signed-off-by:
Adrian Bunk <bunk@stusta.de> Acked-by:
Jeremy Fitzhardinge <jeremy@goop.org> Signed-off-by:
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Roland McGrath authored
One of the nice ideas behind paravirt is that CONFIG_XEN=y can be included in a standard configuration and be no worse for native booting than as a Xen guest. The glibc feature that supports the vDSO "nosegneg" note is designed specifically to make this easy. You just have to flip one bit at boot time. This patch makes Xen flip the bit, so a CONFIG_XEN=y kernel on bare hardware does not make glibc use the less-optimized library builds. Signed-off-by:
Roland McGrath <roland@redhat.com> Acked-by:
Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by:
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Al Viro authored
anything that wants working dma-mapping won't work parport_pc won't work on m68k unless we have ISA Signed-off-by:
Al Viro <viro@zeniv.linux.org.uk> Signed-off-by:
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Al Viro authored
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Al Viro authored
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Al Viro authored
i.e. tell modpost that entry point code (that has to be outside of .init.text for external reasons) is OK to refer to .init.* Signed-off-by:
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Al Viro authored
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Magnus Damm authored
This patch converts the cpu specific 7750 setup code to use the new intc controller. Many new vectors are added and multiple processor variants including 7091, 7750, 7750s, 7750r, 7751 and 7751r should all have the correct vectors hooked up. IRLM interrupts can be enabled using ipr_irq_enable_irlm() which now is marked as __init. Signed-off-by:
Magnus Damm <damm@igel.co.jp> Signed-off-by:
Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
sh64_get_page() wraps in to regular allocators as well as the bootmem allocator for fetching pages, it carefully checks to see which one it can use depending on the system state, so the access is safe. Signed-off-by: -
Paul Mundt authored
Follow the sh and m68k changes to silence the modpost warnings. Signed-off-by: -
Paul Mundt authored
Follow Al Viro's m68k change from l-k: i.e. tell modpost that entry point code (that has to be outside of .init.text for external reasons) is OK to refer to .init.* Shuts up some section mismatch warnings from modpost. Signed-off-by: -
Paul Mundt authored
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Magnus Damm authored
This patch updates the r2d board support in a few ways: - CPU_SUBTYPE_SH7751R is selected in the defconfig to play well with the r2d board Kconfig entry. Without this the defconfig results in no board enabled. - Enable EARLY_PRINTK. - Enable SH_STANDARD_BIOS - this works well for early printk on the r2d board. - Add "earlyprink=bios" to the cmdline for early serial port output by default. - CONFIG_SUBTYPE_SH7751R support is added to the sh-specific pci makefile. Signed-off-by:
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Paul Mundt authored
allmodconfig generates a lot of interesting code, a lot of the generated symbols we've never exported before, so this fixes those up. Verified with both GCC3 and GCC4 toolchains. Signed-off-by: -
Magnus Damm authored
struct plat_serial8250_port should contain a terminating zero entry Signed-off-by:
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Paul Mundt authored
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Paul Mundt authored
Currently this has a prompt to allow users to change it. There's no reason to do this, and it has caused breakage and confusion in the past, so remove it entirely. We'll get rid of this when the whole driver is tidied for the driver model. Signed-off-by: -
Paul Mundt authored
We only handle SH-3 and SH-4 at present, don't expose it to the other CPUs. Signed-off-by: -
David S. Miller authored
We try to fetch the CIF entry pointer from %o4, but that can get clobbered by the early OBP calls. It is saved in %l7 already, so actually this "mov %o4, %l7" can just be completely removed with no other changes. Signed-off-by:David S. Miller <davem@davemloft.net>
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Paul Mundt authored
This gets the SH cpufreq working again. We follow the changes in the AVR32 implementation for wrapping in to the clock framework. CPUs that wish to use this are required to define rate rounding primitives in order to satisfy clk_round_rate(). This works well enough for the common case, though we should look at unifying this driver across all of the platforms that implement clock framework support in one capacity or another. Signed-off-by: -
David S. Miller authored
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Paul Mundt authored
Now that the round_rate() op is supported, hook it up on SH7722 for the FRQCR (CPU, PCLK, etc.) clocks. Signed-off-by: -
Paul Mundt authored
This is an optional component of the clock framework. However, as we're going to be using this in the cpufreq drivers, add support for it to the framework. Signed-off-by:
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