Commits · ec0f8d3fbb7ea12cfd10083e340381b96e7c34f8 · jan.koester / Linux · GitLab

Nov 24, 2014
- MIPS: Loongson: Allow booting from any core · ec0f8d3f
  Huacai Chen authored Nov 04, 2014
  ec0f8d3f
- MIPS: Loongson-3: Add PHYS48_TO_HT40 support · f490682a
  Huacai Chen authored Nov 04, 2014
  f490682a
- MIPS: R3000: Remove redundant parentheses · 432d9ecb
  Isamu Mogi authored Oct 30, 2014
  432d9ecb
- MIPS: R3000: Replace magic numbers with macros · 80e8bd26
  Isamu Mogi authored Oct 30, 2014
  80e8bd26
- MIPS: Remove __strlen_user(). · 4ff3fccd
  Ralf Baechle authored Nov 04, 2014
  4ff3fccd
- MIPS: BCM47XX: Initialize bcma bus later (with mm available) · e5810fa0
  Rafał Miłecki authored Oct 28, 2014
  e5810fa0
- MIPS: BCM47XX: Move SPROM fallback code into sprom.c · a59da8fb
  Rafał Miłecki authored Oct 28, 2014
  a59da8fb
- MIPS: BCM47XX: Make bcma init NVRAM instead of bcm47xx polling it · 7177efc5
  Rafał Miłecki authored Oct 28, 2014
  7177efc5
- MIPS: BCM47XX: Make ssb init NVRAM instead of bcm47xx polling it · 21400f25
  Rafał Miłecki authored Sep 03, 2014
  21400f25
- MIPS: BCM47XX: Get rid of calls to KSEG1ADDR · 8d602dd0
  Rafał Miłecki authored Sep 03, 2014
  8d602dd0
- MIPS: Move gic.h to include/linux/irqchip/mips-gic.h · 4060bbe9
  Andrew Bresticker authored Oct 20, 2014
  4060bbe9
- irqchip: mips-gic: Use proper iomem accessors · 5f68fea0
  Andrew Bresticker authored Oct 20, 2014
  5f68fea0
- MIPS: Malta: Stop using GIC REG macros · 609ead04
  Andrew Bresticker authored Oct 20, 2014
  609ead04
- MIPS: SEAD3: Stop using GIC REG macros · 327b8c89
  Andrew Bresticker authored Oct 20, 2014
  327b8c89
- irqchip: mips-gic: Export function to read counter width · 387904ff
  Andrew Bresticker authored Oct 20, 2014
  387904ff
- MIPS: Malta: Use gic_read_count() to read GIC timer · 7d9ad5d8
  Andrew Bresticker authored Oct 20, 2014
  7d9ad5d8
- MIPS: SEAD3: Use generic plat_irq_dispatch · a393d930
  Andrew Bresticker authored Sep 18, 2014
  a393d930
- MIPS: Malta: Use generic plat_irq_dispatch · 4203d644
  Andrew Bresticker authored Sep 18, 2014
  4203d644
- irqchip: mips-gic: Remove unnecessary globals · 3263d085
  Andrew Bresticker authored Sep 18, 2014
  3263d085
- irqchip: mips-gic: Support local interrupts · e9de688d
  Andrew Bresticker authored Sep 18, 2014
  e9de688d
- irqchip: mips-gic: Use separate edge/level irq_chips · 4a6a3ea3
  Andrew Bresticker authored Sep 18, 2014
  4a6a3ea3
- irqchip: mips-gic: Probe for number of external interrupts · fbd55241
  Andrew Bresticker authored Sep 18, 2014
  fbd55241
- irqchip: mips-gic: Stop using per-platform mapping tables · 18743d27
  Andrew Bresticker authored Sep 18, 2014
  18743d27
- irqchip: mips-gic: Use IRQ domains · c49581a4
  Andrew Bresticker authored Sep 18, 2014
  c49581a4
- irqchip: mips-gic: Fix gic_set_affinity() return value · 14d160ab
  Andrew Bresticker authored Sep 18, 2014
  14d160ab
- irqchip: mips-gic: Implement irq_set_type callback · 95150ae8
  Andrew Bresticker authored Sep 18, 2014
  95150ae8
- irqchip: mips-gic: Remove platform irq_ack/irq_eoi callbacks · 5561c9e4
  Andrew Bresticker authored Sep 18, 2014
  5561c9e4
- MIPS: Move GIC to drivers/irqchip/ · 8a19b8f1
  Andrew Bresticker authored Sep 18, 2014
  8a19b8f1
- MIPS: Move MIPS_GIC_IRQ_BASE into platform irq.h · 8635233c
  Andrew Bresticker authored Sep 18, 2014
  8635233c
- MIPS: Malta: Move MSC01 interrupt base · aa827b74
  Andrew Bresticker authored Sep 18, 2014
  aa827b74
- MIPS: sead3: Do not overlap CPU/GIC IRQ ranges · dfc94d1b
  Andrew Bresticker authored Sep 18, 2014
  dfc94d1b
- MIPS: SEAD3: Remove sead3-serial.c · d8725fdd
  Andrew Bresticker authored Sep 18, 2014
  d8725fdd
- MIPS: Remove gic_{enable,disable}_interrupt() · a67b3cf1
  Andrew Bresticker authored Sep 18, 2014
  a67b3cf1
- MIPS: smp-cps: Enable all hardware interrupts on secondary CPUs · ff1e29ad
  Andrew Bresticker authored Sep 18, 2014
  ff1e29ad
- MIPS: Add hook to get C0 performance counter interrupt · a669efc4
  Andrew Bresticker authored Sep 18, 2014
  a669efc4
- MIPS: i8259: Use IRQ domains · 079a4601
  Andrew Bresticker authored Sep 18, 2014
  079a4601
- MIPS: Set vint handler when mapping CPU interrupts · f64e55dc
  Andrew Bresticker authored Sep 18, 2014
  f64e55dc
- MIPS: Provide a generic plat_irq_dispatch · 85f7cdac
  Andrew Bresticker authored Sep 18, 2014
  85f7cdac
- MIPS: Rename mips_cpu_intc_init() -> mips_cpu_irq_of_init() · afe8dc25
  Andrew Bresticker authored Sep 18, 2014
  afe8dc25
- MIPS: Always use IRQ domains for CPU IRQs · 0f84c305
  Andrew Bresticker authored Sep 18, 2014
  0f84c305