- Feb 25, 2011
-
-
Paul Walmsley authored
Attempt to enable autoidle for as many clocks as possible in the OMAP2+-common CONFIG_OMAP_RESET_CLOCKS code. Currently, this only enables DPLL autoidle for OMAP3/4 DPLLs; but future patches will enable autoidle for other clocks and the OMAP2 DPLL/APLLs. In the long run, we should probably get rid of CONFIG_OMAP_RESET_CLOCKS, and unconditionally run the code that it selects. Otherwise, the state of the clock tree won't match the hardware state - this could result in clocks being enabled or disabled unpredictably. Based on a patch by Rajendra Nayak <rnayak@ti.com> that did this in the pm34xx.c/pm44xx.c code. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
-
Rajendra Nayak authored
Define the following architecture specific funtions for omap2/3/4 .clkdm_allow_idle .clkdm_deny_idle Convert the platform-independent framework to call these functions. Also rename the api's by removing the omap2_ preamble. Hence call omap2_clkdm_allow_idle as clkdm_allow_idle and omap2_clkdm_deny_idle as clkdm_deny_idle. Make the _clkdm_add_autodeps and _clkdm_del_autodeps as non-static so they can be accessed from OMAP2/3 platform specific code. Signed-off-by:
Rajendra Nayak <rnayak@ti.com> Signed-off-by:
Paul Walmsley <paul@pwsan.com>
-
Rajendra Nayak authored
Define the following architecture specific funtions for omap2/3/4 .clkdm_sleep .clkdm_wakeup Convert the platform-independent framework to call these functions. Also rename the api's by removing the omap2_ preamble. Hence call omap2_clkdm_wakeup as clkdm_wakeup and omap2_clkdm_sleep as clkdm_sleep. Signed-off-by:
Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: fixed omap3_clkdm_clear_all_sleepdeps() and omap2_clkdm_clear_all_wkdeps() to test against the correct loop termination condition; thanks to Kevin Hilman for finding and helping fix] Cc: Kevin Hilman <khilman@ti.com> Signed-off-by:
Paul Walmsley <paul@pwsan.com>
-
- Jan 26, 2011
-
-
Kevin Hilman authored
Currently, on HS/EMU devices, MPU power state forced to on during PM init by the save secure RAM code. Rather than forcing the state of MPU powerdomain to on, simply read the current value and restore it after the ROM code has run. This only affects the !CPUidle case since when CPUidle is enabled, the MPU power state is dynamically changed by CPUidle. In the !CPUidle case, MPU power state is initialized once at init and never touched. Acked-by:
Tero Kristo <tero.kristo@nokia.com> Signed-off-by:
Kevin Hilman <khilman@ti.com>
-
Torben Hohn authored
The -rt patches change the console_semaphore to console_mutex. As a result, a quite large chunk of the patches changes all acquire/release_console_sem() to acquire/release_console_mutex() This commit makes things use more neutral function names which dont make implications about the underlying lock. The only real change is the return value of console_trylock which is inverted from try_acquire_console_sem() This patch also paves the way to switching console_sem from a semaphore to a mutex. [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: make console_trylock return 1 on success, per Geert] Signed-off-by:
Torben Hohn <torbenh@gmx.de> Cc: Thomas Gleixner <tglx@tglx.de> Cc: Greg KH <gregkh@suse.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
-
- Dec 22, 2010
-
-
Paul Walmsley authored
Move the padconf save code from pm34xx.c to the System Control Module code in mach-omap2/control.c. This is part of the general push to move direct register access from middle-layer core code to low-level core code, so the middle-layer code can be abstracted to work on multiple platforms and cleaned up. In the medium-to-long term, this code should be called by the mux layer code, not the PM idle code. This is because, according to the TRM, saving the padconf only needs to be done when the padconf changes[1]. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Tested-by:
Rajendra Nayak <rnayak@ti.com> Tested-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> 1. OMAP34xx Multimedia Device Silicon Revision 3.1.x [Rev. ZH] [SWPU222H] Section 4.11.4 "Device Off-Mode Sequences"
-
Paul Walmsley authored
The OMAP powerdomain code and data is all OMAP2+-specific. This seems unlikely to change any time soon. Move plat-omap/include/plat/powerdomain.h to mach-omap2/powerdomain.h. The primary point of doing this is to remove the temptation for unrelated upper-layer code to access powerdomain code and data directly. As part of this process, remove the references to powerdomain data from the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap. Change the DSPBridge code to point to the new location for the powerdomain headers. The DSPBridge code should not be including the powerdomain headers; these should be removed. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com>
-
Paul Walmsley authored
The OMAP clockdomain code and data is all OMAP2+-specific. This seems unlikely to change any time soon. Move plat-omap/include/plat/clockdomain.h to mach-omap2/clockdomain.h. The primary point of doing this is to remove the temptation for unrelated upper-layer code to access clockdomain code and data directly. DSPBridge also uses the clockdomain headers for some reason, so, modify it also. The DSPBridge code should not be including the clockdomain headers; these should be removed. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com> Tested-by:
Rajendra Nayak <rnayak@ti.com> Tested-by:
Santosh Shilimkar <santosh.shilimkar@ti.com>
-
Paul Walmsley authored
Now that OMAP4-specific PRCM functions have been added, distinguish the existing OMAP2/3-specific PRCM functions by prefixing them with "omap2_". This patch should not result in any functional change. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Jarkko Nikula <jhnikula@gmail.com> Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Tested-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by:
Rajendra Nayak <rnayak@ti.com>
-
Paul Walmsley authored
The OMAP3 PRM module is in the WKUP powerdomain, which is always powered when the chip is powered, so it shouldn't be necessary to save and restore those PRM registers. Remove the PRM register save/restore code, which should save several microseconds during off-mode entry/exit, since PRM register accesses are relatively slow. While doing so, move the CM register save/restore code into CM-specific code. The CM module has been distinct from the PRM module since 2430. This patch includes some minor changes to pm34xx.c. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <tero.kristo@nokia.com> Cc: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Reviewed-by:
Kevin Hilman <khilman@deeprootsystems.com> Tested-by:
Kevin Hilman <khilman@deeprootsystems.com> Tested-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by:
Rajendra Nayak <rnayak@ti.com>
-
Paul Walmsley authored
In preparation for adding OMAP4-specific PRCM accessor/mutator functions, split the existing OMAP2/3 PRCM code into OMAP2/3-specific files. Most of what was in mach-omap2/{cm,prm}.{c,h} has now been moved into mach-omap2/{cm,prm}2xxx_3xxx.{c,h}, since it was OMAP2xxx/3xxx-specific. This process also requires the #includes in each of these files to be changed to reference the new file name. As part of doing so, add some comments into plat-omap/sram.c and plat-omap/mcbsp.c, which use "sideways includes", to indicate that these users of the PRM/CM includes should not be doing so. Thanks to Felipe Contreras <felipe.contreras@gmail.com> for comments on this patch. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Jarkko Nikula <jhnikula@gmail.com> Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com> Cc: Liam Girdwood <lrg@slimlogic.co.uk> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Acked-by:
Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Acked-by:
Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com> Acked-by:
Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by:
Kevin Hilman <khilman@deeprootsystems.com> Tested-by:
Kevin Hilman <khilman@deeprootsystems.com> Tested-by:
Rajendra Nayak <rnayak@ti.com> Tested-by:
Santosh Shilimkar <santosh.shilimkar@ti.com>
-
- Dec 21, 2010
-
-
Jean Pihet authored
Errata covered: - 1.157 & 1.185 - i443 - i581 Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Signed-off-by:
Jean Pihet <j-pihet@ti.com> Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
Eduardo Valentin authored
Limitation i583: Self_Refresh Exit issue after OFF mode Issue: When device is waking up from OFF mode, then SDRC state machine sends inappropriate sequence violating JEDEC standards. Impact: OMAP3630 < ES1.2 is impacted as follows depending on the platform: CS0: for 38.4MHz as internal sysclk, DDR content seen to be stable, while for all other sysclk frequencies, varied levels of instability seen based on varied parameters. CS1: impacted This patch takes option #3 as recommended by the Silicon erratum: Avoid core power domain transitioning to OFF mode. Power consumption impact is expected in this case. To do this, we route core OFF requests to RET request on the impacted revisions of silicon. Acked-by:
Jean Pihet <j-pihet@ti.com> [nm@ti.com: rebased the code to 2.6.37-rc2- short circuit code changed a bit] Signed-off-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
Nishanth Menon authored
Currently omap3_cpuidle_update_states makes whole sale decision on which C states to update based on enable_off_mode variable Instead, achieve the same functionality by independently providing mpu and core deepest states the system is allowed to achieve and update the idle states accordingly. Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by:
Jean Pihet <j-pihet@ti.com> Signed-off-by:
Nishanth Menon <nm@ti.com> [khilman: fixed additional user of this API in OMAP CPUidle driver] Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
Peter 'p2' De Schrijver authored
While coming out of MPU OSWR/OFF states, L2 controller is reseted. The reset behavior is implementation specific as per ARMv7 TRM and hence $L2 needs to be invalidated before it's use. Since the AUXCTRL register is also reconfigured, disable L2 cache before invalidating it and re-enables it afterwards. This is as per Cortex-A8 ARM documentation. Currently this is identified as being needed on OMAP3630 as the disable/enable is done from "public side" while, on OMAP3430, this is done in the "secure side". Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by:
Jean Pihet <j-pihet@ti.com> Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> [nm@ti.com: ported to 2.6.37-rc2, added hooks to enable the logic only on 3630] Signed-off-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by:
Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
Nishanth Menon authored
Erratum id: i608 RTA (Retention Till Access) feature is not supported and leads to device stability issues when enabled. This impacts modules with embedded memories on OMAP3630 Workaround is to disable RTA on boot and coming out of core off. For disabling RTA coming out of off mode, we do this by overriding the restore pointer for 3630 as the first point of entry before caches are touched and is common for GP and HS devices. To disable earlier than this could be possible by modifying the PPA for HS devices, but not for GP devices. Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by:
Jean Pihet <j-pihet@ti.com> Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> [ambresh@ti.com: co-developer] Signed-off-by:
Ambresh K <ambresh@ti.com> Signed-off-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
Nishanth Menon authored
Introduce errata handling for OMAP3. This patch introduces errata variable and stub for initialization which will be filled up by follow-on patches. Signed-off-by:
Nishanth Menon <nm@ti.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
Jean Pihet authored
Some bad interaction between the idle and the suspend paths has been identified: the idle code is called during the suspend enter and exit sequences. This could cause corruption or lock-up of resources. The solution is to move the calls to disable_hlt at the very beginning of the suspend sequence (ex. in omap3_pm_begin instead of omap3_pm_prepare), and the call to enable_hlt at the very end of the suspend sequence (ex. in omap3_pm_end instead of omap3_pm_finish). Tested with RET and OFF on Beagle and OMAP3EVM. Signed-off-by:
Jean Pihet <j-pihet@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
- Dec 10, 2010
-
-
Kevin Hilman authored
commit 0d8e2d0d (OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled) added use of the console semaphore to protect UARTs from being accessed after disabled during idle, but this causes problems in suspend. During suspend, the console semaphore is acquired by the console suspend method (console_suspend()) so the try_acquire_console_sem() will always fail and suspend will be aborted. To fix, introduce a check so the console semaphore is only attempted during idle, and not during suspend. Also use the same check so that the console semaphore is not prematurely released during resume. Thanks to Paul Walmsley for suggesting adding the same check during resume. Cc: Paul Walmsley <paul@pwsan.com> Tested-by:
Jean Pihet <j-pihet@ti.com> Tested-by:
Paul Walmsley <paul@pwsan.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
-
- Nov 25, 2010
-
-
Paul Walmsley authored
The console semaphore must be held while the OMAP UART devices are disabled, lest a console write cause an ARM abort (and a kernel crash) when the underlying console device is inaccessible. These crashes only occur when the console is on one of the OMAP internal serial ports. While this problem has been latent in the PM idle loop for some time, the crash was not triggerable with an unmodified kernel until commit 6f251e9d ("OMAP: UART: omap_device conversions, remove implicit 8520 assumptions"). After this patch, a console write often occurs after the console UART has been disabled in the idle loop, crashing the system. Several users have encountered this bug: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html The same commit also introduced new code that disabled the UARTs during init, in omap_serial_init_port(). The kernel will also crash in this code when earlyconsole and extra debugging is enabled: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html The minimal fix for the -rc series is to hold the console semaphore while the OMAP UARTs are disabled. This is a somewhat overbroad fix, since the console may not be located on an OMAP UART, as is the case with the GPMC UART on Zoom3. While it is technically possible to determine which devices the console or earlyconsole is actually running on, it is not a trivial problem to solve, and the code to do so is not really appropriate for the -rc series. The right long-term fix is to ensure that no code outside of the OMAP serial driver can disable an OMAP UART. As I understand it, code to implement this is under development by TI. This patch is a collaboration between Paul Walmsley <paul@pwsan.com> and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei <tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their feedback on earlier versions of this patch. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Signed-off-by:
Tony Lindgren <tony@atomide.com> Acked-by:
Kevin Hilman <khilman@deeprootsystems.com> Cc: Ming Lei <tom.leiming@gmail.com> Cc: Pramod <pramod.gurav@ti.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Jean Pihet <jean.pihet@newoldbits.com> Cc: Govindraj.R <govindraj.raja@ti.com>
-
- Nov 16, 2010
-
-
Lionel Debroux authored
While at it, fix two checkpatch errors. Several non-const struct instances constified by this patch were added after the introduction of platform_suspend_ops in checkpatch.pl's list of "should be const" structs (79404849). Patch against mainline. Inspired by hunks of the grsecurity patch, updated for newer kernels. Signed-off-by:
Lionel Debroux <lionel_debroux@yahoo.fr> Acked-by:
Ingo Molnar <mingo@elte.hu> Signed-off-by:
Jiri Kosina <jkosina@suse.cz>
-
- Oct 11, 2010
-
-
Kevin Hilman authored
Commit 914bab936fe0388a529079679e2f137aa4ff548d (OMAP: mach-omap2: Fix incorrect assignment warnings) changed a pointer from 'u32 *' to 'void *' without also fixing up the pointer arithmetic. Fix the scratchpad offsets so they are byte offsets instead of word offsets and thus work correctly with a void pointer base. Special thanks to Jean Pihet for taking the time track down this problem and propose an initial solution. Tested with off-idle and off-suspend on 36xx/Zoom3 and 34xx/omap3evm. Cc: Manjunath Kondaiah G <manjugk@ti.com> Reported-by:
Jean Pihet <jean.pihet@newoldbits.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com> Tested-by:
Jean Pihet <jean.pihet@newoldbits.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
-
- Oct 08, 2010
-
-
Paul Walmsley authored
Only OMAP2+ platforms have the System Control Module (SCM) IP block. In the past, we've kept the SCM header file in plat-omap. This has led to abuse - device drivers including it; includes being added that create implicit dependencies on OMAP2+ builds; etc. In response, move the SCM headers into mach-omap2/. As part of this, remove the direct SCM access from the OMAP UDC driver. It was clearly broken. The UDC code needs an indepth review for use on OMAP2+ chips. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Cory Maccarrone <darkstar6262@gmail.com> Cc: Kyungmin Park <kyungmin.park@samsung.com>
-
Manjunath Kondaiah G authored
This patch fixes below sparse warnings for incorrect assignments. arch/arm/mach-omap2/control.c:195:16: warning: incorrect type in assignment (different address spaces) arch/arm/mach-omap2/control.c:195:16: expected unsigned int [usertype] *v_addr arch/arm/mach-omap2/control.c:195:16: got void [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:199:25: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/control.c:199:25: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:199:25: got unsigned int [usertype] * arch/arm/mach-omap2/control.c:320:28: warning: incorrect type in assignment (different address spaces) arch/arm/mach-omap2/control.c:320:28: expected void *[noderef] <asn:2>scratchpad_address arch/arm/mach-omap2/control.c:320:28: got void [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:321:9: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/control.c:321:9: expected void volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:321:9: got void *[noderef] <asn:2>scratchpad_address arch/arm/mach-omap2/control.c:324:9: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/control.c:324:9: expected void volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:324:9: got void * arch/arm/mach-omap2/control.c:327:9: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/control.c:327:9: expected void volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:327:9: got void * arch/arm/mach-omap2/control.c:334:9: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/control.c:334:9: expected void volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/control.c:334:9: got void * arch/arm/mach-omap2/control.c:321:9: warning: dereference of noderef expression arch/arm/mach-omap2/control.c:324:9: warning: dereference of noderef expression arch/arm/mach-omap2/control.c:327:9: warning: dereference of noderef expression arch/arm/mach-omap2/control.c:334:9: warning: dereference of noderef expression arch/arm/mach-omap2/pm34xx.c:323:28: warning: incorrect type in assignment (different address spaces) arch/arm/mach-omap2/pm34xx.c:323:28: expected unsigned int [usertype] *scratchpad_address arch/arm/mach-omap2/pm34xx.c:323:28: got void [noderef] <asn:2>*<noident> arch/arm/mach-omap2/pm34xx.c:326:26: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/pm34xx.c:326:26: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/pm34xx.c:326:26: got unsigned int [usertype] * arch/arm/mach-omap2/pm34xx.c:329:26: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/pm34xx.c:329:26: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/pm34xx.c:329:26: got unsigned int [usertype] * arch/arm/mach-omap2/pm34xx.c:334:29: warning: incorrect type in argument 1 (different address spaces) arch/arm/mach-omap2/pm34xx.c:334:29: expected void const volatile [noderef] <asn:2>*<noident> arch/arm/mach-omap2/pm34xx.c:334:29: got unsigned int [usertype] * Signed-off-by:
Manjunath Kondaiah G <manjugk@ti.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Nishanth Menon <nm@ti.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
-
- Sep 29, 2010
-
-
Govindraj.R authored
Add prepare idle and resume idle call for uart4 used by 3630. Signed-off-by:
Govindraj.R <govindraj.raja@ti.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
Govindraj.R authored
To standarize among other uarts (1 to 3), we shall now: - Enable uart4 autodile bit. - Enable uart4 wakeup in PER. - Allow uart4 to wakeup the MPU. Signed-off-by:
Sergio Aguirre <saaguirre@ti.com> Signed-off-by:
Govindraj.R <govindraj.raja@ti.com> Acked-by:
Paul Walmsley <paul@pwsan.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
- Sep 24, 2010
-
-
Paul Walmsley authored
When the clockdomain layer initializes, place all clockdomains into software-supervised mode, and clear all wakeup and sleep dependencies immediately, rather than waiting for the PM code to do this later. This fixes a major bug where critical sleep dependencies added by the hwmod code are cleared during late PM init. As a side benefit, the _init_{wk,sleep}dep_usecount() functions are no longer needed, so remove them. Kevin Hilman <khilman@deeprootsystems.com> did all the really hard work on this, identifying the problem and finding the bug. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
Santosh Shilimkar authored
The set_pwrdm_state() is needed on omap4 as well so move this routine to common pm.c file so that it's available for omap3/4 Signed-off-by:
Rajendra Nayak <rnayak@ti.com> Signed-off-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
Santosh Shilimkar authored
This patch moves omap2_pm_wakeup_on_timer() and pm debug entries form pm34xx.c to pm-debug.c and export it, so that it is available to other OMAPs Signed-off-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
Kevin Hilman authored
In an effort to simplify the core idle path, move any device-specific special case handling from the core PM idle path into the CPUidle pre-idle checking path. This keeps the core, interrupts-disabled idle path streamlined and independent of any device-specific handling, and also allows CPUidle to do the checking only for certain C-states as needed. This patch has the device checks in place for all states with the CHECK_BM flag, namely all states >= C2. This patch was inspired by a similar patch written by Tero Kristo as part of a larger series to add INACTIVE state support. NOTE: This is a baby-step towards decoupling device idle (or system idle) from CPU idle. Eventually, CPUidle should only manage the CPU, and device/system idle should be managed elsewhere. Cc: Tero Kristo <tero.kristo@nokia.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
- Sep 21, 2010
-
-
Thara Gopinath authored
This patch removes omap3 hardcodings from pm-debug.c so that enabling PM debugfs support does break compilation for other OMAP's. This is a preparatory patch for supporting OMAP4 pm entries through PM debugfs. Signed-off-by:
Thara Gopinath <thara@ti.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
Kevin Hilman authored
Cleanup indentation around IO wakeup enable, the '\' terminator is not required in C when wrapping an expression past end-of-line. Whitespace change only. Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
- Aug 16, 2010
-
-
Kevin Hilman authored
Commit 5a5f561e (convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixes) mistakenly removed the check for PER when disabling the IO chain. During idle, if the PER powerdomain transitions into a lower state and CORE does not, the IO pad wakeups are not being disabled in the idle path after they are enabled. This can happen with the lower C-states when using CPUidle for example. This patch ensures that the check for disabling IO wakeups also checks for PER transitions, matching the check done to enable IO wakeups. Found when debugging PM/CPUidle related problems reported by Ameya Palande <ameya.palande@nokia.com>. Problems were triggered particularily on boards with UART2 consoles (n900, Overo) since UART2 is in the PER powerdomain. Tested on l-o master (omap3_defonfig + CONFIG_CPU_IDLE=y) as well as with current PM branch. Boards tested: n900, Overo, omap3evm. Cc: Paul Walmsley <paul@pwsan.com> Cc: Ameya Palande <ameya.palande@nokia.com> Tested-by:
Jarkko Nikula <jhnikula@gmail.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com> [tony@atomide.com: updated description to clarify the transistion] Signed-off-by:
Tony Lindgren <tony@atomide.com>
-
- Aug 02, 2010
-
-
stanley.miao authored
AM3505/3517 doesn't have IO wakeup capability, so we do not need to set the bit OMAP3430_EN_IO and the bit OMAP3430_EN_IO_CHAIN in the register PM_WKEN_WKUP when the system enters suspend state. Tested on AM3517EVM and OMAP3530EVM. Signed-off-by:
Stanley.Miao <stanley.miao@windriver.com> Acked-by:
Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
-
- Jun 10, 2010
-
-
Kevin Hilman authored
Checking to se if the IO daisy chain is enabled should be checking the PM_WKEN register, not the PM_WKST register. Reading PM_WKST tells us if an event occurred, not whether or not it is enabled. Apparently, we've been lucky until now in that a pending event has not been there during enable. However, on 3630/Zoom3, I noticed because of the WARN that this timeout was always happening. Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by:
Tony Lindgren <tony@atomide.com>
-
- May 20, 2010
-
-
Paul Walmsley authored
Writes to the PM_*GRPSEL registers should use _GRPSEL_ macros, not _EN_ macros, to match the TRM and guard against inadvertent error. This patch should not cause any functional change. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Jouni Högander <jouni.hogander@nokia.com>
-
Paul Walmsley authored
Fix all of the remaining PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
-
Paul Walmsley authored
Fix all of the remaining OMAP3 PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by:
Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
-
- May 12, 2010
-
-
Kevin Hilman authored
Currently, the GPIO 'prepare' hook is only called when going to off-mode, while the function is called 'prepare_for_retention.' This patch renames the function to 'prepare_for_idle' and calls it for any powersate != PWRDM_POWER_ON passing in the powerstate. The hook itself is then responsible for doing various preparation based on the powerstate. Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-
Tero Kristo authored
Off mode is now using the omap2 retention fix code for scanning GPIOs during off-mode transitions. All the *non_wakeup_gpios variables are now used for off-mode transition tracking on OMAP3. This patch fixes cases where GPIO state changes are missed during off-mode. Signed-off-by:
Tero Kristo <tero.kristo@nokia.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
-