Commits · f6a430d8ee8dba13807b75845478a1920187840b · jan.koester / Linux · GitLab

Jul 06, 2015
- drm/i915/opregion: add new opregion stuff · f6a430d8
  Jani Nikula authored Jul 02, 2015
  f6a430d8
- drm/i915/opregion: use BUILD_BUG_ON to verify mailbox struct sizes · 2d80391d
  Jani Nikula authored Jul 02, 2015
  2d80391d
- drm/i915/hotplug: document the hotplug handling in the driver · 856974a4
  Jani Nikula authored Jul 02, 2015
  856974a4
- drm/i915/audio: clarify HD audio documentation wrt modeset · 3e6da4a9
  Jani Nikula authored Jul 02, 2015
  3e6da4a9
- drm/i915: set FDI translations to NULL on SKL · c30400fc
  Paulo Zanoni authored Jul 03, 2015
  c30400fc
- drm/i915: Expose I915_EXEC_RESOURCE_STREAMER flag and getparam · a9ed33ca
  Abdiel Janulgue authored Jul 01, 2015
  a9ed33ca
- drm/i915: Enable resource streamer on Execlists · 6922528a
  Abdiel Janulgue authored Jun 16, 2015
  6922528a
- drm/i915: Enable Resource Streamer state save/restore on MI_SET_CONTEXT · 4c436d55
  Abdiel Janulgue authored Jun 16, 2015
  4c436d55
- drm/i915: Enable resource streamer bits on MI_BATCH_BUFFER_START · 919032ec
  Abdiel Janulgue authored Jun 16, 2015
  919032ec
- drm/i915/bxt: BUNs related to port PLL · e6292556
  Vandana Kannan authored Jul 01, 2015
  e6292556
- Revert "drm/i915: Disable 12bpc hdmi for now" · 7a0baa62
  Ville Syrjälä authored Jun 30, 2015
  7a0baa62
- drm/i915: Account for CHV/BXT DPLL clock limitations · e64e739e
  Ville Syrjälä authored Jun 30, 2015
  e64e739e
- drm/i915: Bump HDMI min port clock to 25 MHz · 6fd765d0
  Ville Syrjälä authored Jun 30, 2015
  6fd765d0
- drm/i915: Fix HDMI 12bpc and pixel repeat clock readout for DDI platforms · 398a017e
  Ville Syrjälä authored Jun 30, 2015
  398a017e
- GPU-DRM: Delete an unnecessary check before drm_property_unreference_blob() · ec530829
  Markus Elfring authored Jul 05, 2015
  ec530829
Jul 03, 2015
- drm/i915: Update DRIVER_DATE to 20150703 · a3d1d001
  Daniel Vetter authored Jul 03, 2015
  a3d1d001
- drm/i915/gtt: Per ppgtt scratch page · 8776f02b
  Mika Kuoppala authored Jun 30, 2015
  8776f02b
- drm/i915: Changes required to enable DSI Video Mode on CHT · 20dbe1a1
  Gaurav K Singh authored Jul 01, 2015
  20dbe1a1
- drm/i915: Support for higher DSI clk · 3c5c6d88
  Gaurav K Singh authored Jul 01, 2015
  3c5c6d88
- drm/i915/dsi: abstract dsi bpp derivation from pixel format · 260c1ad1
  Jani Nikula authored Jul 01, 2015
  260c1ad1
- drm/i915: don't increment the FBC threshold at fbc_enable · ce65e47b
  Paulo Zanoni authored Jun 30, 2015
  ce65e47b
- drm/i915: Report correct GGTT space usage · ca1543be
  Tvrtko Ursulin authored Jul 01, 2015
  ca1543be
- drm/i915/gtt: Return struct i915_scratch_page from alloc_scratch · 4ad2af1e
  Mika Kuoppala authored Jun 30, 2015
  4ad2af1e
- drm/i915/gtt: Reorder page alloc/free/init functions · 2e906bea
  Mika Kuoppala authored Jun 30, 2015
  2e906bea
- drm/i915: Reserve space improvements · 79bbcc29
  John Harrison authored Jun 30, 2015
  79bbcc29
- drm/i915/bxt: mask off the DPLL state checker bits we don't program · 793dfa59
  Imre Deak authored Jun 18, 2015
  793dfa59
Jun 30, 2015
- drm/i915/bxt: add DDI port HW readout support · aa610dcb
  Imre Deak authored Jun 22, 2015
  aa610dcb
- drm/i915: calculate the port clock rate along with other PLL params · dccbea3b
  Imre Deak authored Jun 22, 2015
  dccbea3b
- drm/i915/vlv: move the vlv PLL helper next to its platform counterparts · 589eca67
  Imre Deak authored Jun 22, 2015
  589eca67
- drm/i915/bxt: add PLL10 to the PLL state dumper · c8453338
  Imre Deak authored Jun 18, 2015
  c8453338
- drm/i915/bxt: add missing DDI PLL registers to the state checking · 05712c15
  Imre Deak authored Jun 18, 2015
  05712c15
- drm/i915/skl: Buffer translation improvements · f8896f5d
  David Weinehall authored Jun 25, 2015
  f8896f5d
Jun 29, 2015
- drm/i915: Zero unused WM1 watermarks on VLV/CHV · 2cb389b7
  Ville Syrjälä authored Jun 24, 2015
  2cb389b7
- drm/i915: Add debugfs knobs for VLVCHV memory latency values · de38b95c
  Ville Syrjälä authored Jun 24, 2015
  de38b95c
- drm/i915: Don't do PM5/DDR DVFS with multiple pipes · 6f9c784b
  Ville Syrjälä authored Jun 24, 2015
  6f9c784b
- drm/i915: Try to make sure cxsr is disabled around plane enable/disable · 852eb00d
  Ville Syrjälä authored Jun 24, 2015
  852eb00d
- drm/i915: Use the memory latency based WM computation on VLV too · 26e1fe4f
  Ville Syrjälä authored Jun 24, 2015
  26e1fe4f
- drm/i915: Compute display FIFO split dynamically for CHV · 54f1b6e1
  Ville Syrjälä authored Jun 24, 2015
  54f1b6e1
- drm/i915: CHV DDR DVFS support and another watermark rewrite · 262cd2e1
  Ville Syrjälä authored Jun 24, 2015
  262cd2e1
- drm/i915: Read wm values from hardware at init on CHV · 6eb1a681
  Ville Syrjälä authored Jun 24, 2015
  6eb1a681