Commits · fdda6ee947cd4faf8d0d5bc4d9888f896358355d · jan.koester / Linux · GitLab

Aug 31, 2017
- clk: imx: constify clk_div_table · fdda6ee9
  Arvind Yadav authored Aug 28, 2017
  fdda6ee9
- clk: uniphier: add ethernet clock control support · 9959989f
  Kunihiko Hayashi authored Aug 28, 2017
  9959989f
- clk: gemini: hands off PCI OE bit · 2839b1ef
  Linus Walleij authored Aug 08, 2017
  2839b1ef
- clk: ux500: prcc: constify clk_ops. · 56d87776
  Arvind Yadav authored Aug 28, 2017
  56d87776
- clk: ux500: sysctrl: constify clk_ops. · ca2ea4b0
  Arvind Yadav authored Aug 28, 2017
  ca2ea4b0
- clk: ux500: prcmu: constify clk_ops. · df4f45a0
  Arvind Yadav authored Aug 28, 2017
  df4f45a0
Aug 23, 2017
- clk: msm8996-gcc: add missing smmu clks · 69a6beab
  Srinivas Kandagatla authored Aug 14, 2017
  69a6beab
- clk: tegra: Fix Tegra210 PLLU initialization · 7157c69a
  Alex Frid authored Jul 25, 2017
  7157c69a
- clk: tegra: Correct Tegra210 UTMIPLL poweron delay · 71422dbb
  Alex Frid authored Jul 25, 2017
  71422dbb
- clk: tegra: Fix T210 PLLRE registration · 2f924ac3
  Alex Frid authored Jul 25, 2017
  2f924ac3
- clk: tegra: Update T210 PLLSS (D2/DP) registration · f7bdb8b7
  Alex Frid authored Jul 25, 2017
  f7bdb8b7
- clk: tegra: Re-factor T210 PLLX registration · ac99afe5
  Alex Frid authored Jul 25, 2017
  ac99afe5
- clk: tegra: don't warn for pll_d2 defaults unnecessarily · 1934ffd0
  Peter De Schrijver authored Jul 25, 2017
  1934ffd0
- clk: tegra: change post IDDQ release delay to 5us · 3dd065e7
  Peter De Schrijver authored Jul 25, 2017
  3dd065e7
- clk: tegra: Add TEGRA_PERIPH_ON_APB flag to I2C · 82c875ca
  Alex Frid authored Jul 25, 2017
  82c875ca
- clk: tegra: Fix T210 effective NDIV calculation · a851ea2b
  Alex Frid authored Jul 25, 2017
  a851ea2b
- clk: tegra: Init cfg structure in _get_pll_mnp · bc7b34a2
  Peter De Schrijver authored Jul 25, 2017
  bc7b34a2
- clk: tegra210: remove non-existing VFIR clock · e34e69cc
  Peter De Schrijver authored Jul 25, 2017
  e34e69cc
- clk: tegra: disable SSC for PLL_D2 · 030999fe
  Peter De Schrijver authored Jul 25, 2017
  030999fe
- clk: tegra: Enable PLL_SS for Tegra210 · 04434cfa
  Peter De Schrijver authored Jul 25, 2017
  04434cfa
- clk: tegra: fix SS control on PLL enable/disable · 1a7da877
  Peter De Schrijver authored Jul 25, 2017
  1a7da877
- clk: qcom: msm8916: Fix bimc gpu clock ops · de224554
  Georgi Djakov authored Aug 18, 2017
  de224554
- clk: ti: make clk_ops const · 7cc566a8
  Bhumika Goyal authored Aug 22, 2017
  7cc566a8
- Merge tag 'clk-renesas-for-v4.14-tag1' of... · 535b1100
  Stephen Boyd authored Aug 23, 2017
  535b1100
- clk: rockchip: Mark rockchip_fractional_approximation static · 1dfcfa72
  Stephen Boyd authored Aug 23, 2017
  1dfcfa72
- Merge tag 'v4.14-rockchip-clk1' of... · cf657bb9
  Stephen Boyd authored Aug 23, 2017
  cf657bb9
- Merge tag 'sunxi-clk-for-4.14-2' of... · 1fea70bc
  Stephen Boyd authored Aug 23, 2017
  1fea70bc
- Merge tag 'clk-v4.14-samsung' of... · 4d64556b
  Stephen Boyd authored Aug 23, 2017
  4d64556b
- Merge tag 'meson-clk-for-4.14' of git://github.com/baylibre/clk-meson into clk-next · 3477a72b
  Stephen Boyd authored Aug 23, 2017
  3477a72b
Aug 22, 2017
- clk: rockchip: fix the rv1108 clk_mac sel register description · 64a1644b
  Elaine Zhang authored Aug 21, 2017
  64a1644b
- clk: rockchip: rename rv1108 macphy clock to mac · c7d0045b
  Elaine Zhang authored Aug 21, 2017
  c7d0045b
- clk: rockchip: add rv1108 ACLK_GMAC and PCLK_GMAC clocks · 10054272
  Elaine Zhang authored Aug 21, 2017
  10054272
- clk: rockchip: add rk3228 SCLK_SDIO_SRC clk id · fe53230c
  Elaine Zhang authored Aug 18, 2017
  fe53230c
Aug 21, 2017
- Merge branch 'v4.14-shared/clkids' into v4.14-clk/next · 358efd52
  Heiko Stuebner authored Aug 22, 2017
  
  358efd52
- clk: rockchip: add rv1108 ACLK_GAMC and PCLK_GMAC ID · 1858698e
  Elaine Zhang authored Aug 21, 2017
  1858698e
- clk: rockchip: add rk3228 sclk_sdio_src ID · 9762e7ff
  Elaine Zhang authored Aug 18, 2017
  9762e7ff
Aug 19, 2017
- clk: sunxi-ng: support R40 SoC · cd030a78
  Icenowy Zheng authored Aug 15, 2017
  cd030a78
- dt-bindings: add compatible string for Allwinner R40 CCU · 0a634155
  Icenowy Zheng authored May 27, 2017
  0a634155
Aug 17, 2017
- clk: renesas: r8a7796: Add USB3.0 clock · c29f8295
  Hiromitsu Yamasaki authored Jul 26, 2017
  c29f8295
- clk: renesas: rcar-usb2-clock-sel: Add R-Car USB 2.0 clock selector PHY · 311accb6
  Yoshihiro Shimoda authored Jul 25, 2017
  311accb6