Commit 029eae23 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branches 'clk-legacy', 'clk-vc5', 'clk-allwinner', 'clk-nvidia' and 'clk-imx' into clk-next 

* clk-legacy:
  clkdev: remove unused clkdev_alloc() interfaces
  clkdev: remove CONFIG_CLKDEV_LOOKUP
  m68k: coldfire: remove private clk_get/clk_put
  m68k: coldfire: use clkdev_lookup on most coldfire
  mips: ralink: convert to CONFIG_COMMON_CLK
  mips: ar7: convert to CONFIG_COMMON_CLK
  mips: ar7: convert to clkdev_lookup

* clk-vc5:
  clk: vc5: fix output disabling when enabling a FOD

* clk-allwinner:
  clk: sunxi-ng: v3s: fix incorrect postdivider on pll-audio

* clk-nvidia:
  clk: tegra: clk-tegra124-dfll-fcpu: don't use devm functions for regulator
  clk: tegra: tegra124-emc: Fix clock imbalance in emc_set_timing()
  clk: tegra: Add stubs needed for compile-testing
  clk: tegra: Don't deassert reset on enabling clocks
  clk: tegra: Mark external clocks as not having reset control
  clk: tegra: cclk: Handle thermal DIV2 CPU frequency throttling
  clk: tegra: Don't allow zero clock rate for PLLs
  clk: tegra: Halve SCLK rate on Tegra20
  clk: tegra: Ensure that PLLU configuration is applied properly
  clk: tegra: Fix refcounting of gate clocks
  clk: tegra30: Use 300MHz for video decoder by default

* clk-imx:
  clk: imx8mq: remove SYS PLL 1/2 clock gates
  clk: imx: scu: Do not enable runtime PM for CPU clks
  clk: imx: scu: add parent save and restore
  clk: imx: scu: Only save DC SS clock using non-cached clock rate
  clk: imx: scu: Add A72 frequency scaling support
  clk: imx: scu: Add A53 frequency scaling support
  clk: imx: scu: bypass pi_pll enable status restore
  clk: imx: scu: detach pd if can't power up
  clk: imx: scu: bypass cpu clock save and restore
  clk: imx: scu: add parallel port clock ops
  clk: imx: scu: add more scu clocks
  clk: imx: scu: add enet rgmii gpr clocks
  clk: imx8qm: add clock valid resource checking
  clk: imx8qxp: add clock valid checking mechnism
  clk: imx: scu: add gpr clocks support
  clk: imx: scu: remove legacy scu clock binding support
  dt-bindings: arm: imx: scu: drop deprecated legacy clock binding
  dt-bindings: arm: imx: scu: fix naming typo of clk compatible string
  clk: imx: Remove the audio ipg clock from imx8mp
parents d915611e 4c5519fa fc336ae6 ee7fe687 2f0d67bf 8e5f17e6

Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt

+4 −6
Original line number Diff line number Diff line
@@ -86,13 +86,11 @@ This binding uses the common clock binding[1]. 


Required properties:

- compatible:		Should be one of:

			  "fsl,imx8qm-clock"

			  "fsl,imx8qxp-clock"

			  "fsl,imx8qm-clk"

			  "fsl,imx8qxp-clk"

			followed by "fsl,scu-clk"

- #clock-cells:		Should be either

			2: Contains the Resource and Clock ID value.

			or

			1: Contains the Clock ID value. (DEPRECATED)

- #clock-cells:		Should be 2.

			Contains the Resource and Clock ID value.

- clocks:		List of clock specifiers, must contain an entry for

			each required entry in clock-names

- clock-names:		Should include entries "xtal_32KHz", "xtal_24MHz"

arch/arm/Kconfig

+0 −2
Original line number Diff line number Diff line
@@ -353,7 +353,6 @@ config ARCH_EP93XX 
	select ARM_VIC

	select GENERIC_IRQ_MULTI_HANDLER

	select AUTO_ZRELADDR

	select CLKDEV_LOOKUP

	select CLKSRC_MMIO

	select CPU_ARM920T

	select GPIOLIB
@@ -504,7 +503,6 @@ config ARCH_OMAP1 
	bool "TI OMAP1"

	depends on MMU

	select ARCH_OMAP

	select CLKDEV_LOOKUP

	select CLKSRC_MMIO

	select GENERIC_IRQ_CHIP

	select GENERIC_IRQ_MULTI_HANDLER

arch/m68k/coldfire/clk.c

+0 −21
Original line number Diff line number Diff line
@@ -73,20 +73,6 @@ struct clk_ops clk_ops1 = { 
#endif /* MCFPM_PPMCR1 */

#endif /* MCFPM_PPMCR0 */



struct clk *clk_get(struct device *dev, const char *id)

{

	const char *clk_name = dev ? dev_name(dev) : id ? id : NULL;

	struct clk *clk;

	unsigned i;



	for (i = 0; (clk = mcf_clks[i]) != NULL; ++i)

		if (!strcmp(clk->name, clk_name))

			return clk;

	pr_warn("clk_get: didn't find clock %s\n", clk_name);

	return ERR_PTR(-ENOENT);

}

EXPORT_SYMBOL(clk_get);



int clk_enable(struct clk *clk)

{

	unsigned long flags;
@@ -117,13 +103,6 @@ void clk_disable(struct clk *clk) 
}

EXPORT_SYMBOL(clk_disable);



void clk_put(struct clk *clk)

{

	if (clk->enabled != 0)

		pr_warn("clk_put %s still enabled\n", clk->name);

}

EXPORT_SYMBOL(clk_put);



unsigned long clk_get_rate(struct clk *clk)

{

	if (!clk)

arch/m68k/coldfire/m5206.c

+11 −14
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 


/***************************************************************************/



#include <linux/clkdev.h>

#include <linux/kernel.h>

#include <linux/param.h>

#include <linux/init.h>
@@ -23,21 +24,15 @@ 


DEFINE_CLK(pll, "pll.0", MCF_CLK);

DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);

DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);

DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);

DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);

DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);

DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK);



struct clk *mcf_clks[] = {

	&clk_pll,

	&clk_sys,

	&clk_mcftmr0,

	&clk_mcftmr1,

	&clk_mcfuart0,

	&clk_mcfuart1,

	&clk_mcfi2c0,

	NULL

static struct clk_lookup m5206_clk_lookup[] = {

	CLKDEV_INIT(NULL, "pll.0", &clk_pll),

	CLKDEV_INIT(NULL, "sys.0", &clk_sys),

	CLKDEV_INIT("mcftmr.0", NULL, &clk_sys),

	CLKDEV_INIT("mcftmr.1", NULL, &clk_sys),

	CLKDEV_INIT("mcfuart.0", NULL, &clk_sys),

	CLKDEV_INIT("mcfuart.1", NULL, &clk_sys),

	CLKDEV_INIT("imx1-i2c.0", NULL, &clk_sys),

};



/***************************************************************************/
@@ -66,6 +61,8 @@ void __init config_BSP(char *commandp, int size) 
	mcf_mapirq2imr(28, MCFINTC_EINT4);

	mcf_mapirq2imr(31, MCFINTC_EINT7);

	m5206_i2c_init();



	clkdev_add_table(m5206_clk_lookup, ARRAY_SIZE(m5206_clk_lookup));

}



/***************************************************************************/

arch/m68k/coldfire/m520x.c

+26 −25
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 


/***************************************************************************/



#include <linux/clkdev.h>

#include <linux/kernel.h>

#include <linux/param.h>

#include <linux/init.h>
@@ -48,31 +49,29 @@ DEFINE_CLK(0, "sys.0", 40, MCF_BUSCLK); 
DEFINE_CLK(0, "gpio.0", 41, MCF_BUSCLK);

DEFINE_CLK(0, "sdram.0", 42, MCF_CLK);



struct clk *mcf_clks[] = {

	&__clk_0_2, /* flexbus */

	&__clk_0_12, /* fec.0 */

	&__clk_0_17, /* edma */

	&__clk_0_18, /* intc.0 */

	&__clk_0_21, /* iack.0 */

	&__clk_0_22, /* imx1-i2c.0 */

	&__clk_0_23, /* mcfqspi.0 */

	&__clk_0_24, /* mcfuart.0 */

	&__clk_0_25, /* mcfuart.1 */

	&__clk_0_26, /* mcfuart.2 */

	&__clk_0_28, /* mcftmr.0 */

	&__clk_0_29, /* mcftmr.1 */

	&__clk_0_30, /* mcftmr.2 */

	&__clk_0_31, /* mcftmr.3 */



	&__clk_0_32, /* mcfpit.0 */

	&__clk_0_33, /* mcfpit.1 */

	&__clk_0_34, /* mcfeport.0 */

	&__clk_0_35, /* mcfwdt.0 */

	&__clk_0_36, /* pll.0 */

	&__clk_0_40, /* sys.0 */

	&__clk_0_41, /* gpio.0 */

	&__clk_0_42, /* sdram.0 */

	NULL,

static struct clk_lookup m520x_clk_lookup[] = {

	CLKDEV_INIT(NULL, "flexbus", &__clk_0_2),

	CLKDEV_INIT("fec.0", NULL, &__clk_0_12),

	CLKDEV_INIT("edma", NULL, &__clk_0_17),

	CLKDEV_INIT("intc.0", NULL, &__clk_0_18),

	CLKDEV_INIT("iack.0", NULL, &__clk_0_21),

	CLKDEV_INIT("imx1-i2c.0", NULL, &__clk_0_22),

	CLKDEV_INIT("mcfqspi.0", NULL, &__clk_0_23),

	CLKDEV_INIT("mcfuart.0", NULL, &__clk_0_24),

	CLKDEV_INIT("mcfuart.1", NULL, &__clk_0_25),

	CLKDEV_INIT("mcfuart.2", NULL, &__clk_0_26),

	CLKDEV_INIT("mcftmr.0", NULL, &__clk_0_28),

	CLKDEV_INIT("mcftmr.1", NULL, &__clk_0_29),

	CLKDEV_INIT("mcftmr.2", NULL, &__clk_0_30),

	CLKDEV_INIT("mcftmr.3", NULL, &__clk_0_31),

	CLKDEV_INIT("mcfpit.0", NULL, &__clk_0_32),

	CLKDEV_INIT("mcfpit.1", NULL, &__clk_0_33),

	CLKDEV_INIT("mcfeport.0", NULL, &__clk_0_34),

	CLKDEV_INIT("mcfwdt.0", NULL, &__clk_0_35),

	CLKDEV_INIT(NULL, "pll.0", &__clk_0_36),

	CLKDEV_INIT(NULL, "sys.0", &__clk_0_40),

	CLKDEV_INIT("gpio.0", NULL, &__clk_0_41),

	CLKDEV_INIT("sdram.0", NULL, &__clk_0_42),

};



static struct clk * const enable_clks[] __initconst = {
@@ -115,6 +114,8 @@ static void __init m520x_clk_init(void) 
	/* make sure these clocks are disabled */

	for (i = 0; i < ARRAY_SIZE(disable_clks); ++i)

		__clk_init_disabled(disable_clks[i]);



	clkdev_add_table(m520x_clk_lookup, ARRAY_SIZE(m520x_clk_lookup));

}



/***************************************************************************/