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Commit 556f3c9a authored by Like Xu's avatar Like Xu Committed by Paolo Bonzini
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KVM: x86/pmu: Limit the maximum number of supported AMD GP counters



The AMD PerfMonV2 specification allows for a maximum of 16 GP counters,
but currently only 6 pairs of MSRs are accepted by KVM.

While AMD64_NUM_COUNTERS_CORE is already equal to 6, increasing without
adjusting msrs_to_save_all[] could result in out-of-bounds accesses.
Therefore introduce a macro (named KVM_AMD_PMC_MAX_GENERIC) to
refer to the number of counters supported by KVM.

Signed-off-by: default avatarLike Xu <likexu@tencent.com>
Reviewed-by: default avatarJim Mattson <jmattson@google.com>
Message-Id: <20220919091008.60695-3-likexu@tencent.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 4f1fa2a1
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