Commits · 4c1b3d0803aef6d39913f1e9d2cfe2c1ccce18e8 · jan.koester / Linux · GitLab

Jun 03, 2022
- drm/amdgpu: delete duplicate condition in gfx_v11_0_soft_reset() · 4c1b3d08
  Dan Carpenter authored May 30, 2022
  4c1b3d08
- drm/amdgpu/swsmu: use new register offsets for smu_cmn.c · 7a09f61f
  Alex Deucher authored May 26, 2022
  7a09f61f
- drm/amd/display: change dsc image width cap for dcn32 and dcn321 · 3378aed7
  Dillon Varone authored Apr 11, 2022
  3378aed7
- drm/amdgpu/swsmu: add SMU mailbox registers in SMU context · da1db031
  Alex Deucher authored May 26, 2022
  da1db031
- drm/amd/display: Disable DTB Ref Clock Switching in dcn32 · 2267a195
  Dillon Varone authored Apr 13, 2022
  2267a195
- drm/amdgpu/gmc11: enable AGP aperture · 2cfe34e1
  Alex Deucher authored May 26, 2022
  2cfe34e1
- drm/amdgpu: convert nbio_v2_3_clear_doorbell_interrupt() to IP version · ac1ac694
  Alex Deucher authored May 24, 2022
  ac1ac694
- drm/amd/display: set dram speed for all states · be772433
  Dillon Varone authored Apr 18, 2022
  be772433
- drm/amdgpu: simplify the logic in amdgpu_device_parse_gpu_info_fw() · 1d6c3633
  Alex Deucher authored May 24, 2022
  1d6c3633
- drm/amdgpu: convert sienna_cichlid_populate_umd_state_clk() to use IP version · 9d6b2041
  Alex Deucher authored May 24, 2022
  9d6b2041
- drm/amd/display: Halve DTB Clock Value for DCN32 · 2388a778
  Fangzhi Zuo authored Apr 19, 2022
  2388a778
- drm/amd/display: Add additional guard for FCLK pstate message for DCN321 · 3ccb9ea9
  Dillon Varone authored Apr 14, 2022
  3ccb9ea9
- drm/amdgpu: fix sdma doorbell issue on SDMA v6.0 and NBIO v7.7 · 72b5f23c
  Xiaojian Du authored May 20, 2022
  72b5f23c
- drm/amdgpu: add CSDMA reg offsets for NBIO v7.7.0 · cb12d72b
  Xiaojian Du authored May 20, 2022
  cb12d72b
- drm/amdgpu: add apu sequence in the imu v11 · 80d46fff
  Huang Rui authored May 18, 2022
  80d46fff
- drm/amdgpu/pm: implement the SMU_MSG_EnableGfxImu function · 7101ab97
  Huang Rui authored May 18, 2022
  7101ab97
- drm/amdgpu/pm: update MP v13_0_4 smu message register marco · 8763e4c1
  Huang Rui authored May 17, 2022
  8763e4c1
- drm/amdgpu: add mmhub v3_0_1 ip block · 10c4ad3a
  Huang Rui authored May 12, 2022
  10c4ad3a
- drm/amdgpu: add mmhub v3_0_1 headers · d5771670
  Huang Rui authored May 12, 2022
  d5771670
- drm/amdgpu: use the callback function for reset status polling on IMU · 16600b7d
  Huang Rui authored May 20, 2022
  16600b7d
- drm/amd/display: Ensure that DMCUB fw in use is loaded by DC and not VBIOS · 9fe5d08f
  Dillon Varone authored Apr 14, 2022
  9fe5d08f
- drm/amd/display: use updated clock source init routine · 218987fd
  Charlene Liu authored Apr 05, 2022
  218987fd
- drm/amd/display: Select correct DTO source · 1908a07c
  Dillon Varone authored Apr 01, 2022
  1908a07c
- drm/amdgpu: print umc correctable error address · cbd3e844
  Stanley.Yang authored May 20, 2022
  cbd3e844
- drm/amd/display: disable idle optimizations · 6a640b95
  Aurabindo Pillai authored Mar 24, 2022
  6a640b95
- drm/amd/display: add missing interrupt handlers for DCN32/DCN321 · b3f2c796
  Aurabindo Pillai authored Mar 24, 2022
  b3f2c796
- drm/amd/display: Implement WM table transfer for DCN32/DCN321 · e06c5f59
  Alvin Lee authored Mar 14, 2022
  e06c5f59
- drm/amd/display: Various DML fixes to enable higher timings · 97618432
  Dillon Varone authored Mar 08, 2022
  97618432
- drm/amd/display: Add guard for FCLK pstate message to PMFW for DCN321 · a839a73b
  Dillon Varone authored Mar 08, 2022
  a839a73b
- drm/amdgpu: introduce two work mode for imu · 542a0f2e
  Huang Rui authored May 20, 2022
  542a0f2e
- drm/amd/display: Use DTBCLK for valid pixel clock · 2cb6915d
  Eric Bernstein authored Mar 03, 2022
  2cb6915d
- drm/amd/display: Add missing instance for clock source register · 3dc35cf8
  Alvin Lee authored Feb 28, 2022
  3dc35cf8
- drm/amd/display: Fix USBC link creation · e42ce136
  Dillon Varone authored Mar 01, 2022
  e42ce136
- drm/amd: Add GFX11 modifiers support to AMDGPU (v3) · 543036a2
  Aurabindo Pillai authored Feb 21, 2022
  543036a2
- drm/amd/amdgpu: align the cg and pg settings · 49401d3a
  Kenneth Feng authored May 31, 2022
  49401d3a
- drm/amd/display: add DCN32 to IP discovery table · 85b0cc35
  Aurabindo Pillai authored Apr 25, 2022
  85b0cc35
- drm/amd/display: Add DM support for DCN32/DCN321 · 577359ca
  Aurabindo Pillai authored Feb 23, 2022
  577359ca
- drm/amdgpu/mes11: update mes11 api interface · 3b122974
  Jack Xiao authored May 18, 2022
  3b122974
- drm/amd/display: Add dependant changes for DCN32/321 · d3dfceb5
  Aurabindo Pillai authored Feb 23, 2022
  d3dfceb5
- drm/amd/display: add DCN32/321 specific files for Display Core · 235c6763
  Aurabindo Pillai authored Feb 23, 2022
  235c6763