- Jun 27, 2011
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Timur Tabi authored
To ensure that the DIU pixel clock will not be set to an invalid value, clamp the PXCLK divider to the allowed range (2-255). This also acts as a limiter for the pixel clock. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Scott Wood authored
e500mc cannot doze or nap due to an erratum (as well as having a different mechanism than previous e500), but it has a "wait" instruction that is similar to doze. On 64-bit, due to the soft-irq-disable mechanism, the existing book3e_idle should be used instead. Signed-off-by:
Vakul Garg <vakul@freescale.com> Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Split out common (non-board specific) parts of the SoC related device tree into a stub so multiple board dts files can include it and we can reduce duplication and maintenance effort. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Timur Tabi authored
The platform file for the Freecale P1022DS reference board is not freeing the ioremap() mapping of the PIXIS and global utilities nodes it creates. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Dmitry Baryshkov authored
fsl-lbc driver requires an interrupt to bind to localbus device. Populate 85xx boards' dts trees with lbc interrupt info. Signed-off-by:
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Dmitry Baryshkov authored
Signed-off-by:
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Lei Xu authored
Signed-off-by:
Lei Xu <B33228@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Lei Xu authored
Signed-off-by:
Lei Xu <B33228@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Prabhakar Kushwaha authored
FSL PCIe controller can act as agent(EP) or host(RC). Under Agent(EP) mode the controller will be configured by the host system. So its not required to be registered with the PCI(e) sub-system. We only register the controller if its configured in host(RC) mode. Signed-off-by:
Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by:
Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Timur Tabi authored
Add support for the ePAPR-compliant Freescale hypervisor (aka "Topaz") on the Freescale P3041DS, P4080DS, and P5020DS reference boards. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Timur Tabi authored
Add functions to restart and halt the current partition when running under the Freescale hypervisor. These functions should be assigned to various function pointers of the ppc_md structure during the .probe() function for the board: ppc_md.restart = fsl_hv_restart; ppc_md.power_off = fsl_hv_halt; ppc_md.halt = fsl_hv_halt; Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Ashish Kalra authored
The Freescale ePAPR reference hypervisor provides interrupt controller services via a hypercall interface, instead of emulating the MPIC controller. This is called the VMPIC. The ePAPR "virtual interrupt controller" provides interrupt controller services for external interrupts. External interrupts received by a partition can come from two sources: - Hardware interrupts - hardware interrupts come from external interrupt lines or on-chip I/O devices. - Virtual interrupts - virtual interrupts are generated by the hypervisor as part of some hypervisor service or hypervisor-created virtual device. Both types of interrupts are processed using the same programming model and same set of hypercalls. Signed-off-by:
Ashish Kalra <ashish.kalra@freescale.com> Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Timur Tabi authored
ePAPR hypervisors provide operating system services via a "hypercall" interface. The following steps need to be performed to make an hcall: 1. Load r11 with the hcall number 2. Load specific other registers with parameters 3. Issue instrucion "sc 1" 4. The return code is in r3 5. Other returned parameters are in other registers. To provide this service to the kernel, these steps are wrapped in inline assembly functions. Standard ePAPR hcalls are in epapr_hcalls.h, and Freescale extensions are in fsl_hcalls.h. Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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- Jun 23, 2011
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Stuart Yoder authored
Move irq_choose_cpu() into arch/powerpc/kernel/irq.c so that it can be used by other PIC drivers. The function is not MPIC-specific. Signed-off-by:
Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by:
Timur Tabi <timur@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Only 32-bit SoCs have a QUICC Engine so limit the config option to PPC32. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
We need the FSL specific header fixup code on both 32-bit and 64-bit platforms so just move the code into pci-common.c. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Roy Zang authored
The P1023 processor is an e500v2 based SoC that utilizes the DPAA networking architecture. This adds basic board support for non-DPAA functionality (device tree, board file, etc). Signed-off-by:
Roy Zang <tie-fei.zang@freescale.com> Signed-off-by:
Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Ashish Kalra authored
We expect this is actually faster, and we end up needing more space than we can get from the SPRGs in some instances. This is also useful when running as a guest OS - SPRGs4-7 do not have guest versions. 8 slots are allocated in thread_info for this even though we only actually use 4 of them - this allows space for future code to have more scratch space (and we know we'll need it for things like hugetlb). Signed-off-by:
Ashish Kalra <Ashish.Kalra@freescale.com> Signed-off-by:
Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Scott Wood authored
In cases like when the platform is used under hypervisor we will NOT have an MPIC controller but still want doorbells setup. Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
We fixup every FSL PCIe Root Complex we need to fixup a few things. Rather than adding every device under the sun we move to just matching only on the vendor (PCI_VENDOR_ID_FREESCALE) and than check that we are a PCIe controller in host mode in the fixup. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Several changes on PCIe support on P3041DS/P4080DS/P5020DS boards: * Add support for "fsl,qoriq-pcie-v2.2" needed by P3041 & P5020 * Removed support for setting primary_phb_addr as we have no ISA need * Add PCI controller to of_platform_bus_probe (for EDAC) * Cleanup building w/SWIOTLB off on P4080DS (not stricly PCIe related) Signed-off-by:
Kai.Jiang <Kai.Jiang@freescale.com> Signed-off-by:
Laurentiu TUDOR <Laurentiu.Tudor@freescale.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
* Added BSD dual-license * Moved mpic-parent to root so we dont need to duplicate everywhere * Added next level cache from L2 to CPC * Moved to 4-cell MPIC interrupt properties * Added 3 MSI banks * Added numerous missing nodes: soc-sram-error, guts, pins, clockgen, rcpm, sfp, serdes, etc. * Reworked PCIe interrupts to be at virtual bridge level Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Add basic device tree for P3041DS board. This device tree excludes support for DPAA and RapidIO nodes. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Add basic device tree for P5020DS board. This device tree excludes support for DPAA and RapidIO nodes. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
The e500mc and e5500 based cores are only available on corenet based SoCs. We use this name for the P204x, P3040, P4040, P4080, P50x0 SoCs and any future processors in these families. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
Rather than trying to use the core name we use corenet to distinquish the platform/core combo. corenet64 will be a 64-bit kernel build and we'll add a new defconfig for corenet32 for a 32-bit platforms. Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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- Jun 20, 2011
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Michael Neuling authored
doorbell type is defined as bits 32:36 so should be shifted by 63-36 = 27 rather than 28. We never noticed this bug as we've only every used type PPC_DBELL = 0. Signed-off-by:
Michael Neuling <mikey@neuling.org> Acked-by:
Kumar Gala <galak@kernel.crashing.org> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Dmitry Baryshkov authored
Support compilation of mpic.c with DEBUG defined, as now we have irq_desc and not irq number. Signed-off-by:
Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Paul Mackerras authored
On many platforms (including pSeries), smp_ops->message_pass is always smp_muxed_ipi_message_pass. This changes arch/powerpc/kernel/smp.c so that if smp_ops->message_pass is NULL, it calls smp_muxed_ipi_message_pass directly. This means that a platform doesn't need to set both .message_pass and .cause_ipi, only one of them. It is a slight performance improvement in that it gets rid of an indirect function call at the expense of a predictable conditional branch. Signed-off-by:
Paul Mackerras <paulus@samba.org> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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- Jun 17, 2011
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Matt Evans authored
smp_release_cpus() waits for all cpus (including the bootcpu) due to an off-by-one count on boot_cpu_count (which is all CPUs). This patch replaces that with spinning_secondaries (which is all secondary CPUs). Signed-off-by:
Matt Evans <matt@ozlabs.org> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Kumar Gala authored
Before if we didn't support or enable HW table walk we'd get a messaage like: MMU: Book3E Page Tables Disabled Which is a bit misleading. Now it will say: MMU: Book3E HW tablewalk not supported Signed-off-by:
Kumar Gala <galak@kernel.crashing.org> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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- Jun 08, 2011
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David Howells authored
_sdata needs to be declared in the linker script now as of commit a2d063ac ("extable, core_kernel_data(): Make sure all archs define _sdata") Signed-off-by:
David Howells <dhowells@redhat.com> Cc: Steven Rostedt <rostedt@goodmis.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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David Howells authored
die_if_no_fixup() shouldn't use get_user() as it doesn't call set_fs() to indicate that it wants to probe a kernel address. Instead it should use probe_kernel_read(). This fixes the problem of gdb seeing SIGILL rather than SIGTRAP when hitting the KGDB special breakpoint upon SysRq+g being seen. The problem was that die_if_no_fixup() was failing to read the opcode of the instruction that caused the exception, and thus not fixing up the exception. This caused gdb to get a S04 response to the $? request in its remote protocol rather than S05 - which would then cause it to continue with $C04 rather than $c in an attempt to pass the signal onto the inferior process. The kernel, however, does not support $Cnn, and so objects by returning an E22 response, indicating an error. gdb does not expect this and prints: warning: Remote failure reply: E22 and then returns to the gdb command prompt unable to continue. Signed-off-by:
David Howells <dhowells@redhat.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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David Howells authored
One of the kernel debugger cacheflush variants escaped proper testing. Two of the labels are wrong, being derived from the code that was copied to construct the variant. The first label results in the following assembler message: AS arch/mn10300/mm/cache-dbg-flush-by-reg.o arch/mn10300/mm/cache-dbg-flush-by-reg.S: Assembler messages: arch/mn10300/mm/cache-dbg-flush-by-reg.S:123: Error: symbol `debugger_local_cache_flushinv_no_dcache' is already defined And the second label results in the following linker message: arch/mn10300/mm/built-in.o:(.text+0x1d39): undefined reference to `mn10300_local_icache_inv_range_reg_end' arch/mn10300/mm/built-in.o:(.text+0x1d39): relocation truncated to fit: R_MN10300_PCREL16 against undefined symbol `mn10300_local_icache_inv_range_reg_end' To test this file the following configuration pieces must be set: CONFIG_AM34=y CONFIG_MN10300_CACHE_WBACK=y CONFIG_MN10300_DEBUGGER_CACHE_FLUSH_BY_REG=y CONFIG_MN10300_CACHE_MANAGE_BY_REG=y CONFIG_AM34_HAS_CACHE_SNOOP=n Signed-off-by:
David Howells <dhowells@redhat.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jun 07, 2011
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Joerg Roedel authored
Some PCIe cards ship with a PCI-PCIe bridge which is not visible as a PCI device in Linux. But the device-id of the bridge is present in the IOMMU tables which causes a boot crash in the IOMMU driver. This patch fixes by removing these cards from the IOMMU handling. This is a pure -stable fix, a real fix to handle this situation appriatly will follow for the next merge window. Cc: stable@kernel.org # > 2.6.32 Signed-off-by:
Joerg Roedel <joerg.roedel@amd.com>
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- Jun 06, 2011
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Joerg Roedel authored
Unfortunatly there are systems where the AMD IOMMU does not cover all devices. This breaks with the current driver as it initializes the global dma_ops variable. This patch limits the AMD IOMMU to the devices listed in the IVRS table fixing DMA for devices not covered by the IOMMU. Cc: stable@kernel.org Signed-off-by:
Joerg Roedel <joerg.roedel@amd.com>
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Joerg Roedel authored
The driver contains several loops counting on an u16 value where the exit-condition is checked against variables that can have values up to 0xffff. In this case the loops will never exit. This patch fixed 3 such loops. Cc: stable@kernel.org Signed-off-by:
Joerg Roedel <joerg.roedel@amd.com>
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Martin Schwidefsky authored
KVM is not available for 31 bit but the KVM defines cause warnings: arch/s390/include/asm/pgtable.h: In function 'ptep_test_and_clear_user_dirty': arch/s390/include/asm/pgtable.h:817: warning: integer constant is too large for 'unsigned long' type arch/s390/include/asm/pgtable.h:818: warning: integer constant is too large for 'unsigned long' type arch/s390/include/asm/pgtable.h: In function 'ptep_test_and_clear_user_young': arch/s390/include/asm/pgtable.h:837: warning: integer constant is too large for 'unsigned long' type arch/s390/include/asm/pgtable.h:838: warning: integer constant is too large for 'unsigned long' type Add 31 bit versions of the KVM defines to remove the warnings. Signed-off-by:
Martin Schwidefsky <schwidefsky@de.ibm.com>
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Martin Schwidefsky authored
Replace the s390 specific rcu page-table freeing code with the generic variant. This requires to duplicate the definition for the struct mmu_table_batch as s390 does not use the generic tlb flush code. While we are at it remove the restriction that page table fragments can not be reused after a single fragment has been freed with rcu and split out allocation and freeing of page tables with pgstes. Signed-off-by:
Martin Schwidefsky <schwidefsky@de.ibm.com>
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