- Mar 07, 2013
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Haojian Zhuang authored
Support the operation of generic pinconf. The supported config arguments are INPUT_SCHMITT, INPUT_SCHMITT_ENABLE, DRIVE_STRENGHT, BIAS_DISABLE, BIAS_PULLUP, BIAS_PULLDOWN, SLEW_RATE. Signed-off-by:
Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Haojian Zhuang authored
Since Hisilicon's pin controller is divided into two parts. One is the function mux, and the other is pin configuration. These two parts are in the different memory regions. So make pinctrl-single,function-mask as optional property. Then we can define pingroups without valid function mux that is only used for pin configuration. Signed-off-by:
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Haojian Zhuang authored
Add the support of dumping pin configuration. Signed-off-by:
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Haojian Zhuang authored
Since gpio driver could create gpio range in DTS, it could invoke pinctrl_request_gpio(). In the pinctrl-single driver, it needs to configure pins with gpio function mode. A new gpio function range should be created in DTS file in below. pinctrl-single,gpio-range = <phandle pin_offset nr_pins gpio_func>; range: gpio-range { #pinctrl-single,gpio-range-cells = <3>; }; The gpio-ranges property is used in gpio driver and the pinctrl-single,gpio-range property is used in pinctrl-single driver. 1. gpio-ranges is used for gpio driver in below. gpio-ranges = <phandle gpio_offset_in_chip pin_offset nr_pins> gpio-ranges = < &pmx0 0 89 1 &pmx0 1 89 1 &pmx0 2 90 1 &pmx0 3 90 1 &pmx0 4 91 1 &pmx0 5 92 1>; 2. gpio driver could get pin offset from gpio-ranges property. pinctrl-single driver could get gpio function mode from gpio_func that is stored in @gpiofuncs list in struct pcs_device. This new pinctrl-single,gpio-range is used as complement for gpio-ranges property in gpio driver. Signed-off-by: -
Haojian Zhuang authored
pinctrl_get_device_gpio_range() only checks whether a certain GPIO pin is in gpio range. But maybe some GPIO pins don't have back-end pinctrl interface, it means that these pins are always configured as GPIO function. For example, gpio159 isn't related to back-end pinctrl device in Hi3620 while other GPIO pins are related to back-end pinctrl device. Append pinctrl_ready_for_gpio_range() that is used to check whether pinctrl device with GPIO range is ready. This function will be called after pinctrl_get_device_gpio_range() fails. If pinctrl device with GPIO range is found, it means that pinctrl device is already launched and a certain GPIO pin just don't have back-end pinctrl interface. Then pinctrl_request_gpio() shouldn't return -EPROBE_DEFER in this case. Signed-off-by:
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Axel Lin authored
The of_device_id table is supposed to be zero-terminated. Signed-off-by:
Axel Lin <axel.lin@ingics.com> Signed-off-by:
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Laurent Pinchart authored
The pinconf, pinctrl and pinmux operation structures hold function pointers that are never modified. Declare them as const. Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by:
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Jingoo Han authored
devres_release() can simplify the code, because devres_release() will call the destructor for the resource as well as freeing the devres data. Signed-off-by:
Jingoo Han <jg1.han@samsung.com> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
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- Feb 16, 2013
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Magnus Damm authored
Fix sizeof() usage in sh-pfc/core.c to allocate space for the full data structure instead of a pointer. Signed-off-by:
Magnus Damm <damm@opensource.se> Acked-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by:
Simon Horman <horms+renesas@verge.net.au>
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- Feb 15, 2013
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Rhyland Klein authored
This patch adds the definition for the cldvfs function for Tegra114 pinctrl support. This is based on work by Pritesh Raithatha. Signed-off-by:
Rhyland Klein <rklein@nvidia.com> Reviewed-by:
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Haojian Zhuang authored
Rename PIN_CONFIG_INPUT_SCHMITT_DISABLE to PIN_CONFIG_INPUT_SCHMITT_ENABLE. It's used to make it more generialize. Signed-off-by:
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- Feb 10, 2013
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Laurent Meunier authored
This update adds a debugfs interface to modify a pin configuration for a given state in the pinctrl map. This allows to modify the configuration for a non-active state, typically sleep state. This configuration is not applied right away, but only when the state will be entered. This solution is mandated for us by HW validation: in order to test and verify several pin configurations during sleep without recompiling the software. Signed-off-by:
Laurent Meunier <laurent.meunier@st.com> Signed-off-by:
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Jingoo Han authored
This patch removes duplicated line of samsung_pinctrl_register(), because the number of pins is redundantly assigned twice. Reviewed-by:
Tomasz Figa <t.figa@samsung.com> Acked-by:
Kukjin Kim <kgene.kim@samsung.com> Signed-off-by:
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Linus Walleij authored
Make it harder to do mistakes by introducing the actual defined ABx500 IRQ number into the IRQ cluster definitions. Deduct cluster offset from the GPIO offset to make each cluster coherent. Signed-off-by: -
Lee Jones authored
The ABx500 GPIO controller used to provide a set of virtual contiguous IRQs for use by sub-devices, but they have been removed after a request from Mainline Maintainers. Now the AB8500 core driver deals with almost all IRQ related issues instead. The ABx500 GPIO driver is now only used to convert between GPIO and IRQ numbers which is actually quite difficult, as the ABx500 GPIO's associated IRQs are clustered together throughout the interrupt number space at irregular intervals. To solve this quandary, we have placed the read-in values into the existing cluster information table to use during conversion. Signed-off-by:
Lee Jones <lee.jones@linaro.org> [Moved irq_base removal into this patch] Signed-off-by:
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Lee Jones authored
In its current state the gpio-ab8500 driver looks after some GPIO lines found on the AB8500 MFD chip. It also controls all of its own IRQ handling for these GPIOs by inventing some virtual IRQs and handing those out to sub-devices. There has been quite a bit of controversy over this and it was a contributing factor to the driver being marked as BROKEN in Mainline. The reason for adopting this method was due to added complexity in the hardware. Unusually, each GPIO has two separate IRQs associated with it, one for a rising and a different one for a falling interrupt. Using this method complicates matters further because the GPIO IRQs are actually sandwiched between a bunch of IRQs which are handled solely by the AB8500 core driver. The best way for us to take this forward is to get rid of the virtual IRQs and only hand out the rising IRQ lines. If a sub-driver wishes to request a falling interrupt, they can do so by requesting a rising line in the normal way. They just have to add IRQ_TYPE_EDGE_FALLING or IRQ_TYPE_EDGE_BOTH, if they require both in the flags. Then if a falling IRQ is triggered, the AB8500 core driver will know how to handle the added complexity accordingly. This should greatly simply things. Signed-off-by:
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- Feb 07, 2013
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Linus Walleij authored
This removes the __init notation from some of the the exynos 5440 pin controller set-up functions. These functions are called from probe() and as such may be discarded before probe() completes. Cc: Thomas Abraham <thomas.abraham@linaro.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: -
Linus Walleij authored
The set_mode() and get_mode() functions in the abx500 were not mirrored, leading to the wrong GPIO control bits being read out. Cc: Lee Jones <lee.jones@linaro.org> Reported-by:
Patrice Chotard <patrice.chotard@st.com> Signed-off-by:
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- Feb 06, 2013
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Lee Jones authored
This patch will allow the ABX500 Pinctrl driver to be probed when Device Tree is enabled with an appropriate node contained. Signed-off-by:
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Lee Jones authored
Not quite sure how this ever worked. In ab8500_gpio_to_irq() the GPIO for conversion is passed through as the second argument. If GPIO13, which is a valid GPIO for IRQ functionality, was received; it would be rejected by the following guard: GPIO_IRQ_CLUSTER(5, 12, 0); /* GPIO numbers start from 1 */ if (offset >= cluster->start && offset <= cluster->end) /* Valid GPIO for IRQ use */ Signed-off-by: -
Lee Jones authored
Prior to this patch abx500_gpio_probe() would return the return-value of gpiochip_remove() during its error patch regardless of what the actual failure was. So as long as gpiochip_remove() succeeded, probe() would look like it succeeded too. This patch ensures the correct error value is returned and that mutex_destroy() is invoked if gpiochip_add_pin_range() were to fail. Signed-off-by:
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- Feb 05, 2013
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Maxime Ripard authored
Since the pin controller of sunxi chips is represented as a single bank in the driver. Since this is neither convenient nor represented that way in the datasheets, define a custom of_xlate function with the layout <bank pin flag> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
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John Crispin authored
The mapping logic inside ltq_pmx_gpio_request_enable() was broken. This only effected Falcon SoC. Signed-off-by:
Thomas Langer <thomas.langer@lantiq.com> Signed-off-by:
John Crispin <blogic@openwrt.org> Signed-off-by:
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John Crispin authored
The current code only has a stub for falcon_pinconf_dbg_show. This patch adds proper functionality. Signed-off-by:
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John Crispin authored
The Falcon driver only defined the pinconf parameters but did not pass them properly to the underlying api. Signed-off-by:
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John Crispin authored
On the Falcon SoC the bootleds are located on pins 9->14. Signed-off-by:
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John Crispin authored
The template falcon.dtsi lists all 6 pad controllers that can be loaded. Only probe those that have status = "okay"; inside the dts file. Signed-off-by:
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John Crispin authored
When setting the OpenDrain bit we should really honour the argument passed inside the devicetree. Signed-off-by:
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John Crispin authored
While converting the boards inside OpenWrt to OF I noticed that the we are missing a pinconf parameter to set a pin to output. Signed-off-by:
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John Crispin authored
While converting all the boards supported by OpenWrt to OF I noticed that this feature is missing. Adding it makes the devicetrees more readable. Signed-off-by:
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John Crispin authored
The logic of the OD bit was inverted when calling the pinconf get method. Signed-off-by:
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John Crispin authored
The XWAY pinctrl driver invalidly uses the port and not the pin number to work out the registers and bits to be set for the opendrain and pullup/down resistors. Signed-off-by:
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Barry Song authored
the default of_gpio_simple_xlate() will make us fail while getting gpios bigger than 32 by of_get_named_gpio() or related APIs. this patch adds a specific of_xlate callback for sirf gpio_chip and fix the problem. Signed-off-by:
Barry Song <Baohua.Song@csr.com> Signed-off-by:
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Kukjin Kim authored
Since pinctrl-exynos can support exynos4 and exynos5 so changed the option name to PINCTRL_EXYNOS for more clarity. Cc: Thomas Abraham <Thomas.abraham@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by:
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Lee Jones authored
Current failure path neglects to mutex_destroy() before returning an error due to an invalid parameter or an error received from gpiochip_add(). This patch aims to remedy that behaviour. Signed-off-by:
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Lee Jones authored
This patch provides some superficial changes to the driver to aid with readability and maintainability. We're mostly fixing things like white-space errors, spreading out code which as been clumped together impeding readability and comment layout, such as using the new "/**" comment start for function headers etc. No code semantics were harmed in the making of this patch. Signed-off-by:
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Lee Jones authored
Currently in the empty abx500_pin_config_get() function, we're returning -EINVAL, with a comment stating that the reason for the failure is that the function isn't implemented yet. Well there's a proper return code for that. If we use it, we can do away with the comment too, as it would be implied. Signed-off-by:
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Lee Jones authored
The BIT() macro provides a simple and easy to read way of obtaining bit offsets into things like masks and hardware registers. In this patch we're simply replacing all instances of '1 << x' with 'bit(x)'. Signed-off-by:
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Patrice Chotard authored
Add AB8540 sub driver to the ABx500 family, pins, pin groups and gpio range. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by:
Olof Johansson <olof@lixom.net> Signed-off-by:
Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by:
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Patrice Chotard authored
Add AB9540 sub driver to the ABx500 family, pins, pin groups and gpio range. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by:
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