- Jul 24, 2008
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Andre Detsch authored
This patch adjusts the placement of a reference context from a spu affinity chain. The reference context can now be placed only on nodes that have enough spus not intended to be used by another gang (already running on the node). Signed-off-by:
Andre Detsch <adetsch@br.ibm.com> Signed-off-by:
Jeremy Kerr <jk@ozlabs.org>
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Andre Detsch authored
Currenlt,, it is possible to lock aff_mutex and cbe_spu_info[n].list_mutex in different orders, allowing a deadlock to occur. With this change, aff_mutex is not taken within a list_mutex critical section anymore. Signed-off-by:
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- Jul 22, 2008
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Milton Miller authored
kcalloc is supposed to be called with the count as its first argument and the element size as the second. Signed-off-by:
Milton Miller <miltonm@bga.com> Signed-off-by:
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Mike Mason authored
This patch changes the EEH_MAX_FAILS action from panic to printing an error message. Panicking under under this condition is too harsh. Although performance will be affected and the device may not recover, the system is still running, which at the very least should allow for a more graceful shutdown. The patch also removes the msleep() within a spinlock, which can lead to a deadlock and is not recommended. Signed-off-by:
Mike Mason <mmlnx@us.ibm.com> Acked-by:
Linas Vepstas <linasvepstas@gmail.com> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Mark Nelson authored
Introduce a new dma attriblue DMA_ATTR_WEAK_ORDERING to use weak ordering on DMA mappings in the Cell processor. Add the code to the Cell's IOMMU implementation to use this code. Dynamic mappings can be weakly or strongly ordered on an individual basis but the fixed mapping has to be either completely strong or completely weak. This is currently decided by a kernel boot option (pass iommu_fixed=weak for a weakly ordered fixed linear mapping, strongly ordered is the default). Signed-off-by:
Mark Nelson <markn@au1.ibm.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Adrian Bunk authored
The real option is above in the same Kconfig file. Signed-off-by:
Adrian Bunk <bunk@kernel.org> Signed-off-by:
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Masakazu Mokuno authored
Add sub match id for ps3 system bus so that two different system bus devices can be connected to a shared device. Signed-off-by:
Masakazu Mokuno <mokuno@sm.sony.co.jp> Signed-off-by:
Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by:
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Mark Nelson authored
Update iommu_alloc() to take the struct dma_attrs and pass them on to tce_build(). This change propagates down to the tce_build functions of all the platforms. Signed-off-by:
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Christian Krafft authored
This patch adds support for the power button on future IBM cell blades. It actually doesn't shut down the machine. Instead it exposes an input device /dev/input/event0 to userspace which sends KEY_POWER if power button has been pressed. haldaemon actually recognizes the button, so a plattform independent acpid replacement should handle it correctly. Signed-off-by:
Christian Krafft <krafft@de.ibm.com> Signed-off-by:
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Christian Krafft authored
This patch adds a config option for the sysreset_hack used for IBM Cell blades. The code is moves from pervasive.c into ras.c and gets it's own init method. Signed-off-by:
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Christian Krafft authored
This patch adds a cpufreq governor that takes the number of running spus into account. It's very similar to the ondemand governor, but not as complex. Instead of hacking spu load into the ondemand governor it might be easier to have cpufreq accepting multiple governors per cpu in future. Don't know if this is the right way, but it would keep the governors simple. Signed-off-by:
Dave Jones <davej@redhat.com> Signed-off-by:
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- Jul 16, 2008
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Kumar Gala authored
This reverts commit e3621ee6. This was not the proper fix. As Scott Wood said CONFIG_FS_ENET has nothing to do with the issue. The proper fix is to select PHYLIB for this board.
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Kumar Gala authored
Its possible to build the phylib as a module, however this breaks the board code because alloc_mdio_bitbang and mdiobus_register are not available if we build as a module. These are needed by the board code since it implements the low level mdio bitbang ops. So we unconditionally select PHYLIB to ensure its built into the kernel if we are building in EP8248E support. Long term we should look at moving the mdio_ops into its own file so it can be built as a module. Signed-off-by:Kumar Gala <galak@kernel.crashing.org>
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Kumar Gala authored
With arch/ppc gone and all in kernel users of CONFIG_PPC_CPM_NEW_BINDING fixed up we dont have need for the Kconfig option anymore. Signed-off-by: -
Anton Vorontsov authored
- Get rid of uses_fsl_uli_m1575, it does not scale for all cases. Instead, let's explicitly use machine_is() for each fixup. - Factor out MPC8610HPCD quirks to fsl_uli1575, and protect them with machine_is(). One step closer to multiplatform kernels. - Actually use fsl_uli1575 on MPC8610HPCD, so RTC quirk will be applied. - RTC quirk applies to all boards though, so no machine_is() checks. Signed-off-by:
Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by:
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Anton Vorontsov authored
This patch fixes RTC on MPC8572DS boards: dummy read helps only when reading at the end of the bridge's memory (i.e. outside of behind the bridge devices' assigned regions). With this change the quirk also makes RTC work on MPC8610HPCD, so it's unlikely that this will break MPC8641HPCN or MPC8544DS boards. Signed-off-by:
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Anton Vorontsov authored
We must not use MPC831X_SICR[HL]_* definitions for the MPC8315 processors, because SICR USB bits locations are not compatible with MPC8313. This patch fixes ULPI workability on MPC8315E-RDB boards. Signed-off-by:
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John Rigby authored
This allows other platforms with the same pci block like MPC5121 to use it. Signed-off-by:
John Rigby <jrigby@freescale.com> Acked-by:
Grant Likely <grant.likely@secretlab.ca> Signed-off-by:
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John Rigby authored
Choosing PCI or not at config time is allowed on some platforms via an if expression in arch/powerpc/Kconfig. To add a new platform with PCI support selectable at config time, you must change the if expression. This patch makes this easier by changing: bool "PCI support" if <long expression> to bool "PCI support" if PPC_PCI_CHOICE and adding select PPC_PCI_CHOICE to all the config nodes that were previously in the PCI if expression. Platforms with unconditional PCI support continue to just select PCI in their config nodes. Signed-off-by: -
Scott Wood authored
Basic PM support for 83xx. Standby is implemented as sleep. Suspend-to-RAM is implemented as "deep sleep" (with the processor turned off) on 831x. Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
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Kumar Gala authored
If we don't enable FS_ENET we get build issues: arch/powerpc/platforms/built-in.o: In function `ep8248e_mdio_probe': arch/powerpc/platforms/82xx/ep8248e.c:129: undefined reference to `alloc_mdio_bitbang' arch/powerpc/platforms/82xx/ep8248e.c:143: undefined reference to `mdiobus_register' Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jul 15, 2008
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Dave Kleikamp authored
It is okay for both _PAGE_GUARDED and _PAGE_COHERENT (G and M) to be set in the same pte. In fact, even if that were not the case, there doesn't seem to be any place where G is set without also setting I (_PAGE_NO_CACHE), so the test for I is sufficient as a condition to clear _PAGE_COHERENT when filling the hash table. Signed-off-by:
Dave Kleikamp <shaggy@linux.vnet.ibm.com> Signed-off-by:
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- Jul 14, 2008
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Jason Jin authored
Remove the "uninitialized use" compile warning and avoid potential runtime issue. Signed-off-by:
Jason Jin <Jason.jin@freescale.com> Signed-off-by:
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Kumar Gala authored
There isn't any reason at this point that we can't build 82xx, 83xx & 86xx support in with the other 6xx based boards. Twiddle the Kconfigs to allow this. This allows us to remove the machine type selection for related to 6xx. Signed-off-by: -
Dave Jiang authored
Publish the devices listed in dts under SOC as of_device for 85xx_cds platform. The devices are needed by the 85xx EDAC driver. Signed-off-by:
Dave Jiang <djiang@mvista.com> Signed-off-by:
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Kumar Gala authored
Moved the pic initialization into its own common file and out of the board code. Also fixed the OF reference counting on the mpic node. Signed-off-by: -
Jochen Friedrich authored
Initialize I2C pins on boards with CPM1/CPM2 controllers and document the i2c bus in booting-without-of. The boards don't have any I2C chips connected to the I2C bus, so unless some external chips are connected to the boards, this code is just an example of setting everything else up. Signed-off-by:
Jochen Friedrich <jochen@scram.de> Signed-off-by:
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Kumar Gala authored
Add support for the MPC8536 process and MPC8536DS reference board. The MPC8536 is an e500v2 based SoC which eTSEC, USB, SATA, PCI, and PCIe. The USB and SATA IP blocks are similiar to those on the PQ2 Pro SoCs and thus use the same drivers. Signed-off-by: -
Kumar Gala authored
These issues were reported by Stephen Rothwell for another 85xx board port and pointed out by Chen Gong as issues in the DS port. * mpic OF node reference counting was off * of_device_id struct should be marked as __initdata Signed-off-by: -
Rune Torgersen authored
Fix interrupt threading issue on pq2fads when running with CONFIG_PREEMPT_RT Signed-off-by:
Rune Torgersen <runet@innovsys.com> Signed-off-by:
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- Jul 12, 2008
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John Rigby authored
Add a interrupt host for the interrupt controller in the mpc5121ads cpld. PCI interrupts are 0-7 the rest are 8-15 Touchscreen pendown irq is hardwired to irq1 All other irqs are chained to irq0 Signed-off-by:
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John Rigby authored
Move shared code from mpc5121_ads.c to new file mpc512x_shared.c - mpc512x_find_ips_freq -> unchanged - contents of mpc5121_ads_init_IRQ -> mpc512x_init_IRQ - looking for fsl,mpc5121-ipic instead of fsl,ipic - mpc5121_ads_declare_of_platform_devices -> mpc5121_declare_of_platform_devices - and use compatible for lookup instead of node name Add new generic board setup mpc5121_generic.c Signed-off-by:
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John Rigby authored
Plugs into the generic powerpc clock driver in arch/powerpc/kernel/clock.c The following subset of clk_interface is implemented: clk_get, clk_put: get clock via name, release clock clk_enable, clk_disable: enable or disable clock clk_get_rate: get clock rate in Hz clk_set_rate: stubbed clk_round_rate: stubbed clk_set_parent: NULL clk_get_parent: NULL Signed-off-by: -
Andre Schwarz authored
On MPC5200 the PCI target control register (PCITCR) @ MBAR + 0xD6C is initialized with only bit 7 (Latrule disable) set. The 8-Bit write combine timer (Bits 24..31) should be also set to a reasonable value _greater zero_ (0x08 = default) since setting it to 0x00 leads to _very poor_ performance as a PCI target since external burst won't be possible at all. Setting the WCT to 0x08 (cache-line size) leads to good overall perfomance. Signed-off-by:
Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by:
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- Jul 09, 2008
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Sean MacLennan authored
Allow the Rev A Warp boards to boot from NAND. Signed-off-by:
Sean MacLennan <smaclennan@pikatech.com> Signed-off-by:
Josh Boyer <jwboyer@linux.vnet.ibm.com>
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Mike Mason authored
The following patch restores the PERR and SERR bits in the PCI command register during an EEH device recovery. We have found at least one case (an Agilent test card) where the PERR/SERR bits are set to 1 by firmware at boot time, but are not restored to 1 during EEH recovery. The patch fixes the Agilent card problem. It has been tested on several other EEH-enabled cards with no regressions. Signed-off-by:
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Dave Kleikamp authored
The current low level hash code on LPAR configurations clears _PAGE_COHERENT (M) when either _PAGE_GUARDED (G) or _PAGE_NO_CACHE (I) is set. This conflicts with _PAGE_SAO which has M, I and W bits sets at once (normally invalid combo) to indicate the new SAO attribute. This changes the code to allow that case. Signed-off-by:
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Mark Nelson authored
Make cell_dma_dev_setup_iommu() return a pointer to the struct iommu_table (or NULL if no table can be found) rather than putting this pointer into dev->archdata.dma_data (let the caller do that), and rename this function to cell_get_iommu_table() to reflect this change. This will allow us to get the iommu table for a device that doesn't have the table in the archdata. Signed-off-by:
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Mark Nelson authored
Update powerpc to use the new dma_*map*_attrs() interfaces. In doing so update struct dma_mapping_ops to accept a struct dma_attrs and propagate these changes through to all users of the code (generic IOMMU and the 64bit DMA code, and the iseries and ps3 platform code). The old dma_*map_*() interfaces are reimplemented as calls to the corresponding new interfaces. Signed-off-by:
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Maxim Shchetynin authored
As nr_active counter includes also spus waiting for syscalls to return we need a seperate counter that only counts spus that are currently running on spu side. This counter shall be used by a cpufreq governor that targets a frequency dependent from the number of running spus. Signed-off-by:
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