Commits · aec33b54af55ef025e03e3dfbab3b8abe00eaa22 · jan.koester / Linux · GitLab

Feb 19, 2021
- riscv: Covert to reserve_initrd_mem() · aec33b54
  Kefeng Wang authored Jan 15, 2021
  aec33b54
- initramfs: Provide a common initrd reserve function · c72160fe
  Kefeng Wang authored Jan 15, 2021
  c72160fe
- initrd: Add the preprocessor guard in initrd.h · fade5cad
  Kefeng Wang authored Jan 15, 2021
  fade5cad
- riscv: add BUILTIN_DTB support for MMU-enabled targets · f105aa94
  Vitaly Wool authored Jan 16, 2021
  f105aa94
Jan 14, 2021
- riscv/stacktrace: Fix stack output without ra on the stack top · f766f77a
  Chen Huang authored Jan 11, 2021
  f766f77a
- riscv: Improve __show_regs · da401e89
  Kefeng Wang authored Jan 11, 2021
  da401e89
- riscv: Add dump stack in show_regs · 091b9450
  Kefeng Wang authored Jan 11, 2021
  091b9450
- riscv: Enable per-task stack canaries · fea2fed2
  Guo Ren authored Dec 17, 2020
  fea2fed2
- riscv: Add support for function error injection · ee55ff80
  Guo Ren authored Dec 17, 2020
  ee55ff80
- riscv: Add uprobes supported · 74784081
  Guo Ren authored Dec 17, 2020
  74784081
- riscv: Add KPROBES_ON_FTRACE supported · 829adda5
  Guo Ren authored Dec 17, 2020
  829adda5
- riscv: Add kprobes supported · c22b0bcb
  Guo Ren authored Dec 17, 2020
  c22b0bcb
- riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT · afc76b8b
  Guo Ren authored Dec 17, 2020
  afc76b8b
- riscv: Fixup patch_text panic in ftrace · 5ad84adf
  Guo Ren authored Dec 17, 2020
  5ad84adf
- riscv: Fixup wrong ftrace remove cflag · 67d94577
  Guo Ren authored Dec 17, 2020
  67d94577
- riscv: Fixup compile error BUILD_BUG_ON failed · edfcf91f
  Guo Ren authored Dec 17, 2020
  edfcf91f
- RISC-V: Implement ptrace regs and stack API · dcdc7a53
  Patrick Stählin authored Dec 17, 2020
  dcdc7a53
- riscv: Add machine name to kernel boot log and stack dump output · 46ad48e8
  Kefeng Wang authored Nov 25, 2020
  46ad48e8
- riscv: Add numa support for riscv64 platform · 4f0e8eef
  Atish Patra authored Nov 18, 2020
  4f0e8eef
- riscv: Add support pte_protnone and pmd_protnone if CONFIG_NUMA_BALANCING · 3e5b0bdb
  Greentime Hu authored Nov 18, 2020
  3e5b0bdb
- riscv: Separate memory init from paging init · cbd34f4b
  Atish Patra authored Nov 18, 2020
  cbd34f4b
- numa: Move numa implementation to common code · ae3c107c
  Atish Patra authored Nov 18, 2020
  ae3c107c
- arm64, numa: Change the numa init functions name to be generic · eb75541f
  Atish Patra authored Nov 18, 2020
  eb75541f
- riscv: Add Canaan Kendryte K210 reset controller · 5a2308da
  Damien Le Moal authored Dec 13, 2020
  5a2308da
- dt-bindings: pinctrl: Document canaan,k210-fpioa bindings · ed3137ed
  Damien Le Moal authored Dec 13, 2020
  ed3137ed
- dt-bindings: reset: Document canaan,k210-rst bindings · 1d7c9d09
  Damien Le Moal authored Dec 13, 2020
  1d7c9d09
- dt-binding: mfd: Document canaan,k210-sysctl bindings · 23fb08e7
  Damien Le Moal authored Dec 13, 2020
  23fb08e7
- riscv: cleanup Canaan Kendryte K210 sysctl driver · 802fee26
  Damien Le Moal authored Dec 13, 2020
  802fee26
- riscv: Fix Canaan Kendryte K210 device tree · 93c2ce1e
  Damien Le Moal authored Dec 13, 2020
  93c2ce1e
- riscv: Use vendor name for K210 SoC support · 08734e05
  Damien Le Moal authored Dec 13, 2020
  08734e05
Jan 08, 2021
- riscv: Fix builtin DTB handling · d5805af9
  Damien Le Moal authored Dec 13, 2020
  d5805af9
- riscv: dts: add initial board data for the SiFive HiFive Unmatched · d573b555
  Yash Shah authored Dec 08, 2020
  d573b555
- dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board · 3489c030
  Yash Shah authored Dec 08, 2020
  3489c030
- riscv: dts: add initial support for the SiFive FU740-C000 SoC · 57985788
  Yash Shah authored Dec 08, 2020
  57985788
- dt-bindings: gpio: Update DT binding docs to support SiFive FU740 SoC · 42cf244c
  Yash Shah authored Dec 08, 2020
  42cf244c
- dt-bindings: pwm: Update DT binding docs to support SiFive FU740 SoC · b1f592d5
  Yash Shah authored Dec 08, 2020
  b1f592d5
- dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC · 75e6d724
  Yash Shah authored Dec 08, 2020
  75e6d724
- RISC-V: sifive_l2_cache: Update L2 cache driver to support SiFive FU740 · 507308b8
  Yash Shah authored Dec 10, 2020
  507308b8
- dt-bindings: riscv: Update l2 cache DT documentation to add support for SiFive FU740 · af951c3a
  Yash Shah authored Dec 10, 2020
  af951c3a
- riscv/mm: Prevent kernel module to access user memory without uaccess routines · 21855cac
  Eric Lin authored Dec 04, 2020
  21855cac