- Oct 05, 2012
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Liu Yu-B13201 authored
Signed-off-by:
Liu Yu <yu.liu@freescale.com> Signed-off-by:
Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by:
Alexander Graf <agraf@suse.de>
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Liu Yu-B13201 authored
Signed-off-by:
Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by:
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Liu Yu-B13201 authored
And add a new flag definition in kvm_ppc_pvinfo to indicate whether the host supports the EV_IDLE hcall. Signed-off-by:
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Stuart Yoder authored
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Stuart Yoder authored
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- Aug 24, 2012
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Michael Neuling authored
Signed-off-by:
Michael Neuling <mikey@neuling.org> Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Scott Wood authored
Add several #includes that mpic_msgr relies on being pulled implicitly, which only happens on certain configs. Signed-off-by:
Scott Wood <scottwood@freescale.com> Cc: Meador Inge <meador_inge@mentor.com> Cc: Jia Hongtao <B38951@freescale.com> Signed-off-by:
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- Aug 16, 2012
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Alexander Graf authored
When we map a page that wasn't icache cleared before, do so when first mapping it in KVM using the same information bits as the Linux mapping logic. That way we are 100% sure that any page we map does not have stale entries in the icache. Signed-off-by:
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- Aug 06, 2012
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Takuya Yoshikawa authored
Two reasons: - x86 can integrate rmap and rmap_pde and remove heuristics in __gfn_to_rmap(). - Some architectures do not need rmap. Since rmap is one of the most memory consuming stuff in KVM, ppc'd better restrict the allocation to Book3S HV. Signed-off-by:
Takuya Yoshikawa <yoshikawa.takuya@oss.ntt.co.jp> Acked-by:
Paul Mackerras <paulus@samba.org> Signed-off-by:
Avi Kivity <avi@redhat.com>
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- Jul 31, 2012
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Will Deacon authored
Rather than #define the options manually in the architecture code, add Kconfig options for them and select them there instead. This also allows us to select the compat IPC version parsing automatically for platforms using the old compat IPC interface. Reported-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Will Deacon <will.deacon@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jul 30, 2012
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Marek Szyprowski authored
Commit 9adc5374 ('common: dma-mapping: introduce mmap method') added a generic method for implementing mmap user call to dma_map_ops structure. This patch converts ARM and PowerPC architectures (the only providers of dma_mmap_coherent/dma_mmap_writecombine calls) to use this generic dma_map_ops based call and adds a generic cross architecture definition for dma_mmap_attrs, dma_mmap_coherent, dma_mmap_writecombine functions. The generic mmap virt_to_page-based fallback implementation is provided for architectures which don't provide their own implementation for mmap method. Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:
Kyungmin Park <kyungmin.park@samsung.com>
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- Jul 24, 2012
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Cong Wang authored
Signed-off-by:Cong Wang <amwang@redhat.com>
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- Jul 18, 2012
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Takuya Yoshikawa authored
When we tested KVM under memory pressure, with THP enabled on the host, we noticed that MMU notifier took a long time to invalidate huge pages. Since the invalidation was done with mmu_lock held, it not only wasted the CPU but also made the host harder to respond. This patch mitigates this by using kvm_handle_hva_range(). Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com>
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- Jul 11, 2012
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Bharat Bhushan authored
Signed-off-by:
Bharat Bhushan <bharat.bhushan@freescale.com> Signed-off-by:
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Haren Myneni authored
Some power systems do not have legacy ISA devices. So, /dev/port is not a valid interface on these systems. User level tools such as kbdrate is trying to access the device using this interface which is causing the system crash. This patch will fix this issue by not creating this interface on these powerpc systems. Signed-off-by:
Haren Myneni <haren@us.ibm.com> Signed-off-by:
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Tiejun Chen authored
Add "memory" attribute in inline assembly language as a compiler barrier to make sure 4.6.x GCC don't reorder mfmsr(). Signed-off-by:
Tiejun Chen <tiejun.chen@windriver.com> Signed-off-by:
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Anton Blanchard authored
We have a request for a fast method of getting CPU and NUMA node IDs from userspace. This patch implements a getcpu VDSO function, similar to x86. Ben suggested we use SPRG3 which is userspace readable. SPRG3 can be modified by a KVM guest, so we save the SPRG3 value in the paca and restore it when transitioning from the guest to the host. I have a glibc patch that implements sched_getcpu on top of this. Testing on a POWER7: baseline: 538 cycles vdso: 30 cycles Signed-off-by:
Anton Blanchard <anton@samba.org> Signed-off-by:
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Stuart Yoder authored
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- Jul 10, 2012
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Kokoris, Ioannis authored
QE Microcode Initialization using qe_upload_microcode() does not work on P1021 if the IRAM-Ready register is not set after the microcode upload. Add a definition for the "I-RAM Ready" register and sets it upon microcode upload completion. Signed-off-by:
Ioannis Kokkoris <ioannis.kokoris@siemens-enterprise.com> Signed-off-by:
Kumar Gala <galak@kernel.crashing.org>
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Anton Blanchard authored
Add the ability to inject IOMMU faults. We enable this per device via a fail_iommu sysfs property, similar to fault injection on other subsystems. An example: ... 0003:01:00.1 Ethernet controller: Emulex Corporation OneConnect 10Gb NIC (be3) (rev 02) To inject one error to this device: echo 1 > /sys/bus/pci/devices/0003:01:00.1/fail_iommu echo 1 > /sys/kernel/debug/fail_iommu/probability echo 1 > /sys/kernel/debug/fail_iommu/times As feared, the first failure injected on the be3 results in an unrecoverable error, taking down both functions of the card permanently: be2net 0003:01:00.1: Unrecoverable error in the card Signed-off-by:
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Anton Blanchard authored
The DMA API debug code has hooks to verify all DMA entries have been freed at time of hot unplug. We need to call dma_debug_add_bus for this to work. Signed-off-by:
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Anton Blanchard authored
The logic to choose whether to use the SIAR or get the information out of pt_regs is going to get more complicated, so do it once in perf_read_regs. We overload regs->result which is gross but we are already doing it with regs->dsisr. Signed-off-by:
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Michael Neuling authored
Some macros use RA where when RA=R0 the values is 0, so make this the enforced mnemonic in the macro. Idea suggested by Andreas Schwab. Signed-off-by:
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Michael Neuling authored
R0 is special since it'll be 0. Signed-off-by:
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Michael Neuling authored
Enforce the use of R0-R31 in macros where possible now we have all the fixes in. R0-R31 macros are removed here so that can't be used anymore. They should not be defined anywhere. Signed-off-by:
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Michael Neuling authored
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Michael Neuling authored
Now have ___PPC_RA/B/S/T we can use it in some places. These are places where we can't use the existing defines which will soon enforce R0-R31 usage. The macros being changed here are being used in inline asm, which can't convert to enforce the R0-R31 usage. bpf_jit uses a mix of both generated and non-generated with the same code, so just convert all these to use the ___PPC_R versions which won't enforce R usage later. Signed-off-by:
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Michael Neuling authored
These are currently the same as __PPC_RA/B/S/T but we'll wrap them soon. Signed-off-by:
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Michael Neuling authored
We need to do this so we can enforce the name of a and b in called macros PPC_RA/B later. Signed-off-by:
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Michael Neuling authored
mtocrf define is just a wrapper around the real instructions so we can just use real register names here (ie. lower case). Also remove braces in macro so this is possible. Signed-off-by:
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Benjamin Herrenschmidt authored
Move this duplicated definition to ppc_asm.h and remove the braces which prevent the use of %rN register names Signed-off-by: -
Michael Neuling authored
Merge the defines of VCPU_GPR from different places. Signed-off-by:
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Michael Neuling authored
Merge the defines of STACKFRAMESIZE, STK_REG, STK_PARAM from different places. Signed-off-by:
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Michael Neuling authored
move lbz/stbciz to ppc-opcode.h. Signed-off-by:
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Michael Neuling authored
Now all the fixes are in place, let's rock-n-roll! Signed-off-by:
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Michael Neuling authored
The assembler doesn't take %r0 register arguments in braces, so remove them. Signed-off-by:
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Michael Neuling authored
We are going to use these later and convert r0 to %r0 etc. Signed-off-by:
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Benjamin Herrenschmidt authored
There was a typo, checking for CONFIG_TRACE_IRQFLAG instead of CONFIG_TRACE_IRQFLAGS causing some useful debug code to not be built This in turns causes a build error on BookE 64-bit due to incorrect semicolons at the end of a couple of macros, so let's fix that too Signed-off-by: -
Benjamin Herrenschmidt authored
Looks like we still have issues with pSeries and Cell idle code vs. the lazy irq state. In fact, the reset fixes that went upstream are exposing the problem more by causing BUG_ON() to trigger (which this patch turns into a WARN_ON instead). We need to be careful when using a variant of low power state that has the side effect of turning interrupts back on, to properly set all the SW & lazy state to look as if everything is enabled before we enter the low power state with MSR:EE off as we will return with MSR:EE on. If not, we have a discrepancy of state which can cause things to go very wrong later on. This patch moves the logic into a helper and uses it from the pseries and cell idle code. The power4/970 idle code already got things right (in assembly even !) so I'm not touching it. The power7 "bare metal" idle code is subtly different and correct. Remains PA6T and some hypervisor based Cell platforms which have questionable code in there, but they are mostly dead platforms so I'll fix them when I manage to get final answers from the respective maintainers about how the low power state actually works on them. Signed-off-by:
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- Jul 03, 2012
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Scott Wood authored
The array of names in hugetlbpage.c no longer exists. Signed-off-by:
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