- Apr 30, 2021
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Matthew Wilcox (Oracle) authored
page_mapping_file() is only used by some architectures, and then it is usually only used in one place. Make it a static inline function so other architectures don't have to carry this dead code. Link: https://lkml.kernel.org/r/20210317123011.350118-1-willy@infradead.org Signed-off-by:
Matthew Wilcox (Oracle) <willy@infradead.org> Reviewed-by:
David Hildenbrand <david@redhat.com> Acked-by:
Mike Rapoport <rppt@linux.ibm.com> Cc: Huang Ying <ying.huang@intel.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Anshuman Khandual authored
early_memtest() does not get called from all architectures. Hence enabling CONFIG_MEMTEST and providing a valid memtest=[1..N] kernel command line option might not trigger the memory pattern tests as would be expected in normal circumstances. This situation is misleading. The change here prevents the above mentioned problem after introducing a new config option ARCH_USE_MEMTEST that should be subscribed on platforms that call early_memtest(), in order to enable the config CONFIG_MEMTEST. Conversely CONFIG_MEMTEST cannot be enabled on platforms where it would not be tested anyway. Link: https://lkml.kernel.org/r/1617269193-22294-1-git-send-email-anshuman.khandual@arm.com Signed-off-by:
Anshuman Khandual <anshuman.khandual@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> (arm64) Reviewed-by:
Max Filippov <jcmvbkbc@gmail.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Will Deacon <will@kernel.org> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: Chris Zankel <chris@zankel.net> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Apr 23, 2021
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Stefano Stabellini authored
Newer Xen versions expose two Xen feature flags to tell us if the domain is directly mapped or not. Only when a domain is directly mapped it makes sense to enable swiotlb-xen on ARM. Introduce a function on ARM to check the new Xen feature flags and also to deal with the legacy case. Call the function xen_swiotlb_detect. Signed-off-by:
Stefano Stabellini <stefano.stabellini@xilinx.com> Reviewed-by:
Boris Ostrovsky <boris.ostrovsky@oracle.com> Link: https://lore.kernel.org/r/20210319200140.12512-1-sstabellini@kernel.org Signed-off-by:
Juergen Gross <jgross@suse.com>
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- Apr 22, 2021
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Kunihiko Hayashi authored
UniPhier PXs2 boards have RTL8211E ethernet phy, and the phy have the RX/TX delays of RGMII interface using pull-ups on the RXDLY and TXDLY pins. After the commit bbc4d71d ("net: phy: realtek: fix rtl8211e rx/tx delay config"), the delays are working correctly, however, "rgmii" means no delay and the phy doesn't work. So need to set the phy-mode to "rgmii-id" to show that RX/TX delays are enabled. Fixes: e3cc9319 ("ARM: dts: uniphier: add AVE ethernet node") Signed-off-by:
Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Marc Zyngier authored
irq_create_strict_mappings() is a poor way to allow the use of a linear IRQ domain as a legacy one. Let's be upfront about it and use a legacy domain when appropriate. Signed-off-by:
Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210406093557.1073423-3-maz@kernel.org
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- Apr 19, 2021
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Daniel Palmer authored
M5Stack are releasing a new widget based on the SigmaStar SSD202D. We have some support for the SSD202D so lets add a dts for it. Signed-off-by:
Daniel Palmer <daniel@0x0f.com> Link: https://m5stack-store.myshopify.com/products/unitv2-ai-camera-gc2145 Link: https://lore.kernel.org/r/20210417011015.2105280-4-daniel@0x0f.com ' Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Apr 18, 2021
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Fredrik Strupe authored
Since uprobes is not supported for thumb, check that the thumb bit is not set when matching the uprobes instruction hooks. The Arm UDF instructions used for uprobes triggering (UPROBE_SWBP_ARM_INSN and UPROBE_SS_ARM_INSN) coincidentally share the same encoding as a pair of unallocated 32-bit thumb instructions (not UDF) when the condition code is 0b1111 (0xf). This in effect makes it possible to trigger the uprobes functionality from thumb, and at that using two unallocated instructions which are not permanently undefined. Signed-off-by:
Fredrik Strupe <fredrik@strupe.net> Cc: stable@vger.kernel.org Fixes: c7edc9e3 ("ARM: add uprobes support") Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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- Apr 16, 2021
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Nathan Chancellor authored
Debian's clang carries a patch that makes the default FPU mode 'vfp3-d16' instead of 'neon' for 'armv7-a' to avoid generating NEON instructions on hardware that does not support them: https://salsa.debian.org/pkg-llvm-team/llvm-toolchain/-/raw/5a61ca6f21b4ad8c6ac4970e5ea5a7b5b4486d22/debian/patches/clang-arm-default-vfp3-on-armv7a.patch https://bugs.debian.org/841474 https://bugs.debian.org/842142 https://bugs.debian.org/914268 This results in the following build error when clang's integrated assembler is used because the '.arch' directive overrides the '.fpu' directive: arch/arm/crypto/curve25519-core.S:25:2: error: instruction requires: NEON vmov.i32 q0, #1 ^ arch/arm/crypto/curve25519-core.S:26:2: error: instruction requires: NEON vshr.u64 q1, q0, #7 ^ arch/arm/crypto/curve25519-core.S:27:2: error: instruction requires: NEON vshr.u64 q0, q0, #8 ^ arch/arm/crypto/curve25519-core.S:28:2: error: instruction requires: NEON vmov.i32 d4, #19 ^ Shuffle the order of the '.arch' and '.fpu' directives so that the code builds regardless of the default FPU mode. This has been tested against both clang with and without Debian's patch and GCC. Cc: stable@vger.kernel.org Fixes: d8f1308a ("crypto: arm/curve25519 - wire up NEON implementation") Link: https://github.com/ClangBuiltLinux/continuous-integration2/issues/118 Reported-by:
Arnd Bergmann <arnd@arndb.de> Suggested-by:
Arnd Bergmann <arnd@arndb.de> Suggested-by:
Jessica Clarke <jrtc27@jrtc27.com> Signed-off-by:
Nathan Chancellor <nathan@kernel.org> Acked-by:
Jason A. Donenfeld <Jason@zx2c4.com> Reviewed-by:
Nick Desaulniers <ndesaulniers@google.com> Tested-by:
Nick Desaulniers <ndesaulniers@google.com> Signed-off-by:
Herbert Xu <herbert@gondor.apana.org.au>
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Paul Fertser authored
The ADM1278 IC is accessible on I2C bus and on both Wiwynn and Quanta Tioga Pass implementations a pair of parallel 0.5 mOhm resistors is used for current measurement. Signed-off-by:
Paul Fertser <fercerpav@gmail.com> Link: https://lore.kernel.org/r/20210415140521.11352-1-fercerpav@gmail.com Signed-off-by:
Joel Stanley <joel@jms.id.au>
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Konstantin Aladyshev authored
Enable all I2C busses that are used in AMD EthanolX CRB: i2c0 - APML P0 i2c1 - APML P1 i2c2 - FPGA i2c3 - 24LC128 EEPROM i2c4 - P0 Power regulators i2c5 - P1 Power regulators i2c6 - P0/P1 Thermal diode i2c7 - Thermal Sensors i2c8 - BMC I2C Signed-off-by:
Konstantin Aladyshev <aladyshev22@gmail.com> Link: https://lore.kernel.org/r/20210415155300.1135-1-aladyshev22@gmail.com Signed-off-by:
Joel Stanley <joel@jms.id.au>
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Eddie James authored
Add the muxes present in pass 2 and remove the eeproms that were removed. Signed-off-by:
Eddie James <eajames@linux.ibm.com> Signed-off-by:
Joel Stanley <joel@jms.id.au>
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Eddie James authored
The 1S4U system populates fans 0, 1, 2, and 4. Update the dts to reflect this. Fixes: 7f03894a ("ARM: dts: aspeed: Add Rainier 1S4U machine") Signed-off-by:
Eddie James <eajames@linux.ibm.com> Reviewed-by:
Joel Stanley <joel@jms.id.au> Signed-off-by:
Joel Stanley <joel@jms.id.au>
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Eddie James authored
The si7021 was incorrectly placed at 0x20 on i2c bus 7. It is at 0x40. Fixes: 9c44db70 ("ARM: dts: aspeed: rainier: Add i2c devices") Signed-off-by:
Eddie James <eajames@linux.ibm.com> Reviewed-by:
Joel Stanley <joel@jms.id.au> Signed-off-by:
Joel Stanley <joel@jms.id.au>
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Eddie James authored
The second presence detection PCA9552 was incorrectly added to bus 9. Fixes: 8be44de6 ("ARM: dts: aspeed: Rainier: Add presence GPIOs") Signed-off-by:
Eddie James <eajames@linux.ibm.com> Reviewed-by:
Joel Stanley <joel@jms.id.au> Signed-off-by:
Joel Stanley <joel@jms.id.au>
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- Apr 14, 2021
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Alex Elder authored
Add IPA-related nodes and definitions to "sdx55.dtsi". The SMP2P nodes (ipa_smp2p_out and ipa_smp2p_in) are already present. Signed-off-by:
Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20210409155251.955632-1-elder@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Not all platforms are able to allocate CMA size of 256MB. One such platform is SDX55. Hence, use the standard 64MB size for CMA. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-8-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Enable the Qualcomm GLINK SMEM driver to support GLINK protocol over shared memory. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-7-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Enable interconnect driver for SDX55 platform to manage the interconnect providers. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-6-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Enable the Qualcomm Q6V5_PAS (Peripheral Authentication Service) remoteproc driver to manage the modem co-processor in SDX55 platform. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-5-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Enable CPUFreq and CPUFreq DT drivers to carry out CPU Frequency scaling duties on platforms like SDX55. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-4-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Enable A7 PLL driver and APCS clock driver on SDX55 platform. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-3-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Enable Qualcomm APCS IPC mailbox driver for IPC communication between application processor and other masters in platforms like SDX55. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170930.91834-2-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Thundercomm T55 is the development platform based on the Qualcomm SDX55 chipset. This basic support includes support for debug serial, NAND flash, BAM DMA, USB and regulators support. https://www.thundercomm.com/app_en/product/1593506006365532 Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-14-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Telit FN980 TLB is the development platform based on the Qualcomm SDX55 chipset. This basic support includes support for debug serial, NAND flash, BAM DMA, USB and regulators support. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-12-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Add modem support to SDX55 using the PAS remoteproc driver. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-16-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Use the common "nand-controller" node name for NAND controller node to fix the `make dtbs_check` validation for Qcom platforms. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-10-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Add interconnect nodes for the providers in SDX55 platform. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-9-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Add SCM node to enable SCM functionality on SDX55 platform. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-8-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Add a simple-mfd representing IMEM on SDX55 and define the PIL relocation info region, so that post mortem tools will be able to locate the loaded remoteproc. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-6-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Add SMP2P nodes for the SDX55 platform to communicate with the modem. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-5-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
Add CPUFreq support to SDX55 platform using the cpufreq-dt driver. There is no dedicated hardware block available on this platform to carry on the CPUFreq duties. Hence, it is accomplished using the CPU clock and regulators tied together by the operating points table. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-4-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
The APCS block on SDX55 acts as a mailbox controller and also provides clock output for the Cortex A7 CPU. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-3-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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Manivannan Sadhasivam authored
On SDX55 there is a separate A7 PLL which is used to provide high frequency clock to the Cortex A7 CPU via a MUX. Signed-off-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210408170457.91409-2-manivannan.sadhasivam@linaro.org Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org>
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- Apr 13, 2021
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Michael Walle authored
of_get_mac_address() returns a "const void*" pointer to a MAC address. Lately, support to fetch the MAC address by an NVMEM provider was added. But this will only work with platform devices. It will not work with PCI devices (e.g. of an integrated root complex) and esp. not with DSA ports. There is an of_* variant of the nvmem binding which works without devices. The returned data of a nvmem_cell_read() has to be freed after use. On the other hand the return of_get_mac_address() points to some static data without a lifetime. The trick for now, was to allocate a device resource managed buffer which is then returned. This will only work if we have an actual device. Change it, so that the caller of of_get_mac_address() has to supply a buffer where the MAC address is written to. Unfortunately, this will touch all drivers which use the of_get_mac_address(). Usually the code looks like: const char *addr; addr = of_get_mac_address(np); if (!IS_ERR(addr)) ether_addr_copy(ndev->dev_addr, addr); This can then be simply rewritten as: of_get_mac_address(np, ndev->dev_addr); Sometimes is_valid_ether_addr() is used to test the MAC address. of_get_mac_address() already makes sure, it just returns a valid MAC address. Thus we can just test its return code. But we have to be careful if there are still other sources for the MAC address before the of_get_mac_address(). In this case we have to keep the is_valid_ether_addr() call. The following coccinelle patch was used to convert common cases to the new style. Afterwards, I've manually gone over the drivers and fixed the return code variable: either used a new one or if one was already available use that. Mansour Moufid, thanks for that coccinelle patch! <spml> @a@ identifier x; expression y, z; @@ - x = of_get_mac_address(y); + x = of_get_mac_address(y, z); <... - ether_addr_copy(z, x); ...> @@ identifier a.x; @@ - if (<+... x ...+>) {} @@ identifier a.x; @@ if (<+... x ...+>) { ... } - else {} @@ identifier a.x; expression e; @@ - if (<+... x ...+>@e) - {} - else + if (!(e)) {...} @@ expression x, y, z; @@ - x = of_get_mac_address(y, z); + of_get_mac_address(y, z); ... when != x </spml> All drivers, except drivers/net/ethernet/aeroflex/greth.c, were compile-time tested. Suggested-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Michael Walle <michael@walle.cc> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
David S. Miller <davem@davemloft.net>
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- Apr 12, 2021
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Nicolas Ferre authored
Fix the etm node hex address to lower case for matching regexp specification and removing the additional warning that looks like: arch/arm/boot/dts/at91-sama5d2_ptc_ek.dt.yaml: /: 'etm@73C000' does not match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+' Reported-by:
Arnd Bergmann <arnd@kernel.org> Signed-off-by:
Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Apr 11, 2021
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Heiko Stuebner authored
As suggested by Arnd Bergmann, mmc-aliases are supposed to be board-specific, so move the newly added general aliases to the board-level on rv1108-based boards. Suggested-by:
Arnd Bergmann <arnd@kernel.org> Signed-off-by:
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-2-heiko@sntech.de
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Heiko Stuebner authored
As suggested by Arnd Bergmann, mmc-aliases are supposed to be board-specific, so move the newly added general aliases to the board-level on rk322x-based boards. Suggested-by:
Arnd Bergmann <arnd@kernel.org> Signed-off-by:
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20210324122235.1059292-1-heiko@sntech.de
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- Apr 09, 2021
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Arnd Bergmann authored
The kernelci.org bot reports a build time regression: arch/arm/boot/dts/ep7209.dtsi:187.17-192.4: Warning (interrupts_property): /keypad: Missing interrupt-parent There is only one interrupt controller in this SoC, so I assume this is the parent. Fixes: 2bd86203 ("ARM: dts: clps711x: Add keypad node") Reported-by:
kernelci.org bot <bot@kernelci.org> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
dtc warns about a mismatched address: arch/arm/boot/dts/armada-385-atl-x530.dts:171.14-199.4: Warning (spi_bus_reg): /soc/spi@10680/spi-flash@0: SPI bus unit address format error, expected "1" I assume the "reg" property is correct here, so adjust the unit address accordingly. Fixes: c6dfc019 ("ARM: dts: mvebu: Add device tree for ATL-x530 Board") Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Reported-by:
kernelci.org bot <bot@kernelci.org> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Joel Stanley authored
This is a newly added ARM926 platform that is not covered by any other defconfigs. Signed-off-by:
Joel Stanley <joel@jms.id.au> Link: https://lore.kernel.org/r/20210409054511.1534181-1-joel@jms.id.au
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