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  1. Jan 30, 2009
  2. Jan 27, 2009
  3. Jan 25, 2009
    • Ingo Molnar's avatar
      x86: use standard PIT frequency · e1b4d114
      Ingo Molnar authored
      
      
      the RDC and ELAN platforms use slighly different PIT clocks, resulting in
      a timex.h hack that changes PIT_TICK_RATE during build time. But if a
      tester enables any of these platform support .config options, the PIT
      will be miscalibrated on standard PC platforms.
      
      So use one frequency - in a subsequent patch we'll add a quirk to allow
      x86 platforms to define different PIT frequencies.
      
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      e1b4d114
  4. Jan 23, 2009
    • Peter Zijlstra's avatar
      x86, mm: fix pte_free() · 42ef73fe
      Peter Zijlstra authored
      
      
      On -rt we were seeing spurious bad page states like:
      
      Bad page state in process 'firefox'
      page:c1bc2380 flags:0x40000000 mapping:c1bc2390 mapcount:0 count:0
      Trying to fix it up, but a reboot is needed
      Backtrace:
      Pid: 503, comm: firefox Not tainted 2.6.26.8-rt13 #3
      [<c043d0f3>] ? printk+0x14/0x19
      [<c0272d4e>] bad_page+0x4e/0x79
      [<c0273831>] free_hot_cold_page+0x5b/0x1d3
      [<c02739f6>] free_hot_page+0xf/0x11
      [<c0273a18>] __free_pages+0x20/0x2b
      [<c027d170>] __pte_alloc+0x87/0x91
      [<c027d25e>] handle_mm_fault+0xe4/0x733
      [<c043f680>] ? rt_mutex_down_read_trylock+0x57/0x63
      [<c043f680>] ? rt_mutex_down_read_trylock+0x57/0x63
      [<c0218875>] do_page_fault+0x36f/0x88a
      
      This is the case where a concurrent fault already installed the PTE and
      we get to free the newly allocated one.
      
      This is due to pgtable_page_ctor() doing the spin_lock_init(&page->ptl)
      which is overlaid with the {private, mapping} struct.
      
      union {
          struct {
              unsigned long private;
              struct address_space *mapping;
          };
          spinlock_t ptl;
          struct kmem_cache *slab;
          struct page *first_page;
      };
      
      Normally the spinlock is small enough to not stomp on page->mapping, but
      PREEMPT_RT=y has huge 'spin'locks.
      
      But lockdep kernels should also be able to trigger this splat, as the
      lock tracking code grows the spinlock to cover page->mapping.
      
      The obvious fix is calling pgtable_page_dtor() like the regular pte free
      path __pte_free_tlb() does.
      
      It seems all architectures except x86 and nm10300 already do this, and
      nm10300 doesn't seem to use pgtable_page_ctor(), which suggests it
      doesn't do SMP or simply doesnt do MMU at all or something.
      
      Signed-off-by: default avatarPeter Zijlstra <a.p.zijlsta@chello.nl>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      Cc: <stable@kernel.org>
      42ef73fe
    • Brian Gerst's avatar
      x86: make irq_cpustat_t fields conditional · 2de3a5f7
      Brian Gerst authored
      
      
      Impact: shrink size of irq_cpustat_t when possible
      
      Signed-off-by: default avatarBrian Gerst <brgerst@gmail.com>
      Signed-off-by: default avatarTejun Heo <tj@kernel.org>
      2de3a5f7
    • Brian Gerst's avatar
      x86: merge hardirq_{32,64}.h into hardirq.h · 22da7b3d
      Brian Gerst authored
      
      
      Impact: cleanup
      
      Signed-off-by: default avatarBrian Gerst <brgerst@gmail.com>
      Signed-off-by: default avatarTejun Heo <tj@kernel.org>
      22da7b3d
    • Brian Gerst's avatar
      x86: sync hardirq_{32,64}.h · 658a9a2c
      Brian Gerst authored
      
      
      Impact: better code generation and removal of unused field for 32bit
      
      In general, use the 64-bit version.
      
      Signed-off-by: default avatarBrian Gerst <brgerst@gmail.com>
      Signed-off-by: default avatarTejun Heo <tj@kernel.org>
      658a9a2c
    • Brian Gerst's avatar
      x86: remove include of apic.h from hardirq_64.h · 3819cd48
      Brian Gerst authored
      
      
      Impact: cleanup
      
      APIC definitions aren't needed here.  Remove the include and fix
      up the fallout.
      
      tj: added include to mce_intel_64.c.
      
      Signed-off-by: default avatarBrian Gerst <brgerst@gmail.com>
      Signed-off-by: default avatarTejun Heo <tj@kernel.org>
      3819cd48
    • Brian Gerst's avatar
      x86: remove idle_timestamp from 32bit irq_cpustat_t · 03d2989d
      Brian Gerst authored
      
      
      Impact: bogus irq_cpustat field removed
      
      idle_timestamp is left over from the removed irqbalance code.
      
      Signed-off-by: default avatarBrian Gerst <brgerst@gmail.com>
      Signed-off-by: default avatarTejun Heo <tj@kernel.org>
      03d2989d
  5. Jan 22, 2009
  6. Jan 21, 2009
    • H. Peter Anvin's avatar
      x86: add MSR_IA32_MISC_ENABLE bits to <asm/msr-index.h> · bdf21a49
      H. Peter Anvin authored
      
      
      Impact: None (new bit definitions currently unused)
      
      Add bit definitions for the MSR_IA32_MISC_ENABLE MSRs to
      <asm/msr-index.h>.
      
      Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
      bdf21a49
    • Nicholas Piggin's avatar
      x86: make UV support configurable · 03b48632
      Nicholas Piggin authored
      
      
      Make X86 SGI Ultraviolet support configurable. Saves about 13K of text size
      on my modest config.
      
         text    data     bss     dec     hex filename
      6770537 1158680  694356 8623573  8395d5 vmlinux
      6757492 1157664  694228 8609384  835e68 vmlinux.nouv
      
      Signed-off-by: default avatarNick Piggin <npiggin@suse.de>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      03b48632
    • Ingo Molnar's avatar
      Revert "x86: signal: change type of paramter for sys_rt_sigreturn()" · 552b8aa4
      Ingo Molnar authored
      This reverts commit 4217458d.
      
      Justin Madru bisected this commit, it was causing weird Firefox
      crashes.
      
      The reason is that GCC mis-optimizes (re-uses) the on-stack parameters of
      the calling frame, which corrupts the syscall return pt_regs state and
      thus corrupts user-space register state.
      
      So we go back to the slightly less clean but more optimization-safe
      method of getting to pt_regs. Also add a comment to explain this.
      
      Resolves: http://bugzilla.kernel.org/show_bug.cgi?id=12505
      
      
      
      Reported-and-bisected-by: default avatarJustin Madru <jdm64@gawab.com>
      Tested-by: default avatarJustin Madru <jdm64@gawab.com>
      Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
      552b8aa4
    • Tejun Heo's avatar
      x86: make x86_32 use tlb_64.c · 02cf94c3
      Tejun Heo authored
      
      
      Impact: less contention when issuing invalidate IPI, cleanup
      
      Make x86_32 use the same tlb code as 64bit.  The 64bit code uses
      multiple IPI vectors for tlb shootdown to reduce contention.  This
      patch makes x86_32 allocate the same 8 IPIs as x86_64 and share the
      code paths.
      
      Note that the usage of asmlinkage is inconsistent for x86_32 and 64
      and calls for further cleanup.  This has been noted with a FIXME
      comment in tlb_64.c.
      
      Signed-off-by: default avatarTejun Heo <tj@kernel.org>
      02cf94c3
    • Tejun Heo's avatar
      x86: prepare for tlb merge · 6dd01bed
      Tejun Heo authored
      
      
      Impact: clean up, ipi vector number reordering for x86_32
      
      Make the following changes to prepare for tlb merge.
      
      * reorder x86_32 ip vectors
      
      * adjust tlb_32.c and tlb_64.c such that their logics coincide exactly
      	- on spurious invalidate ipi, tlb_32 acks the irq
      	- tlb_64 now has proper memory barriers around clearing
                flush_cpumask (no change in generated code)
      
      * unexport flush_tlb_page from tlb_32.c, there's no user
      
      * use unsigned int for cpu id
      
      * drop unnecessary includes from tlb_64.c
      
      Signed-off-by: default avatarTejun Heo <tj@kernel.org>
      6dd01bed
    • Tejun Heo's avatar
      x86: uv cleanup · bdbcdd48
      Tejun Heo authored
      
      
      Impact: cleanup
      
      Make the following uv related cleanups.
      
      * collect visible uv related definitions and interfaces into uv/uv.h
        and use it.  this cleans up the messy situation where on 64bit, uv
        is defined properly, on 32bit generic it's dummy and on the rest
        undefined.  after this clean up, uv is defined on 64 and dummy on
        32.
      
      * update uv_flush_tlb_others() such that it takes cpumask of
        to-be-flushed cpus as argument, instead of that minus self, and
        returns yet-to-be-flushed cpumask, instead of modifying the passed
        in parameter.  this interface change will ease dummy implementation
        of uv_flush_tlb_others() and makes uv tlb flush related stuff
        defined in tlb_uv proper.
      
      Signed-off-by: default avatarTejun Heo <tj@kernel.org>
      bdbcdd48
    • Brian Gerst's avatar
      x86: merge irq_regs.h · d650a514
      Brian Gerst authored
      
      
      Impact: cleanup, better irq_regs code generation for x86_64
      
      Make 64-bit use the same optimizations as 32-bit.
      
      Signed-off-by: default avatarBrian Gerst <brgerst@gmail.com>
      Signed-off-by: default avatarTejun Heo <tj@kernel.org>
      d650a514
    • Brian Gerst's avatar
      x86: merge mmu_context.h · 6826c8ff
      Brian Gerst authored
      
      
      Impact: cleanup
      
      tj: * changed cpu to unsigned as was done on mmu_context_64.h as cpu
            id is officially unsigned int
          * added missing ';' to 32bit version of deactivate_mm()
      
      Signed-off-by: default avatarBrian Gerst <brgerst@gmail.com>
      Signed-off-by: default avatarTejun Heo <tj@kernel.org>
      6826c8ff
    • Brian Gerst's avatar
      x86: fix percpu_write with 64-bit constants · 299e2699
      Brian Gerst authored
      
      
      Impact: slightly better code generation for percpu_to_op()
      
      The processor will sign-extend 32-bit immediate values in 64-bit
      operations.  Use the 'e' constraint ("32-bit signed integer constant,
      or a symbolic reference known to fit that range") for 64-bit constants.
      
      Signed-off-by: default avatarBrian Gerst <brgerst@gmail.com>
      Signed-off-by: default avatarTejun Heo <tj@kernel.org>
      299e2699
    • Tejun Heo's avatar
      x86: update canary handling during switch · 67e68bde
      Tejun Heo authored
      
      
      Impact: cleanup
      
      In switch_to(), instead of taking offset to irq_stack_union.stack,
      make it a proper percpu access using __percpu_arg() and per_cpu_var().
      
      Signed-off-by: default avatarTejun Heo <tj@kernel.org>
      67e68bde
  7. Jan 20, 2009
  8. Jan 18, 2009
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