- Jan 17, 2014
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Tero Kristo authored
AM35xx now uses the clock data from device tree. Most of the data is shared with OMAP3xxx, but as there is some delta, a new base .dtsi file is also created for the SoC. Signed-off-by:
Tero Kristo <t-kristo@ti.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Mike Turquette <mturquette@linaro.org>
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Tero Kristo authored
This patch creates a unique node for each clock in the OMAP3 power, reset and clock manager (PRCM). Signed-off-by:
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Tero Kristo authored
This patch creates a unique node for each clock in the AM33xx power, reset and clock manager (PRCM). Signed-off-by:
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J Keerthy authored
This patch adds optfclk_pciephy_clk and optfclk_pciephy_div_clk which are used by PCIe phy. It also adds a mux clock to choose the source of optfclk_pciephy_div_clk clock. Signed-off-by:
J Keerthy <j-keerthy@ti.com> Signed-off-by:
Nishanth Menon <nm@ti.com> Acked-by:
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J Keerthy authored
This patch changes apll_pcie_m2_ck to fixed factor clock as there are no configurable divider associated to m2. Signed-off-by:
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J Keerthy authored
The patch adds a mux node to choose the parent of apll_pcie_ck node. Signed-off-by:
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Tero Kristo authored
This patch creates a unique node for each clock in the DRA7 power, reset and clock manager (PRCM). TODO: apll_pcie clock node is still a dummy in this version, and proper support for the APLL should be added. Signed-off-by:
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Tero Kristo authored
This patch creates a unique node for each clock in the OMAP5 power, reset and clock manager (PRCM). Signed-off-by:
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Tero Kristo authored
This patch creates a unique node for each clock in the OMAP4 power, reset and clock manager (PRCM). OMAP443x and OMAP446x have slightly different clock tree which is taken into account in the data. Signed-off-by:
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- Jan 08, 2014
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Tomasz Figa authored
This patch adds a label and #clock-cells property to device node of max77686 PMIC to allow using it as a clock provider. Signed-off-by:
Tomasz Figa <t.figa@samsung.com> Acked-by:
Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by:
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Andrew Bresticker authored
Specify the remaining input clocks (pll_ref, pll_in, and sclk_pcm_in) for the AudioSS clock controller. Signed-off-by:
Andrew Bresticker <abrestic@chromium.org> Acked-by:
Kukjin Kim <kgene.kim@samsung.com> Signed-off-by:
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Andrew Bresticker authored
Specify pll_ref, pll_in, sclk_audio, and sclk_pcm_in for the AudioSS clock controller. Signed-off-by:
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- Dec 30, 2013
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Abhilash Kesavan authored
Due to incorrect clock specified in MDMA0 node, using MDMA0 controller could cause system failures, due to wrong clock being controlled. This patch fixes this by specifying correct clock. Signed-off-by:
Abhilash Kesavan <a.kesavan@samsung.com> Acked-by:
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- Dec 19, 2013
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Ben Dooks authored
The r8a7790.dtsi file has four sdhi nodes which the first two have the wrong resource size for their register block. This causes the sh_modbile_sdhi driver to fail to communicate with card at-all. Change sdhi{0,1} node size from 0x100 to 0x200 to correct these nodes as per Kuninori Morimoto's response to the original patch where all four nodes where changed. sdhi{2,3} are the correct size. This bug has been present since sdhi resources were added to the r8a7790 by 8c9b1aa4 ("ARM: shmobile: r8a7790: add MMCIF and SDHI DT templates") in v3.11-rc2. Signed-off-by:Ben Dooks <ben.dooks@codethink.co.uk> Tested-by:
William Towle <william.towle@codethink.co.uk> Acked-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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- Dec 12, 2013
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Maxime Ripard authored
The Allwinner A31 uses the ARM GIC as its internal interrupts controller. The GIC can work on several interrupt triggers, and the A31 was actually setting it up to use a rising edge as a trigger, while it was actually a level high trigger, leading to some interrupts that would be completely ignored if the edge was missed. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by:
Hans de Goede <hdegoede@redhat.com> Cc: stable@vger.kernel.org # 3.12+ Signed-off-by:
Olof Johansson <olof@lixom.net>
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Maxime Ripard authored
The Allwinner A20 uses the ARM GIC as its internal interrupts controller. The GIC can work on several interrupt triggers, and the A20 was actually setting it up to use a rising edge as a trigger, while it was actually a level high trigger, leading to some interrupts that would be completely ignored if the edge was missed. Signed-off-by:
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- Dec 06, 2013
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Tony Lindgren authored
Commit 7ce93f31 (ARM: OMAP2+: Fix more missing data for omap3.dtsi file) fixed missing device tree data for omaps, but did not account for some of the hardware modules being inaccessible for secure omaps. This causes the following error on secure omaps: Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa0c5048 SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 3.13.0-rc2+ #446 task: ce057b40 ti: ce058000 task.ti: ce058000 PC is at omap_aes_dma_stop+0x24/0x3c LR is at omap_aes_probe+0x1cc/0x584 psr: 60000113 sp : ce059e20 ip : ce0b4ee0 fp : 00000000 r10: c0573ae8 r9 : c0749508 r8 : 00000000 r7 : ce0b4e00 r6 : 00000000 r5 : ce0b4e10 r4 : ce274890 r3 : fa0c5048 r2 : 00000048 r1 : 0000002c r0 : ce274890 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c5387d Table: 80004019 DAC: 00000015 Process swapper/0 (pid: 1, stack limit = 0xce058248) Stack: (0xce059e20 to 0xce05a000) 9e20: c0749508 0000a1ff 00000000 c016cd8c c06b5a06 ce2a45f0 ce2a4570 ce0b5fb0 9e40: 00000000 480c5000 480c504f c0abe4e4 00000200 00000000 00000000 00000000 9e60: ce0b4e10 ce0b4e10 c082da3c c082da3c c02b8c70 c077c610 c0749508 00000000 9e80: 00000000 c02b9e7c c02b9e64 ce0b4e10 00000000 c02b8b20 ce0b4e10 ce0b4e44 9ea0: c082da3c c02b8cd8 00000000 ce059eb8 c082da3c c02b7408 ce079edc ce0b1a34 9ec0: c082da3c c082da3c ce2a0280 00000000 c08158d8 c02b8358 c0663405 c0663405 9ee0: 00000073 c082da3c c079e4e8 c07ab3bc c0844340 c02b9334 00000000 00000006 9f00: c079e4e8 c0008920 c067f6bf c0ac7c6b 00000000 c0712e28 00000000 00000000 9f20: c0712e38 ce059f38 00000093 c0ac7c82 00000000 c0058994 00000000 c07130e8 9f40: c07127b8 00000093 00000006 00000006 00000001 00000006 00000006 c079e4e8 9f60: c07ab3bc c0844340 00000093 c0749508 c079e4f4 c0749c64 00000006 00000006 9f80: c0749508 00000000 00000000 c0517e2c 00000000 00000000 00000000 00000000 9fa0: 00000000 c0517e34 00000000 c000dfb8 00000000 00000000 00000000 00000000 9fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 9fe0: 00000000 00000000 00000000 00000000 00000013 00000000 ffffffff ffffffff (omap_aes_probe+0x1cc/0x584) (platform_drv_probe+0x18/0x48) (driver_probe_device+0xb0/0x200) (__driver_attach+0x68/0x8c) (bus_for_each_dev+0x50/0x88) (bus_add_driver+0xcc/0x1c8) (driver_register+0x9c/0xe0) (do_one_initcall+0x98/0x140) (kernel_init_freeable+0x16c/0x23c) (kernel_init+0x8/0x100) (ret_from_fork+0x14/0x3c) Code: e1811002 e5932020 e590300c e0833002 (e593c000) Let's fix the issue by adding omap34xx-hs.dtsi and omap36xx-hs.dtsi and make n900, n9 and n950 to use them. This way we have the aes, sham and timer12 disabled for secure devices the same way legacy booting does based on the omap34xx_gp_hwmod_ocp_ifs and omap36xx_gp_hwmod_ocp_ifs arrays in omap_hwmod_3xxx_data.c. Reported-by:
Sebastian Reichel <sre@debian.org> Acked-By:
Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by:
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Nishanth Menon authored
The am3517 is wrongly booting as omap3 which means that the am3517 specific devices like Ethernet won't work when booted with device tree. Now with the new devices defined in am3517.dtsi, let's use that instead of the omap3.dtsi, and add a separate machine entry for am3517 so am3517-evm can use it. Signed-off-by:
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Tony Lindgren authored
On am3517 there are some extra devices compared to omap3.dtsi that we currently have not defined. Let's fix that by adding am3517.dtsi file. Signed-off-by:
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- Dec 03, 2013
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Dinh Nguyen authored
Some of the clocks that were designated gate-clk do not have a gate, so change those clocks to be of periph-clk type. Signed-off-by:
Dinh Nguyen <dinguyen@altera.com> Signed-off-by:
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- Dec 02, 2013
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Florian Vaussard authored
drivers/net/ethernet/smsc/smsc911x.c is expecting supplies named "vdd33a" and "vddvario". Currently the shared DTS file provides "vmmc" and "vmmc_aux", and the supply lookup will fail: smsc911x 2c000000.ethernet: Looking up vdd33a-supply from device tree smsc911x 2c000000.ethernet: Looking up vdd33a-supply property in node /ocp/gpmc@6e000000/ethernet@gpmc failed smsc911x 2c000000.ethernet: Looking up vddvario-supply from device tree smsc911x 2c000000.ethernet: Looking up vddvario-supply property in node /ocp/gpmc@6e000000/ethernet@gpmc failed Fix it! Looks like commmit 6b2978ac (ARM: dts: Shared file for omap GPMC connected smsc911x) made the problem more visible by moving the smc911x configuration from the omap3-igep0020.dts file to the generic file. But it seems we've had this problem since commit d72b4415 (ARM: dts: omap3-igep0020: Add SMSC911x LAN chip support). Tested on OMAP3 Overo platform. Signed-off-by:
Florian Vaussard <florian.vaussard@epfl.ch> [tony@atomide.com: updated comments for the commits causing the problem] Signed-off-by:
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Jarkko Nikula authored
This adds typical McBSP2-TWL4030 audio description to the legacy Beagle Board. Signed-off-by:
Jarkko Nikula <jarkko.nikula@bitmer.com> Signed-off-by:
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Balaji T K authored
Mux mode for wlan/sdmmc5 should be MODE0 in pinmux_wl12xx_pins and Enable Pull up on sdmmc5_clk to detect SDIO card. This fixes WLAN on omap4-sdp that got broken in v3.10 when we moved omap4 to boot using device tree only as I did not have the WL12XX card in my omap4 SDP to test with. The commit that attempted to make WL12XX working on omap4 SDP was 775d2418 (ARM: dts: Fix muxing and regulator for wl12xx on the SDIO bus for blaze). Signed-off-by:
Balaji T K <balajitk@ti.com> [tony@atomide.com: updated comments for the regression] Signed-off-by:
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Balaji T K authored
pin mux wl12xx_gpio and wl12xx_pins should be part of omap4_pmx_core and not omap4_pmx_wkup. So, move wl12xx_* to omap4_pmx_core. Fix the following error message: pinctrl-single 4a31e040.pinmux: mux offset out of range: 0x38 (0x38) pinctrl-single 4a31e040.pinmux: could not add functions for pinmux_wl12xx_pins 56x SDIO card is not detected after moving pin mux to omap4_pmx_core since sdmmc5_clk pull is disabled. Enable Pull up on sdmmc5_clk to detect SDIO card. This fixes a regression where WLAN did not work after a warm reset or after one up/down cycle that happened when we move omap4 to boot using device tree only. For reference, the kernel bug is described at: https://bugzilla.kernel.org/show_bug.cgi?id=63821 Cc: stable@vger.kernel.org # v3.10+ Signed-off-by:
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Nicolas Ferre authored
Alias was missing for SoC of the at91sam9x5 familly that embed USART3. Reported-by:
Jiri Prchal <jiri.prchal@aksignal.cz> [b.brezillon@overkiz.com: advised to place changes in at91sam9x5_usart3.dtsi] Acked-by:
Boris BREZILLON <b.brezillon@overkiz.com> Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com>
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- Nov 28, 2013
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Magnus Damm authored
The r8a7790 GPIO resources are currently incorrect. Fix that by making them match the English r8a7790 v0.6 data sheet. Tested with GPIO LED using Lager DT reference. This problem has been present since GPIOs were added to the r8a7790 SoC by f98e10c8 ("ARM: shmobile: r8a7790: Add GPIO controller devices to device tree") in v3.12-rc1. Signed-off-by:
Magnus Damm <damm@opensource.se> Acked-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
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- Nov 26, 2013
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Roger Quadros authored
Beagle (rev. C4) and Beagle-XM (all revs) need VAUX2 1.8V supply for the USB PHY. As the generic PHY driver can't handle more than one supply at the moment, we configure this supply to be always on. This will cause a very small power impact if the USB host subsystem is not in use, about 76.86 micro-W + LDO power. Older Beagle boards (prior to C4) don't have VAUX2 connected anywhere, so there won't be any functional impact on those boards other than some additional LDO power consumption. Reported-by:
Roger Quadros <rogerq@ti.com> Signed-off-by:
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Javier Martinez Canillas authored
On Device Tree boot the VDDS_DSI regulator is not linked to the DPI device so omapfb driver probing fails with: [ 3.186035] OMAPFB: omapfb_probe [ 3.190704] omapdss DPI error: can't get VDDS_DSI regulator [ 3.196594] omapfb omapfb: failed to connect default display [ 3.202667] omapfb omapfb: failed to init overlay connections [ 3.208892] OMAPFB: free_resources [ 3.212493] OMAPFB: free all fbmem [ 3.216735] omapfb omapfb: failed to setup omapfb As a workaround name the VPLL2 regulator from twl4030 as vdds_dsi so getting the VDDS_DSI regulator will succeed on dpi_init_regulator(). Signed-off-by:
Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by:
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Enric Balletbo i Serra authored
Add node to support the USB Host and the USB OTG on the IGEP AQUILA Processor Board. Signed-off-by:
Enric Balletbo i Serra <eballetbo@iseebcn.com> Signed-off-by:
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Enric Balletbo i Serra authored
The IGEP AQUILA EXPANSION has a 32KBit EEPROM for user data storage. Signed-off-by:
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Enric Balletbo i Serra authored
Enable the user leds on the IGEP AQUILA EXPANSION. The has two leds, one green and one red, that are controllable by software. Signed-off-by:
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Enric Balletbo i Serra authored
Enable the hdmi output and the LCD Controller on IGEP AQUILA. Also configure the correct pinmux for output of video data from the SoC to the HDMI encoder. Signed-off-by:
Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by:
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Javier Martinez Canillas authored
The IGEPv2 has a TFP410 DPI-to-DVI encoder attached to OMAP's Display SubSystem (DSS). Add mux setup for DSS pins and also for the GPIO 170 pin that is used to ensure that the DVI-D is powered down on power up. Signed-off-by:
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Javier Martinez Canillas authored
Add pin muxing support for IGEP boards i2c controllers. Signed-off-by:
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Enric Balletbo i Serra authored
Most of the boards are using the TI AM/DM37x processor, there is only a small quantity of IGEP Processor Boards based on TI OMAP3530. So it's better use the omap36xx.dtsi include instead of omap34xx.dtsi include. We can add support for the 34xx based variant later on as needed. To avoid confusion we have added to the model the (TI AM/DM37x) comment. Signed-off-by:
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Enric Balletbo i Serra authored
The LBEE1USJYC is a WiFi/BT combo module used on OMAP3-based IGEP boards. In both cases, IGEPv2 Rev. C and IGEP COM MODULE, the module is connected using the same MMC interface and uses the same GPIOs. Signed-off-by:
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Enric Balletbo i Serra authored
Both, IGEPv2 and IGEP COM MODULE have a bus-width of 4 not 8, so fix this and do not mux data pins from mmc1_data4 to mmc1_data7. Signed-off-by:
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Stephen Warren authored
The I2C controller node needs #address-cells and #size-cells properties, but these are currently missing. Add them. This allows child nodes to be parsed correctly. Cc: stable@vger.kernel.org Signed-off-by:
Stephen Warren <swarren@wwwdotorg.org> Signed-off-by:
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- Nov 25, 2013
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Doug Anderson authored
Without the interrupt you'll get problems if you enable CONFIG_RTC_DRV_MAX77686. Setup the interrupt properly in the device tree. Signed-off-by:
Doug Anderson <dianders@chromium.org> Tested-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
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Tony Lindgren authored
Looks like we need to configure the regulators and use the pdata quirk to make eMMC work with device tree. It seems that mostly vaux3 is used, and only some earlier revisions used vmmc2. This has been tested to work on devices where the system_rev passed by the bootloader has versions 0x0010, 0x2101 and 0x2204. Cc: devicetree@vger.kernel.org Cc: Pavel Machek <pavel@ucw.cz> Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by:
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