Registering the twl6030-usb transceiver device as a child to twl6030 core.
Removed the NOP transceiver init call from board file.

Populated twl4030_usb_data platform data structure with the function
pointers for OMAP4430 internal PHY operation to be used by twl630-usb driver.

Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

Selecting the twl6030-usb for OMAP4430SDP and OMAP4PANDA boards and
adding OMAP4 internal phy code for compilation

Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

Adding the twl6030-usb transceiver support for OMAP4 musb driver.

OMAP4 supports 2 types of transceiver interface.

1. UTMI: The PHY is embedded within OMAP4. The transceiver functionality
is split between the twl6030 PMIC chip and OMAP4430. The VBUS, ID pin
sensing and OTG SRP generation part is integrated in TWL6030 and UTMI PHY
functionality is embedded within the OMAP4430.

There is no direct interactions between the MUSB controller and TWL6030
chip to communicate the session-valid, session-end and ID-GND events.
It has to be done through a software by setting/resetting bits in
one of the control module register of OMAP4430 which in turn toggles
the appropriate signals to MUSB controller.

The internal transceiver has functional clocks and
powerdown bits to powerdown the PHY for power saving.

Since there is no option available for having 2 transceiver drivers
for one USB controller, internal PHY specific APIs are passed through
plaform_data function pointers to use in the twl6030-usb transceiver
driver.

2. ULPI interface is provided for off-chip transceivers.

Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Felipe Balbi <balbi@ti.com>

commit 4814ced5 (OMAP:
control: move plat-omap/control.h to mach-omap2/control.h)
moved <plat/control.h> to another location, preventing
drivers from accessing it, so we need to pass function
pointers from arch code to be able to talk to internal
PHY on AM35x.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

Let musb work on 4430sdp as well. We can now
test any problems with multi-omap builds.

Signed-off-by: Felipe Balbi <balbi@ti.com>

musb core doesn't need to know about platform
specific details. So start moving clock
handling to platform glue layer and make
musb core agnostic about that.

Signed-off-by: Felipe Balbi <balbi@ti.com>

Just adding its own platform_driver, not really
using it yet.

When all HW glue layers are converted, more patches
will come to split power management code from musb_core
and move it completely to HW glue layer.

Signed-off-by: Felipe Balbi <balbi@ti.com>

Just adding its own platform_driver, not really
using it yet.

When all HW glue layers are converted, more patches
will come to split power management code from musb_core
and move it completely to HW glue layer.

Signed-off-by: Felipe Balbi <balbi@ti.com>

Just adding its own platform_driver, not really
using it yet.

When all HW glue layers are converted, more patches
will come to split power management code from musb_core
and move it completely to HW glue layer.

Signed-off-by: Felipe Balbi <balbi@ti.com>

change all ocurrences of musb_hdrc to musb-hdrc.

We will call glue layer drivers musb-<glue layer>,
so in order to keep things somewhat standard, let's
change the underscore into a dash.

Signed-off-by: Felipe Balbi <balbi@ti.com>

This will make things simpler when choosing which
glue layer to compile. It avoids a lot of magic
around the "default" Kconfig option and lets the
user choose what exactly s/he wants to compile.

Signed-off-by: Felipe Balbi <balbi@ti.com>

initialize the musb port on pandaboard.

Signed-off-by: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

Soon resource data will get automatically
populated from a set of autogenerated data
from TI's hardware database for the OMAP
platform.

Such database, might not have resources at
the expected order by the current drivers.

While we could hack in some exceptions to
that tool to generate resources in a specific
order, it seems less fragile to use the
resource name instead. That way, no matter
what order the resources are generated, the
driver still work.

Modified the OMAP, Blackfin and Davinci
architecture files to add the name of the IRQs
in the resource structures and musb driver to
use the platform_get_irq_byname() api to get
the device and dma irq numbers instead of using
the index.

Cc: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Hema HK <hemahk@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

The OMAP4 SDP has an SMSC3320 PHY hooked up to EHCI on Port1.
The PHY power is controlled by GPIO 157.

Turn on the PHY power, and register the controller at init.

Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>

The OMAP4 has an on-chip EHCI controller. Select USB_ARCH_HAS_EHCI
to allow the EHCI driver to be built on OMAP4.

Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>

- Add platform init code for EHCI on OMAP4
- Add pad configuration for PHY and TLL modes

Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>

Add clkdev aliases for the USBHOST and USBTLL clocks on OMAP3 and
OMAP4, so that the driver can refer to the clocks using a common alias.

This will disappear when the driver is converted to use the hwmod
database, but until then this patch is needed.

Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Tony Lindgren <tony@atomide.com>

For MMC1 Controller, card detect interrupt source is
twl6030 which is non-gpio. The card detect call back function provides
card present/absent status by reading MMC Control register present
on twl6030. This functionality was introduced in mfd tree on
track to kernel.org

Sync pandaboard to the same and make mmc work.

Cc: Tony Lindgren <tony@atomide.com>
Cc: Madhusudhan Chikkature <madhu.cr@ti.com>
Cc: Adrian Hunter <adrian.hunter@nokia.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>

Acked-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Madhusudhan Chikkature <madhu.cr@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

Adding card detect callback function and card detect configuration
function for MMC1 Controller on OMAP4.

Card detect configuration function does initial configuration of the
MMC Control & PullUp-PullDown registers of Phoenix.

For MMC1 Controller, card detect interrupt source is
twl6030 which is non-gpio. The card detect call back function provides
card present/absent status by reading MMC Control register present
on twl6030.

Since OMAP4 doesn't use any GPIO line as used in OMAP3 for card detect,
the suspend/resume initialization which was done in omap_hsmmc_gpio_init
previously is moved to the probe thus making it generic for both OMAP3 &
OMAP4.

Cc: Tony Lindgren <tony@atomide.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Madhusudhan Chikkature <madhu.cr@ti.com>
Cc: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

The machine_kexec() calls outer_disable which can crash on OMAP4
becasue of trustzone restrictions.

This patch overrides the default l2x0_disable with a OMAP4
specific implementation taking care of trustzone

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>

Commit ab69bcd6 (arm: remove
machine_desc.io_pg_offst and .phys_io) could not update
the new boards in the omap tree. This causes the build of
omap2plus_defconfig to fail. Fix this.

Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: Eric Miao <eric.miao at canonical.com>
[tony@atomide.com: updated description]
Signed-off-by: Tony Lindgren <tony@atomide.com>

On OMAP24xx, UART2 WKEN and WKST registers are in PM_WKEN2_CORE and
PM_WKST2_CORE respecitvely.  Fix the OMAP2 register init to use the
correct registers on OMAP24xx.

Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

AM35x has musb interface (version 1.8) and uses CPPI41 DMA engine.
It has USB phy built inside the IP itself.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

Since we're now using addruart to establish the debug mapping, we can
remove the io_pg_offst and phys_io members of struct machine_desc.

The various declarations were removed using the following script:

  grep -rl MACHINE_START arch/arm | xargs \
  sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }'

[ Initial patch was from Jeremy Kerr, example script from Russell King ]

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: Eric Miao <eric.miao at canonical.com>

Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros to
return both physical and virtual addresses. The main debug code can then
select the appropriate address to use.

This will also allow us to retreive the address of a uart for the MMU
state that we're not current in.

Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com>
and Tony Lindgren <tony@atomide.com>, and fix for versatile express from
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>.

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>

The omap2plus_defconfig doesn't boot up when built with CONFIG_PM
disabled on the latest linux-omap master. Below are the observations
1. OMAP3 reboots in the middle of boot
--------------------------------------------------
[    0.000000] Calibrating delay loop... 494.72 BogoMIPS (lpj=1933312)
[    0.000000] pid_max: default: 32768 minimum: 301
[    0.000000] Security Framework initialized
[    0.000000] Mount-cache hash table entries: 512
[    0.000000] CPU: Testing write buffer coherency: ok
[    0.000000] Brought up 1 CPUs
[    0.000000] SMP: Total of 1 processors activated (494.72 BogoMIPS).
[    0.000000] regulator: core version 0.5
[    0.000000] NET: Registered protocol family 16

U-Boot 1.1.4 (Feb 11 2009 - 16:10:23)

OMAP3430-GP rev 2, CPU-OPP2 L3-165MHz
TI 3430SDP 1.0 Version + mDDR (Boot NOR)
DRAM:  128 MB
Flash: 128 MB
NAND:128 MiB
--------------------------------------------------

2. OMAP4 does a kernel PANIC
-------------------------------------
[    0.000000] Calibrating delay loop... 1195.29 BogoMIPS (lpj=4669440)
[    0.000000] pid_max: default: 32768 minimum: 301
[    0.000000] Security Framework initialized
[    0.000000] Mount-cache hash table entries: 512
[    0.000000] CPU: Testing write buffer coherency: ok
[    0.000000] L310 cache controller enabled
[    0.000000] l2x0: 16 ways, CACHE_ID 0x410000c2, AUX_CTRL 0x0e050000
[    0.000000] CPU1: Booted secondary processor
[    0.000000] Brought up 2 CPUs
[    0.000000] SMP: Total of 2 processors activated (2395.78 BogoMIPS).
[    0.000000] regulator: core version 0.5
[    0.000000] NET: Registered protocol family 16
[    0.000000] mux: Could not set signal i2c2_scl.i2c2_scl
[    0.000000] mux: Could not set signal i2c2_sda.i2c2_sda
[    0.000000] mux: Could not set signal i2c3_scl.i2c3_scl
[    0.000000] mux: Could not set signal i2c3_sda.i2c3_sda
[    0.000000] mux: Could not set signal i2c4_scl.i2c4_scl
[    0.000000] mux: Could not set signal i2c4_sda.i2c4_sda
-------------------------------------

This is happening because 'omap_serial_init()' is hanging in the boot.
On OMAP3 the watchdog is generating reboot because devices_init doesn't
happens where as on OMAP4 it just hangs without reboot.
The uart clock is not getting enabled after omap_device_idle as part
of omap_serial_init.
The omap_device_idle(will disable the clock) then omap_uart_block_sleep()
should enable clock back disabled during the boot up phase.
But omap_uart_block_sleep() stuffed version is binded only under
CONFIG_PM and other version is just empty. Hence it is not enabling
clock back as expected

This patch adds uart clock enable code to omap_uart_block_sleep() function
built with CONFIG_PM disabled.
Thanks to Charulatha and Govindraj for their help on this debug.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Commit 914bab936fe0388a529079679e2f137aa4ff548d (OMAP: mach-omap2: Fix
incorrect assignment warnings) changed a pointer from 'u32 *' to
'void *' without also fixing up the pointer arithmetic.

Fix the scratchpad offsets so they are byte offsets instead of
word offsets and thus work correctly with a void pointer base.

Special thanks to Jean Pihet for taking the time track down this
problem and propose an initial solution.

Tested with off-idle and off-suspend on 36xx/Zoom3 and 34xx/omap3evm.

Cc: Manjunath Kondaiah G <manjugk@ti.com>
Reported-by: Jean Pihet <jean.pihet@newoldbits.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Tested-by: Jean Pihet <jean.pihet@newoldbits.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

The OMAP4 PandaBoard has EHCI port1 hooked up to an external
SMSC3320 transciever. GPIO 1 is used to power on the transceiver
and GPIO 62 for reset on the transceiver.

Signed-off-by: David Anders <x0132446@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Avoid possible crash if CONFIG_MMC_OMAP_HS is not set.

Signed-off-by: David Anders <x0132446@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

remove the second hsmmc definition as it is only used on the
expansion header of the PandaBoard and can be mux for other
functions.

Signed-off-by: David Anders <x0132446@ti.com>
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

It seems these comments where accidentally added so remove them.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>

Fix bit clear. Now it clears all other bits than mask bit where it should
clear only it.

Signed-off-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>

Reduce the amount of debugging generated by default when unused clocks
are being disabled by the clock code.  The previous code would only
generate debug-level messages, but some people who wished to run
production kernels with debug-level messages enabled reported that the
large number of clock disable messages were slowing boot.  Now to
enable clock-by-clock disable messages, DEBUG needs to be defined in
mach-omap2/clock.c.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tuukka Tikkanen <tuukka.tikkanen@nokia.com>
Cc: Tim Bird <tim.bird@am.sony.com>

Only OMAP2+ platforms have the System Control Module (SCM) IP block.
In the past, we've kept the SCM header file in plat-omap.  This has
led to abuse - device drivers including it; includes being added that
create implicit dependencies on OMAP2+ builds; etc.

In response, move the SCM headers into mach-omap2/.

As part of this, remove the direct SCM access from the OMAP UDC
driver.  It was clearly broken.  The UDC code needs an indepth review for
use on OMAP2+ chips.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Cory Maccarrone <darkstar6262@gmail.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>

Split plat-omap/common.c into three pieces:

1. the 32KiHz sync timer and clocksource code, which now lives in
   plat-omap/counter_32k.c;

2. the OMAP2+ common code, which has been moved to mach-omap2/common.c;

3. and the remainder of the OMAP-wide common code, which includes the
   deprecated ATAGs code and a deprecated video RAM reservation function.

The primary motivation for doing this is to move the OMAP2+-specific parts
into an OMAP2+-specific file, so that build breakage related to the
System Control Module code can be resolved.

Benoît Cousson <b-cousson@ti.com> suggested a new filename and found
some bugs in the counter_32k.c comments - thanks Benoît.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>

Previously the OMAP McBSP ASoC driver implemented CLKS switching by
using omap_ctrl_{read,write}l() directly.  This is against policy; the OMAP
System Control Module functions are not intended to be exported to drivers.
These symbols are no longer exported, so as a result, the OMAP McBSP ASoC
driver does not build as a module.

Resolve the CLKS clock changing portion of this problem by creating a
clock parent changing function that lives in
arch/arm/mach-omap2/mcbsp.c, and modify the ASoC driver to use it.
Due to the unfortunate way that McBSP support is implemented in ASoC
and the OMAP tree, this symbol must be exported for use by
sound/soc/omap/omap-mcbsp.c.

Going forward, the McBSP device driver should be moved from
arch/arm/*omap* into drivers/ or sound/soc/* and the CPU DAI driver
should be implemented as a platform_driver as many other ASoC CPU DAI
drivers are.  These two steps should resolve many of the layering
problems, which will rapidly reappear during a McBSP hwmod/PM runtime
conversions.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

The OMAP ASoC McBSP code implemented CLKR and FSR signal muxing via
direct System Control Module writes on OMAP2+.  This required the
omap_ctrl_{read,write}l() functions to be exported, which is against
policy: the only code that should call those functions directly is
OMAP core code, not device drivers.  omap_ctrl_{read,write}*() are no
longer exported, so the driver no longer builds as a module.

Fix the pinmuxing part of the problem by removing calls to
omap_ctrl_{read,write}l() from the OMAP ASoC McBSP code and
implementing signal muxing functions in arch/arm/mach-omap2/mcbsp.c.
Due to the unfortunate way that McBSP support is implemented in ASoC
and the OMAP tree, these symbols must be exported for use by
sound/soc/omap/omap-mcbsp.c.

Going forward, the McBSP device driver should be moved from
arch/arm/*omap* into drivers/ or sound/soc/*, and the CPU DAI driver
should be implemented as a platform_driver as many other ASoC CPU DAI
drivers are.  These two steps should resolve many of the layering
problems, which will rapidly reappear during a McBSP hwmod/PM runtime
conversion.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Acked-by: Jarkko Nikula <jhnikula@gmail.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

The OMAP3 clock tree already contains the infrastructure to support
clock framework-based McBSP functional clock source switching.  But it
did not contain the clkdev aliases for the McBSP code to refer to the
parent clocks in an SoC integration-neutral way.  So, add the clkdev
aliases for the parent clocks.

Signed-off-by: Paul Walmsley <paul@pwsan.com>

Add the MCBSP_CLKS clock and the clksel structures needed to support clock
framework-based source switching for McBSPs 1-5.  Also, add clkdev
aliases on the parent clocks for the McBSP source switching code, added
in a subsequent patch.

Signed-off-by: Paul Walmsley <paul@pwsan.com>

Add the MCBSP_CLKS clock and the clksel structures needed to support clock
framework-based source switching for McBSP 1 and 2.  Also, add clkdev
aliases on the parent clocks for the McBSP source switching code, added
in a subsequent patch.

Signed-off-by: Paul Walmsley <paul@pwsan.com>