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  1. Oct 13, 2010
  2. Oct 12, 2010
  3. Oct 11, 2010
  4. Oct 06, 2010
  5. Oct 05, 2010
    • Paul Mundt's avatar
      sh: Wire up INTC subgroup splitting for SH7786 SCIF1. · d91ddc25
      Paul Mundt authored
      
      
      SH7786 is the big user for subgroup splitting, mostly for the PCIe block,
      but those will follow later. For now we simply split up SCIF1, as used by
      the serial console on SDK7786 and others.
      
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      d91ddc25
    • Paul Mundt's avatar
      sh: intc: Split up the INTC code. · 2be6bb0c
      Paul Mundt authored
      
      
      This splits up the sh intc core in to something more vaguely resembling
      a subsystem. Most of the functionality was alread fairly well
      compartmentalized, and there were only a handful of interdependencies
      that needed to be resolved in the process.
      
      This also serves as future-proofing for the genirq and sparseirq rework,
      which will make some of the split out functionality wholly generic,
      allowing things to be killed off in place with minimal migration pain.
      
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      2be6bb0c
    • Paul Mundt's avatar
      sh: intc: Handle early lookups of subgroup IRQs. · d74310d3
      Paul Mundt authored
      
      
      If lookups happen while the radix node still points to a subgroup
      mapping, an IRQ hasn't yet been made available for the specified id, so
      error out accordingly. Once the slot is replaced with an IRQ mapping and
      the tag is discarded, lookup can commence as normal.
      
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      d74310d3
  6. Oct 04, 2010
    • Paul Mundt's avatar
      sh: intc: Support virtual mappings for IRQ subgroups. · c1e30ad9
      Paul Mundt authored
      
      
      Many interrupts that share a single mask source but are on different
      hardware vectors will have an associated register tied to an INTEVT that
      denotes the precise cause for the interrupt exception being triggered.
      
      This introduces the concept of IRQ subgroups in the intc core, where
      a virtual IRQ map is constructed for each of the pre-defined cause bits,
      and a higher level chained handler takes control of the parent INTEVT.
      This enables CPUs with heavily muxed IRQ vectors (especially across
      disjoint blocks) to break things out in to a series of managed chained
      handlers while being able to dynamically lookup and adopt the IRQs
      created for them.
      
      This is largely an opt-in interface, requiring CPUs to manually submit
      IRQs for subgroup splitting, in addition to providing identifiers in
      their enum maps that can be used for lazy lookup via the radix tree.
      
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      c1e30ad9
    • Paul Mundt's avatar
      sh: intc: Implement reverse mapping for IRQs to per-controller IDs. · 44629f57
      Paul Mundt authored
      
      
      This implements a scheme roughly analogous to the PowerPC virtual to
      hardware IRQ mapping, which we use for IRQ to per-controller ID mapping.
      This makes it possible for drivers to use the IDs directly for lookup
      instead of hardcoding the vector.
      
      The main motivation for this work is as a building block for dynamically
      allocating virtual IRQs for demuxing INTC events sharing a single INTEVT
      in addition to a common masking source.
      
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      44629f57
  7. Oct 03, 2010
  8. Oct 02, 2010
  9. Oct 01, 2010
  10. Sep 30, 2010
    • Magnus Damm's avatar
      sh: boot kernel with SR.BL set · 68a1aed7
      Magnus Damm authored
      
      
      Update the SH kernel to keep SR.BL set until the VBR
      register has been initialized. Useful to allow boot
      of the kernel even though exceptions are pending.
      
      Without this patch there is a window of time when
      exceptions such as NMI are enabled but no exception
      handlers are installed.
      
      This patch modifies both the zImage loader and the
      actual kernel to boot with BL=1, but the zImage
      loader is modfied in such a way that the init_sr
      value is unchanged to not break the zImage loader
      provided by kexec.
      
      Tested on sh7724 Ecovec and on the SH4AL-DSP core
      included in sh7372.
      
      Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      68a1aed7
    • Guennadi Liakhovetski's avatar
      sh: fix a kfree address in clkdev code · 4c62c595
      Guennadi Liakhovetski authored
      
      
      kfree() in clkdev_drop() function should actually be called with an address of
      a struct clk_lookup_alloc object, and not struct clk_lookup, as presently done.
      This just happens to work, because "struct clk_lookup cl" is the first
      member in struct clk_lookup_alloc.
      
      Signed-off-by: default avatarGuennadi Liakhovetski <g.liakhovetski@gmx.de>
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      4c62c595
  11. Sep 23, 2010
  12. Sep 20, 2010
    • Paul Mundt's avatar
      sh: pci: Use a generic raw spinlock for PCI config access locking. · 39a90865
      Paul Mundt authored
      
      
      This copies the pci_config_lock idea from x86 over, allowing us to kill
      off a couple of existing private locks. At the same time, these need to
      be converted to raw spinlocks for -rt kernels, so we make that change at
      the same time. This should make it easier for future parts to get the
      locking right instead of inevitable ending up with lock type mismatches.
      
      Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
      39a90865
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