Commits · c097aac7d9e250bbeabd83c51c7858c8300f23ee · jan.koester / Linux · GitLab

May 04, 2022
- drm/amdgpu/sdma5.2: add mes support for sdma ib test · c097aac7
  Jack Xiao authored Mar 22, 2020
  c097aac7
- drm/amdgpu/sdma5.2: add mes support for sdma ring test · 7e5e7971
  Jack Xiao authored Mar 22, 2020
  7e5e7971
- drm/amdgpu/sdma5.2: add mes queue fence handling · 254492b6
  Jack Xiao authored Mar 22, 2020
  254492b6
- drm/amdgpu/sdma5.2: associate mes queue id with fence · 6f120134
  Jack Xiao authored Mar 22, 2020
  6f120134
- drm/amdgpu/sdma5.2: initialize sdma mqd · e0f5b4c9
  Jack Xiao authored Mar 22, 2020
  e0f5b4c9
- drm/amdgpu/sdma: use per-ctx sdma csa address for mes sdma queue · 06589195
  Jack Xiao authored Mar 22, 2020
  06589195
- drm/amdgpu: don't use kiq to flush gpu tlb if mes enabled · a3d686a6
  Jack Xiao authored Mar 31, 2022
  a3d686a6
- drm/amdgpu/gfx10: add mes support for gfx ib test · 15d839c1
  Jack Xiao authored Apr 26, 2022
  15d839c1
- drm/amdgpu/gfx10: add mes queue fence handling · 954e0a72
  Jack Xiao authored Mar 20, 2020
  954e0a72
- drm/amdgpu/mes: extend mes framework to support multiple mes pipes · 207e8bbe
  Jack Xiao authored Apr 14, 2021
  207e8bbe
- drm/amdgpu: allocate doorbell index for mes kiq · b608e785
  Jack Xiao authored Apr 14, 2021
  b608e785
- drm/amdgpu: add mes_kiq module parameter v2 · 928fe236
  Jack Xiao authored Apr 14, 2021
  928fe236
- drm/amdgpu: update mes process/gang/queue definitions · 3a42c7f3
  Jack Xiao authored Mar 27, 2020
  3a42c7f3
- drm/amdgpu: use the whole doorbell space for mes · de33a329
  Jack Xiao authored Mar 20, 2020
  de33a329
- drm/amdgpu/gmc10: skip emitting pasid mapping packet · 56443402
  Jack Xiao authored Mar 20, 2020
  56443402
- drm/amdgpu/gfx10: use INVALIDATE_TLBS to invalidate TLBs v2 · 115efa44
  Jack Xiao authored Mar 20, 2020
  115efa44
- drm/amdgpu/gfx10: inherit vmid from mqd · 1f0f303c
  Jack Xiao authored Mar 20, 2020
  1f0f303c
- drm/amdgpu/gfx10: associate mes queue id with fence v2 · 11f39576
  Jack Xiao authored Mar 20, 2020
  11f39576
- drm/amdgpu/gfx10: use per ctx CSA for de metadata · 34ec3c2e
  Jack Xiao authored Mar 20, 2020
  34ec3c2e
- drm/amdgpu/gfx10: use per ctx CSA for ce metadata · 75df9e88
  Jack Xiao authored Mar 20, 2020
  75df9e88
- drm/amdgpu/gfx10: implement mqd functions of gfx/compute eng v2 · c755f680
  Jack Xiao authored Jul 01, 2020
  c755f680
- drm/amdgpu: assign the cpu/gpu address of fence from ring · ae9fd76f
  Jack Xiao authored Mar 20, 2020
  ae9fd76f
- drm/amdgpu: initialize/finalize the ring for mes queue · 502b6cef
  Jack Xiao authored Mar 30, 2022
  502b6cef
- drm/amdgpu: use ring structure to access rptr/wptr v2 · 3748424b
  Jack Xiao authored Mar 20, 2020
  3748424b
- drm/amdgpu: define ring structure to access rptr/wptr/fence · d74c5b06
  Jack Xiao authored Jun 11, 2020
  d74c5b06
- drm/amdgpu: add mes ctx data in amdgpu_ring · c6abbcbc
  Jack Xiao authored Mar 16, 2020
  c6abbcbc
- drm/amdgpu: add the per-context meta data v3 · 2bc956ef
  Jack Xiao authored Mar 27, 2020
  2bc956ef
- drm/amdgpu: add helper function to initialize mqd from ring v4 · 80af9daa
  Jack Xiao authored Jul 01, 2020
  80af9daa
- drm/amdgpu: define MQD abstract layer for hw ip · 5405a526
  Jack Xiao authored Jul 01, 2020
  5405a526
- drm/amdgpu: add imu fw structure · d142f56e
  Likun Gao authored Jun 23, 2021
  d142f56e
- drm/amdgpu: add rlc TOC header file for soc21 (v2) · 89466f49
  Likun Gao authored Jun 27, 2021
  89466f49
- drm/amdgpu: add FGCG support · d6b9a91f
  Evan Quan authored Apr 07, 2022
  d6b9a91f
- drm/amdgpu: support rlc v2_3 ucode struct · 550bb28e
  Likun Gao authored Aug 30, 2021
  550bb28e
- drm/amdgpu: add gfx firmware header v2_0 · 641f053e
  Likun Gao authored May 25, 2021
  641f053e
- drm/amdgpu: add irq src id for GFX11 · e6b58555
  Wenhui Sheng authored Oct 16, 2020
  e6b58555
- drm/amdgpu: add gfx11 mqd structures · 86a65c56
  Hawking Zhang authored Jul 07, 2021
  86a65c56
- drm/amdgpu: add gfx11 clearstate header · 6c982cf8
  Hawking Zhang authored Jan 06, 2021
  6c982cf8
- drm/amdgpu: add soc21 chip enum header v8 · 0eb1df05
  Hawking Zhang authored Feb 20, 2022
  0eb1df05
- drm/amdgpu/discovery: Set GC family for GC 11.0 IP · 7d336142
  Likun Gao authored Apr 04, 2022
  7d336142
- drm/amdgpu: add GC v11_0_0 family id · 5eca8379
  Hawking Zhang authored Feb 22, 2022
  5eca8379